Commit Graph

187933 Commits

Author SHA1 Message Date
Dimitry Andric
2882a0d33c For lib/msun, turn off warnings about unknown pragmas, since
lib/msun/src/e_sqrtl.c uses an unsupported STDC FENV_ACCESS pragma.
2014-02-21 18:49:08 +00:00
Baptiste Daroussin
461918e205 Fix build on i386 2014-02-21 16:14:40 +00:00
Baptiste Daroussin
0acae44120 Lower warning level when built with gcc 2014-02-21 14:14:48 +00:00
Christian Brueffer
9cba0f9670 Match the correct variable to the variable description.
PR:		121173
Submitted by:	Thomas Mueller <tmueller at sysgo.com>
MFC after:	1 week
2014-02-21 13:53:41 +00:00
Baptiste Daroussin
22354f09c8 Fix build with gcc 2014-02-21 13:17:10 +00:00
Ivan Voras
f31fd4758a Explain how and where kern.cam.ada.write_cache can be set in practical
situations.

Reviewed by:	hrs
Approved by:	mav
2014-02-21 12:17:27 +00:00
Baptiste Daroussin
50a083457a Enforce mail user and group 2014-02-21 11:06:22 +00:00
Baptiste Daroussin
63aed9d0c7 Fix typo 2014-02-21 10:34:59 +00:00
Baptiste Daroussin
14b1c09d4d Add dma-mbox-create forgotten in the previous commit 2014-02-21 09:42:50 +00:00
Baptiste Daroussin
533c3616ce Regen after addition of WITHOUT_DMA 2014-02-21 07:31:24 +00:00
Baptiste Daroussin
a9e8641da9 Import Dragonfly Mail Agent into base system
It is a small and lightweight Mail Transport Agent.
It accepts mails from locally installed Mail User Agents (MUA) and delivers the
mails either locally or to a remote destination. Remote delivery includes
several features like TLS/SSL support, SMTP authentication and NULLCLIENT.

Make dma conditional to new WITHOUT_DMA option and make it respect WITHOUT_MAIL

Reviewed by:	peter
Discussed with:	emaste, bz, peter
2014-02-21 07:26:49 +00:00
Neel Natu
159dd56f94 Add support for x2APIC virtualization assist in Intel VT-x.
The vlapic.ops handler 'enable_x2apic_mode' is called when the vlapic mode
is switched to x2APIC. The VT-x implementation of this handler turns off the
APIC-access virtualization and enables the x2APIC virtualization in the VMCS.

The x2APIC virtualization is done by allowing guest read access to a subset
of MSRs in the x2APIC range. In non-root operation the processor will satisfy
an 'rdmsr' access to these MSRs by reading from the virtual APIC page instead.

The guest is also given write access to TPR, EOI and SELF_IPI MSRs which
get special treatment in non-root operation. This is documented in the
Intel SDM section titled "Virtualizing MSR-Based APIC Accesses".

Enforce that APIC-write and APIC-access VM-exits are handled only if
APIC-access virtualization is enabled. The one exception to this is
SELF_IPI virtualization which may result in an APIC-write VM-exit.
2014-02-21 06:03:54 +00:00
Ian Lepore
86a5575402 Add basic cpu frequency control and temperature monitoring to imx6_anatop.
The temperature monitor device is enabled to sample the die temperature at
16hz.  The temperature is published via sysctl.  A callout routine at 10hz
monitors the temperature and throttles back the cpu if the temperature
goes over a user-settable throttle point (by default 10C less than the
critical high-point temperature for the chip).  The hardware is supposed
to be able to deliver an interrupt when the temperature exceeds a settable
limit, but the interrupt never arrives so for now a callout does the job.

At attach time we read the maximum cpu frequency the chip is allowed to run
at and the cpu is set to run at that speed.  It's reported at attach time.
A sysctl variable reports the current speed when queried.

New sysctl values:

  dev.imx6_anatop.0.cpu_mhz: 984
  dev.imx6_anatop.0.temperature: 37.9C
  dev.imx6_anatop.0.throttle_temperature: 95.0C

Steven Lawrance did the initial heavy lifting on this, but I changed
enough stuff that I'm the one to blame if anything breaks.

Submitted by:	Steven Lawrance <stl@koffein.net>
2014-02-21 06:00:06 +00:00
Warner Losh
40a4c9d72e Remove bogus blank line. 2014-02-21 05:17:30 +00:00
David Xu
209782e06f malloc_aligned() may not leave enough space for pointer to allocated memory,
saving the pointer will overwrite bytes belongs to another memory block
unexpectly, to fix the problem, use (allocated address + sizeof(void *)) as
initial value, and slip to next aligned address, so maximum extra bytes is
sizeof(void *) + align - 1.

Tested by: Andre Albsmeier < mail at ma17 dot ata dot myota dot orgndre >
2014-02-21 03:36:16 +00:00
Tycho Nightingale
182d7debb9 Avoid clobbering the counter mode when issuing a latch command.
Approved by:	grehan (co-mentor)
2014-02-21 01:15:26 +00:00
Christian Brueffer
84beb433c0 Further refine the auth fail regex to catch more auth failures and
reduce false positives.

The committed patch was provided by Christian Marg.

PR:		91732
Submitted by:	Daniel O'Connor <doconnor at gsoft.com.au>
		Skye Poier <spoier at gmail.com>
		Alan Amesbury <amesbury at umn.edu>
		Christian Marg <marg at rz.tu-clausthal.de>
MFC after:	1 month
2014-02-20 23:43:49 +00:00
Dimitry Andric
f5e6413717 Similar to r211505 for x86, remove unneeded casts in inline assembly for
sparc64 from contrib/gcc/longlong.h, which are considered "heinous" GNU
extensions by clang.
2014-02-20 23:08:01 +00:00
Dimitry Andric
19e61966d6 In lib/libc/sparc64/sys/__sparc_utrap_setup.c, avoid an error about
passing a pointer to a const object to sysarch().
2014-02-20 23:02:42 +00:00
Baptiste Daroussin
c48517e8d3 Import dma 89702b7f14 (2013-02-13) into vendors 2014-02-20 22:39:55 +00:00
Dimitry Andric
d8d5a32f12 Pull in r201718 from upstream llvm trunk:
Expand 64bit {SHL,SHR,SRA}_PARTS on sparcv9.

Submitted by:	rdivacky
2014-02-20 22:33:27 +00:00
Dimitry Andric
406f39d5fd Pull in r200453 from upstream llvm trunk:
Implement SPARCv9 atomic_swap_64 with a pseudo.

  The SWAP instruction only exists in a 32-bit variant, but the 64-bit
  atomic swap can be implemented in terms of CASX, like the other
  atomic rmw primitives.

Submitted by:	rdivacky
2014-02-20 22:31:45 +00:00
Dimitry Andric
137470fbfb Add Makefile glue to build the Sparc backend libraries and link them
into the clang executable.
2014-02-20 22:22:39 +00:00
Dimitry Andric
e18c3d5a5a Import a whole bunch of clang trunk commits to enable self-hosting clang
3.4 on Sparc64 (commit descriptions left out for brevity):

r198311 r198312 r198911 r198912 r198918 r198923 r199012 r199034 r199037
r199188 r199399 r200452

Submitted by:	rdivacky
2014-02-20 21:59:15 +00:00
Dimitry Andric
48173d357a Import a whole bunch of llvm trunk commits to enable self-hosting clang
3.4 on Sparc64 (commit descriptions left out for brevity):

r196755 r198028 r198029 r198030 r198145 r198149 r198157 r198565 r199186
r199187 r198280 r198281 r198286 r198480 r198484 r198533 r198567 r198580
r198591 r198592 r198658 r198681 r198738 r198739 r198740 r198893 r198909
r198910 r199014 r199024 r199028 r199031 r199033 r199061 r199775 r199781
r199786 r199940 r199974 r199975 r199977 r200103 r200104 r200112 r200130
r200131 r200141 r200282 r200368 r200373 r200376 r200509 r200617 r200960
r200961 r200962 r200963 r200965

Submitted by:	rdivacky
2014-02-20 21:56:15 +00:00
Peter Wemm
93c4e6d498 Revert my commit in r261253; the real problem was tackled in r262209. 2014-02-20 20:53:29 +00:00
Michael Tuexen
1213f0e749 Remove redundant code and fix a style error.
MFC after: 3 days
2014-02-20 20:14:43 +00:00
Peter Wemm
da64579a3b Match our implementation of iconv's inbuf argument. 2014-02-20 20:09:28 +00:00
Peter Wemm
f5f7a7f70a Import svn-1.8.8.
Highlights:
* Security fix for apache server plugin that we don't build or use
* sqlite performance improvements.
* bug fixes for edge cases and some other less common operations.
2014-02-20 19:48:47 +00:00
Peter Wemm
219f5ebf8f Vendor import svn-1.8.8 2014-02-20 19:26:10 +00:00
Edward Tomasz Napierala
bf4427d114 Make it clear that there are two ways to add a session using iscsictl(8),
and some options require configuration file.

Reviewed by:	emaste
Sponsored by:	The FreeBSD Foundation
2014-02-20 17:23:08 +00:00
Christian Brueffer
6a6ce390c7 Spelling, grammar and mdoc cleanup. 2014-02-20 16:35:48 +00:00
Steven Kreuzer
7a8d39f1a8 Document r261504 - FreeBSD/i386 guests can be run under bhyve.
Document r261498 - ping uses the Capsicum framework to drop privileges
Document r261344 - mdocml have been upgraded to version 1.12.3
Documetn r261991 - llvm/clang have been upgraded to version 3.4

Approved by:	hrs (mentor)
2014-02-20 14:39:12 +00:00
Ian Lepore
8df34dd25b Add early printf support, wrapped in #if 0 because it's only rarely needed. 2014-02-20 14:29:59 +00:00
Christian Brueffer
e42bd24a5e Fix a cross-reference.
MFC after:	3 days
2014-02-20 13:33:18 +00:00
Luiz Otavio O Souza
69728ec82d Fix the boot on FDT-enabled systems after r261819.
While here, don't overwrite the error message on interactive use and add
the missing '\n' at end of error message for the non interactive use.

Tested by:	ian, myself
Approved by:	adrian (mentor, implicit)
2014-02-20 13:09:08 +00:00
Luigi Rizzo
5a067ae187 compile with NOINET 2014-02-20 04:56:55 +00:00
Neel Natu
52e5c8a2ec Simplify APIC mode switching from MMIO to x2APIC. In part this is done to
simplify the implementation of the x2APIC virtualization assist in VT-x.

Prior to this change the vlapic allowed the guest to change its mode from
xAPIC to x2APIC. We don't allow that any more and the vlapic mode is locked
when the virtual machine is created. This is not very constraining because
operating systems already have to deal with BIOS setting up the APIC in
x2APIC mode at boot.

Fix a bug in the CPUID emulation where the x2APIC capability was leaking
from the host to the guest.

Ignore MMIO reads and writes to the vlapic in x2APIC mode. Similarly, ignore
MSR accesses to the vlapic when it is in xAPIC mode.

The default configuration of the vlapic is xAPIC. The "-x" option to bhyve(8)
can be used to change the mode to x2APIC instead.

Discussed with:	grehan@
2014-02-20 01:48:25 +00:00
Robert Watson
b1bdbe9d09 Temporarily unhook BERI boot loader from the build until 32-bit MIPS
properly excludes building our 64-bit only boot-loader adaptation.
2014-02-19 23:09:25 +00:00
Christian Brueffer
5bd12c4940 Spelling, grammar and mdoc cleanup.
MFC after:	1 week
2014-02-19 21:31:04 +00:00
Robert Watson
0c7090e31a Do build boot-loader FDT code on MIPS.
MFC after:	3 weeks
Sponsored by:	DARPA, AFRL
2014-02-19 17:44:59 +00:00
Martin Matuska
dc64d6b7e1 Revert r262196
I am going to split this into two individual patches and test it with
the projects/pf branch that may get merged later.
2014-02-19 17:06:04 +00:00
Bryan Drewery
df8d5fd4dc Add missing Save Cursor support for VT520
Submitted by:	IWAMOTO Kouichi <sue@iwmt.org>
PR:		conf/174937
Obtained from:	http://web.mit.edu/dosathena/doc/www/ek-vt520-rm.pdf
Approved by:	bapt (mentor)
MFC after:	2 weeks
2014-02-19 13:06:50 +00:00
Robert Watson
a02a14d1a6 Update MIPS bootinfo.h to reflect the actual MIPS boot2/loader boot-time
interface.

MFC after:	3 weeks
Sponsored by:	DARPA, AFRL
2014-02-19 09:19:09 +00:00
Marko Zec
c5d4eab644 V_irtualize rtsock refcounting, which reduces the chances for panics
on teardown of vnets without active routing sockets while at least
one routing socket is active elsewhere.

Tested by:	Vijay Singh
MFC after:	3 days
2014-02-19 08:29:07 +00:00
Peter Wemm
f0258c45f2 Really (I think) fix the sporadic heimdal build failures with high -j
levels. The root of the problem was that make was attempting to run up
to three concurrent asn1_compile commands to produce the three outputs
that it was declared to produce.  The failure was caused when the
asn1_compiles were started out of sync and a later one was truncating
the files that another thread was trying to copy.  In reality it is
supposed to be run exactly once and all three outputs are produced in
one pass.

Use the same hack as for the parent's Makefile.inc for the compile_et
multi-output rule.
2014-02-19 07:09:14 +00:00
Adrian Chadd
a9ad42220a Extract out the port VLAN flags/setup code and throw it into two new
HAL methods.

This allows the AR8327 code to override it as appropriate.

Tested:

* DB120 - AR8327 and AR9340 on-board switch; only running 'etherswitchcfg'
  to check configs.  The actual VLAN programming wasn't tested.
2014-02-19 06:43:52 +00:00
Adrian Chadd
2bddba6a60 Add methods for the VLAN port set/get routines.
The registers (and perhaps the flags) are different for the AR8327, so
I'll stub those out until they're written.

Tested:

* DB120 - both on-chip AR9340 and AR8327 switches.
2014-02-19 06:35:17 +00:00
Adrian Chadd
ddbc44200a Turn the port init function into a HAL method and initialise it to the
default port init code.

This needs to be overridden for the AR8327.
2014-02-19 06:03:58 +00:00
Adrian Chadd
e765499eed Teach the PHY register path about the different MDIO bus address
for the AR8327.

Tested:

* AR8327, DB120
2014-02-19 06:02:47 +00:00