Commit Graph

388 Commits

Author SHA1 Message Date
Alexander Motin
15e01a35e1 Add some device IDs found on AMD FCH shipsets.
MFC after:	2 weeks
2016-03-29 12:50:42 +00:00
Hans Petter Selasky
6227e59635 Add more UHCI PCI IDs.
Submitted by:	Dmitry Luhtionov <dmitryluhtionov@gmail.com>
2016-03-24 09:35:29 +00:00
Alexander Motin
cb6b0ad147 Add IDs for Intel Wellsburg USB controllers.
MFC after:	1 week
2016-03-19 09:20:18 +00:00
Wojciech Macek
9147c9b8b2 Add xhci_mv.c
Add missing xhci driver for Marvell systems.

Submitted by:          Bartosz Szczepanek <bsz@semihalf.com>
Obtained from:         Semihalf
Sponsored by:          Stormshield
Reviewed by:           hselasky
Approved by:           cognet (mentor)
Differential Revision: https://reviews.freebsd.org/D5031
2016-03-14 07:24:08 +00:00
Hans Petter Selasky
b265897c37 Configure the correct bMaxPacketSize for control endpoints before
requesting the initial complete device descriptor and not as part of
the subsequent babble error recovery. Babble means that the received
USB packet was bigger than than configured maximum packet size. This
only affects enumeration of FULL speed USB devices which use a
bMaxPacketSize different from 8 bytes. This patch might help fix
enumeration of USB devices which exhibit USB I/O errors in dmesg
during boot.

MFC after:	1 week
2016-02-23 18:17:01 +00:00
Hans Petter Selasky
4bc7e098c7 Correct PCI device description.
Submitted by:	Dmitry Luhtionov <dmitryluhtionov@gmail.com>
2016-02-10 08:03:10 +00:00
Michal Meloun
477aff3eae EHCI: Correct address of EHCI_USBMODE_LPM register is 0xC8, not 0xA8. 2016-01-30 08:27:09 +00:00
Michal Meloun
cdf4ec6873 EHCI: Make core reset and port speed reading more generic.
Use driver settable callbacks for handling of:
- core post reset
- reading actual port speed

Typically, OTG enabled EHCI cores wants setting of USBMODE register,
but this register is not defined in EHCI specification and different
cores can have it on different offset.

Also, for cores with TT extension, actual port speed must be determinable.
But again, EHCI specification not covers this so this patch provides
function for two most common variant of speed bits layout.

Reviewed by: hselasky
Differential Revision: https://reviews.freebsd.org/D5088
2016-01-28 14:11:59 +00:00
Zbigniew Bodek
5c8fae4064 Improve attachment of the ehci_mv driver
Driver was modified to ensure it attaches properly to "marvell,orion-ehci"
node, which doesn't have error interrupt line defined. Neccessary
ofw_compat_data struct was added and probe procedure was altered.

Reviewed by:    andrew, ian
Obtained from:  Semihalf
Sponsored by:   Stormshield
Submitted by:   Bartosz Szczepanek <bsz@semihalf.com>
Differential revision:  https://reviews.freebsd.org/D4369
2016-01-20 13:58:07 +00:00
Warner Losh
64535e84f6 Move ohci files to their proper place in the tree for atmel.
Fix when it is included (we don't have a at91rm9200 device).
From a similar patch in the PR, with tweaked names.

PR: 206229
2016-01-16 04:47:32 +00:00
Hans Petter Selasky
076daeda4f Fix for directly connected FULL or LOW speed USB devices.
Found by:	Sebastian Huber <sebastian.huber@embedded-brains.de>
MFC after:	1 week
2016-01-05 09:18:43 +00:00
Andrew Turner
2245b38f73 Ads support to the xhci pci attachment to use MSI-X interrupts when
available. As with MSI interrupts these can be disabled by setting
hw.usb.xhci.msix to 0 in the loader.

MSI-X interrupts are needed on some hardware, for example the Cavium
ThunderX only supports them, and with this we don't fall back to polling.

PR:		204378
Reviewed by:	hselasky, jhb
MFC after:	1 week (after r292669)
Sponsored by:	ABT Systems Ltd
Differential Revision:	https://reviews.freebsd.org/D4698
2015-12-24 09:40:29 +00:00
Hans Petter Selasky
db8409e00a Fix compile warning about shifting signed negative constant.
MFC after:	3 days
2015-11-23 12:55:37 +00:00
Hans Petter Selasky
c2472ff8fb Avoid using the bounce buffer when the source or destination buffer is
32-bits aligned. Merge the two bounce buffers into a single one. Some
rough tests showed that the DWC OTG throughput on RPI2 increased by
10% after this patch.

MFC after:	1 week
2015-11-08 09:37:26 +00:00
Hans Petter Selasky
52d7c63839 Reduce the DWC OTG interrupt load by not reading all the host channel
status registers for every interrupt. Check a common host channel
status interrupt register first, then conditionally read the
individual host channel status registers.

Submitted by:	Sebastian Huber <sebastian.huber@embedded-brains.de>
MFC after:	1 week
2015-10-30 14:50:29 +00:00
Hans Petter Selasky
4be283b9be Add quirk for USB 3.0 PCI device.
Submitted by:	philipp.maechler@mamo.li
PR:		203650
MFC after:	1 week
2015-10-19 07:21:57 +00:00
Kevin Lo
dd4c159043 Add support for Fresco Logic USB 3.0 host controller.
Fresco Logic hosts advertise MSI, but fail to actually generate MSI
interrupts.  We have to disable MSI use.

Reviewed by:	hselasky
2015-10-08 15:13:57 +00:00
Hans Petter Selasky
0e8fa8c3bc Add quirk for USB 3.0 PCI device.
Submitted by:	Gary Jennejohn <gj@freebsd.org>
MFC after:	1 week
2015-10-08 13:39:27 +00:00
Ed Maste
aafbd0257a Add Cavium ThunderX xHCI controller PCI ID
There is an issue with interrupts at the moment, but it works with
polling mode set (hw.usb.xhci.use_polling=1).

Reviewed by:	hselasky
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D3665
2015-09-15 16:08:25 +00:00
Hans Petter Selasky
6eed0dd7c4 Correct PCI ID.
Submitted by:	Dmitry Luhtionov <dmitryluhtionov@gmail.com>
MFC after:	1 month
PR:		202807
2015-09-14 07:08:29 +00:00
Andrew Turner
504a0067c7 Add support for the dwc usb in the HiSilicon hi6220 in the HiKey board. For
this we need to force the driver into host mode, as without this the driver
fails to detect any devices.

Relnotes:	yes
Sponsored by:	ABT Systems Ltd
2015-09-01 17:13:04 +00:00
Hans Petter Selasky
6840adf6da Add new PCI ID.
Submitted by:	Dmitry Luhtionov <dmitryluhtionov@gmail.com>
MFC after:	1 month
PR:		202807
2015-09-01 09:33:24 +00:00
Hans Petter Selasky
ce842cec42 Fixes for HIGH speed ISOCHRONOUS traffic. HS ISOCHRONOUS traffic at
intervals less than 250us was not handled properly. Add support for
high-bandwidth ISOCHRONOUS packets. USB webcams, USB audio and USB DVB
devices are expected to work better. High-bandwidth INTERRUPT
endpoints is not yet supported.

MFC after:	2 weeks
2015-08-15 12:06:15 +00:00
Hans Petter Selasky
e4344dae5b Handle NYET high speed tokens and predict NAK'ing is up next.
MFC after:	2 weeks
2015-08-14 14:20:10 +00:00
Hans Petter Selasky
7462a4dda1 Minor code refactor to avoid duplicating code.
MFC after:	2 weeks
2015-08-14 13:58:18 +00:00
Hans Petter Selasky
43ea03d756 Improve the realtime properties of USB transfers for embedded systems
like RPI-B and RPI-2.

Description of problem:
USB transfers can process data in their callbacks sometimes causing
unacceptable latency for other USB transfers. Separate BULK completion
callbacks from CONTROL, INTERRUPT and ISOCHRONOUS callbacks, and give
BULK completion callbacks lesser execution priority than the
others. This way USB audio won't be interfered by heavy USB ethernet
usage for example.

Further serve USB transfer completion in a round robin fashion,
instead of only serving the most CPU hungry. This has been done by
adding a third flag to USB transfer queue structure which keeps track
of looping callbacks. The "command" callback function then decides
what to do when looping.

MFC after:		2 weeks
2015-08-14 12:57:53 +00:00
Hans Petter Selasky
56d6361d92 Limit the number of times we loop inside the DWC OTG poll handler to
avoid starving other fast interrupts. Fix a comment while at it.

MFC after:	1 week
Suggested by:	Svatopluk Kraus <onwahe@gmail.com>
2015-07-31 09:12:31 +00:00
Hans Petter Selasky
ed0ed9b424 Optimise the DWC OTG host mode driver's receive path:
Remove NAKing limit and pause IN and OUT transactions for 125us in
case of NAK response for BULK and CONTROL endpoints. This gets the
receive latency down and improves USB network throughput at the cost
of some CPU usage.

MFC after:	1 month
2015-07-28 07:30:07 +00:00
Marius Strobl
43bc87c459 - Move the remainder of host controller capability registers reading from
xhci_start_controller() to xhci_init(). These values don't change at run-
  time so there's no point of acquiring them on every USB_HW_POWER_RESUME
  instead of only once during initialization. In r276717, reading the first
  couple of registers in question already had been moved as a prerequisite
  for the changes in that revision.
- Identify ASMedia ASM1042A controllers.
- Use NULL instead of 0 for pointers.

MFC after:	3 days
2015-07-27 15:26:50 +00:00
Hans Petter Selasky
a529288d65 Optimise the DWC OTG host mode driver's transmit path:
1) Use the TX FIFO empty interrupts to poll the transmit FIFO usage,
instead of using own software counters and waiting for SOF
interrupts. Assume that enough FIFO space is available to execute one
USB OUT transfer of any kind when the TX FIFO is empty.

2) Use the host channel halted event to asynchronously wait for host
channels to be disabled instead of waiting for SOF interrupts. This
results in less turnaround time for re-using host channels and at the
same time increases the performance.

The network transmit performance measured by "iperf" for the "RPi-B v1
2011/12" board, increased from 45MBit/s to 65Mbit/s after applying the
changes above.

No regressions seen using:
 - High Speed (BULK, CONTROL, INTERRUPT)
 - Full Speed (All transfer types)
 - Low Speed (Control and Interrupt)

MFC after:	1 month
Submitted by:	Daisuke Aoyama <aoyama@peach.ne.jp>
2015-07-16 16:08:40 +00:00
Hans Petter Selasky
b4df5b00f2 Fix for control endpoint handling in the DWC OTG driver. The data
stage processing is only allowed after the setup complete event has
been received. Else a race may occur and the OUT data can be corrupted.
While at it ensure resetting a FIFO has the required wait loop.

MFC after:	3 days
2015-06-02 17:40:52 +00:00
Hans Petter Selasky
68691fe0ce Fix for DWC OTG device side isochronous transfers. The even or odd
isochronous frame bit needs to be flipped.

MFC after:	3 days
2015-05-19 09:22:06 +00:00
Hans Petter Selasky
2624de5c56 Make the FIFO configuration a bit more flexible for the DWC OTG in
device side mode.
2015-05-18 16:18:04 +00:00
Hans Petter Selasky
4e36e4528c Disable multi process interrupts, because the current code doesn't use
them. Else we can end up in an infinite interrupt loop in USB device
mode.

MFC after:	3 days
2015-04-23 07:41:58 +00:00
Neel Natu
9b0e3c5a47 Modify the return value of the uhci/ehci/xhci PCI probe routines to
'BUS_PROBE_DEFAULT'. This allows bhyve's 'ppt' driver to claim ownership
of the device and pass it through to the guest.

In the common case where there are no competing drivers for USB controllers
this change is a no-op.

Reviewed by:	hselasky
MFC after:	2 weeks
2015-04-13 19:13:51 +00:00
Andrew Turner
8f3ad0f84e Add support for enabling the USB on the Raspberry Pi boards when it hasn't
been done by U-Boot. This allows the USB to work when we load the kernel
directly.

No dma sync is performed after these operations as the data we read/write
is not used by the cpu after the calls to the maimbox driver.

Differential Revision:	https://reviews.freebsd.org/D1940
Reviewed by:	imp, Michal Meloun (meloun AT miracle.cz)
MFC after:	1 Week
Sponsored by:	ABT Systems Ltd
2015-03-08 13:52:07 +00:00
Luiz Otavio O Souza
10defbbd80 Sort and remove unnecessary headers. 2015-03-03 17:20:19 +00:00
Hans Petter Selasky
0c31a8b000 Add quirk for USB 3.0 controllers which don't support 64-bit DMA.
MFC after:	3 days
Submitted by:	Gary Jennejohn <gljennjohn@gmail.com>
2015-03-03 10:21:54 +00:00
Hans Petter Selasky
2ac11c1199 Add quirk to disable 64-bit XHCI DMA after r276717.
Requested by:	Gary Jennejohn <gljennjohn@gmail.com>
MFC after:	3 days
2015-03-02 20:42:06 +00:00
Hans Petter Selasky
bcb1c16516 Ensure that the XHCI driver will refresh the control endpoint settings
when re-enumerating a FULL speed device. Else the wrong max packet
setting might be used when trying to re-enumerate a FULL speed device.

MFC after:	3 days
2015-02-24 08:53:47 +00:00
Hans Petter Selasky
f5757453dc Add support for the DWC OTG v2 chipset found in the STM32F4 series of
processors. Make sure we pullup the data lines in device mode when we
power on the port.

MFC after:	1 week
2015-02-23 17:01:38 +00:00
Hans Petter Selasky
fa592170fe Try to resolve infinite interrupts by clearing an undocumented
interrupt status bit. According to the UHCI controller specification
the host controller halted interrupt is non-maskable.

PR:		156596
Tested by:	adrian @
MFC after:	1 week
2015-02-17 07:52:50 +00:00
Hans Petter Selasky
2d759c8259 Handle VBUS error interrupts.
Submitted by:	SAITOU Toshihide <toshi@ruby.ocn.ne.jp>
PR:		190471
MFC after:	1 week
2015-02-16 15:34:10 +00:00
Hans Petter Selasky
a2a7864564 Fix DMA address casts. Regression issue after r278279.
MFC after:	3 days
2015-02-09 21:47:12 +00:00
Hans Petter Selasky
add9e3e5d3 Section 3.2.9 in the XHCI specification about control transfers says
that we should use a normal-TRB if there are more TRBs extending the
data-stage TRB. Add a dedicated state bit to the internal USB transfer
flags to handle this case.

Reported by:	Kohji Okuno <okuno.kohji@jp.panasonic.com>
MFC after:	1 week
2015-02-02 11:06:41 +00:00
Ian Lepore
4098ccafa4 Revise the arm bus_space implementation to avoid dereferencing the tag on
every operation to retrieve the bs_cookie value almost nothing actually uses.

The bus_space struct contains a private data pointer (poorly named bs_cookie,
now renamed to bs_privdata) which is used only by a few old armv4 xscale
implementations.  The bus_space functions were all defined to take this
value as the first parameter instead of the bus_space_tag_t, requiring all
the inline macro and function expansions to dereference the tag to pass it
to another function, which never uses it.  Now all the functions take the tag
as the first parameter and retrieve the privdata if they need it.

Also fix a couple bus_space_unmap() implementations that were calling
kva_free() instead of pmap_unmapdev().

Discussed with:	   cognet
2015-01-21 01:06:08 +00:00
Hans Petter Selasky
b78e84d132 Resolve a special case deadlock: When two or more threads are
simultaneously detaching kernel drivers on the same USB device we can
get stuck in the "usb_wait_pending_ref_locked()" function because the
conditions needed for allowing detach are not met. The "destroy_dev()"
function waits for all system calls involving the given character
device to return. Character device system calls may lock the USB
enumeration lock, which is also held when "destroy_dev()" is
called. This can sometimes lead to a deadlock not noticed by
WITNESS. The current solution is to ensure the calling thread is the
only one holding the USB enumeration lock and prevent other threads
from getting refs while a USB device detach is ongoing. This turned
out not to be sufficient. To solve this deadlock we could use
"destroy_dev_sched()" to schedule the device destruction in the
background, but then we don't know when it is safe to free() the
private data of the character device. Instead a callback function is
executed by the USB explore process to kill off any leftover USB
character devices synchronously after the USB device explore code is
finished and the USB enumeration lock is no longer locked. This makes
porting easier and also ensures us that character devices must
eventually go away after a USB device detach.

While at it ensure that "flag_iserror" is only written when "priv_mtx"
is locked, which is protecting it.

MFC after:	5 days
2015-01-13 16:37:43 +00:00
Hans Petter Selasky
f880872647 Fix misleading comment.
MFC after:	1 week
Reported by:	rpaulo@
2015-01-08 00:12:54 +00:00
Hans Petter Selasky
8086e9f493 Fix handling of an error case when the MUSB driver is operating in USB
device side mode.

MFC after:	1 week
Reported by:	br@
2015-01-08 00:11:11 +00:00
Hans Petter Selasky
b217d18412 Add 64-bit DMA support in the XHCI controller driver.
- Fix some comments and whitespace while at it.

MFC after:	1 month
Submitted by:	marius@
2015-01-05 20:22:18 +00:00