Commit Graph

17 Commits

Author SHA1 Message Date
John Baldwin
38906aed9a Export pcib_attach() as a "protected" for use in subclasses of the PCI-PCI
bridge driver.
2002-09-06 22:14:00 +00:00
John Baldwin
cea0a89545 Prefer the physical bus number of the PCI bus as the unit of the pciX
device created.
2002-09-06 16:09:07 +00:00
John Baldwin
c6a121ab5e Make the printf messages when routing interrupts more consistent in the
various PCI bridge drivers.
2002-09-05 17:08:35 +00:00
John Baldwin
6f0d58848f Export a few symbols as globals to allow subclassing of this driver. In
OOP speak, you would mark these as 'protected' members.  Specifically:
- Make the pcib_softc struct public so it can be used by subclasses.
- Make pcib_{read,write}_ivar(), pcib_alloc_resource(), pcib_maxslots(),
  and pcib_{read,write}_config() globals that can be used by subclasses.
- Make the pcib devclass a global variable.
- Move most of the pcib_attach() function into a global
  pcib_attach_common() function that can be called by the attach routines
  of subclasses.

Tested on:	i386, alpha, sparc64, ia64
2002-08-26 15:57:08 +00:00
Warner Losh
8961964d97 Fix an edge case wrt membase, but more changes needed 2002-04-13 05:52:35 +00:00
Warner Losh
1efefb2d4d Fix warnings introduced in the PCI_ALLOW_UNSUPPORTED_IO_RANGE case. 2002-02-26 03:31:35 +00:00
Poul-Henning Kamp
6e47a4f646 Allow PCI_ALLOW_UNSUPPORTED_IO_RANGE to leave broken setups broken enough
to work.
2002-02-22 11:21:02 +00:00
Warner Losh
12b8c86eee Put the stard/end adjustments back. They are needed. Also make start
== 0 a special case.  I hope this fixes the real problem that phk and
others were seeing.
2002-02-19 07:05:22 +00:00
Mike Smith
8046c4b998 Don't claim to have routed an interrupt when the method actually returned an
error.
2002-02-12 01:28:49 +00:00
Warner Losh
344284854e Make unsupported memory range message bootverbose only 2002-02-09 21:32:02 +00:00
Warner Losh
d0036d6ebc Remove bogus range restrictions that attempted to restrict the range
of I/O in 1.5.  It looks like I got it right only for some of the
cases.  Instead, allow ISA addresses as a special case.  Most PCI
bridges decode this range.  I need to investigate PCI bridges better
to know if this is always true or not, but for now assume that it is
since that seems to be the most common case.

# We need to allocate addresses better for the pccard stuff...

Submitted by: phk, mitsunaga-san
2002-02-08 07:31:02 +00:00
Warner Losh
7a852c22ce Make PCI_ALLOW_UNSUPPORTED_IO_RANGE an option until the ISA address
problem is fixed at the bridge level.  This is needed for some newer
laptops that have the cardbus bridge not on pci0.
2002-01-15 06:46:59 +00:00
Warner Losh
7eea743ef8 Experimental patch to try to properly clip the range of the memory
request to one that's supported by the bridge.  I'm not 100% sure this
is correct, but it makes it easier for the cardbus bridge to allocate
its memory.

Similar code is needed for the I/O range.  Also, I'm not sure if I
should be doing this based on memory or pmemory (but likely should do
it based on some flag that tells us to prefetch or not).

Talked about a long time ago with: msmith
2001-11-26 07:12:35 +00:00
Brooks Davis
9efaa0ae62 Add a standard hack in the spirit of PCI_ENABLE_IO_MODES to allow systems
with weird PCI-PCI bridge configurations to work.  Defining
PCI_ALLOW_UNSUPPORTED_IO_RANGE causes the sanity checks to pass even
with out of range values.

Reviewed by:	msmith
2001-09-26 01:11:33 +00:00
Mike Smith
8983cfbf27 Next round of PCI subsystem updates:
- Break out the /dev/pci driver into a separate file.
 - Kill the COMPAT_OLDPCI support.
 - Make the EISA bridge attach a bit more like the old code; explicitly
   check for the existence of eisa0/isa0 and only attach if they don't
   already exist.  Only make one bus_generic_attach() pass over the
   bridge, once both busses are attached.  Note that the stupid Intel
   bridge's class is entirely unpredictable.
 - Add prototypes and re-layout the core PCI modules in line with
   current coding standards (not a major whitespace change, just moving
   the module data to the top of the file).
 - Remove redundant type-2 bridge support from the core PCI code; the
   PCI-CardBus code does this itself internally.  Remove the now
   entirely redundant header-class-specific support, as well as the
   secondary and subordinate bus number fields.  These are bridge
   attributes now.
 - Add support for PCI Extended Capabilities.
 - Add support for PCI Power Management.  The interface currently
   allows a driver to query and set the power state of a device.
 - Add helper functions to allow drivers to enable/disable busmastering
   and the decoding of I/O and memory ranges.
 - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some
   places.
 - Make the PCI-PCI bridge code a little more paranoid about valid
   I/O and memory decodes.
 - Add some more PCI register definitions for the command and status
   registers.  Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
Mike Smith
4fa59183f1 - We have access to our own device_t here, so use pci_read_config
rather than finding our parent pcib and using its PCI_READ_CONFIG
   method.

 - Fix the defines for the 32-bit I/O decode registers, and properly
   process the 16-bit versions.  Now we will correctly check that I/O
   resources behind the bridge are going to be decoded.

 - Bring the quirk for the Orion PCI:PCI bridge in here (since it
   seems to want to set the secondary/supplementary bus numbers).

 - Use PCI_SLOTMAX rather than a magic number.
2000-12-12 13:20:35 +00:00
Mike Smith
bb0d0a8efc Next phase in the PCI subsystem cleanup.
- Move PCI core code to dev/pci.
 - Split bridge code out into separate modules.
 - Remove the descriptive strings from the bridge drivers.  If you
   want to know what a device is, use pciconf.  Add support for
   broadly identifying devices based on class/subclass, and for
   parsing a preloaded device identification database so that if
   you want to waste the memory, you can identify *anything* we know
   about.
 - Remove machine-dependant code from the core PCI code.  APIC interrupt
   mapping is performed by shadowing the intline register in machine-
   dependant code.
 - Bring interrupt routing support to the Alpha
   (although many platforms don't yet support routing or mapping
   interrupts entirely correctly).  This resulted in spamming
   <sys/bus.h> into more places than it really should have gone.
 - Put sys/dev on the kernel/modules include path.  This avoids
   having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00