Commit Graph

482 Commits

Author SHA1 Message Date
Ryan Stone
2f5055a9b0 Refactor PCI device creation
Refactor creation of PCI devices into helper methods that can be
used by the VF creation code.

Differential Revision:	https://reviews.freebsd.org/D67
Reviewed by:		jhb
MFC after: 		1 month
Sponsored by:		Sandvine Inc.
2015-03-01 00:39:26 +00:00
John-Mark Gurney
69d4c287d3 remove NULL check as M_WAITOK will not return NULL
Reviewed by:	jhb
Sponsored by:	FreeBSD Foundation
2015-02-16 18:43:52 +00:00
John Baldwin
64de80195b Add a new device control utility for new-bus devices called devctl. This
allows the user to request administrative changes to individual devices
such as attach or detaching drivers or disabling and re-enabling devices.
- Add a new /dev/devctl2 character device which uses ioctls for device
  requests.  The ioctls use a common 'struct devreq' which is somewhat
  similar to 'struct ifreq'.
- The ioctls identify the device to operate on via a string.  This
  string can either by the device's name, or it can be a bus-specific
  address.  (For unattached devices, a bus address is the only way to
  locate a device.)  Bus drivers register an eventhandler to claim
  unrecognized device names that the driver recognizes as a valid address.
  Two buses currently support addresses: ACPI recognizes any device
  in the ACPI namespace via its full path starting with "\" and
  the PCI bus driver recognizes an address specification of
  'pci[<domain>:]<bus>:<slot>:<func>' (identical to the PCI selector
  strings supported by pciconf).
- To make it easier to cut and paste, change the PnP location string
  in the PCI bus driver to output a full PCI selector string rather
  than 'slot=<slot> function=<func>'.
- Add a devctl(3) interface in libdevctl which provides a wrapper around
  the ioctls and is the preferred interface for other userland code.
- Add a devctl(8) program which is a simple wrapper around the requests
  supported by devctl(3).
- Add a device_is_suspended() function to check DF_SUSPENDED.
- Add a resource_unset_value() function that can be used to remove a
  hint from the kernel environment.  This is used to clear a
  hint.<driver>.<unit>.disabled hint when re-enabling a boot-time
  disabled device.

Reviewed by:	imp (parts)
Requested by:	imp (changing PCI location string)
Relnotes:	yes
2015-02-06 16:09:01 +00:00
Marius Strobl
40438c4761 - Make PCI_QUIRK_MSI_INTX_BUG work by using the ID of the actual PCI device
for the lookup.
- For devices affected by PCI_QUIRK_MSI_INTX_BUG, ensure PCIM_CMD_INTxDIS
  is cleared when using MSI/MSI-X.
- Employ PCI_QUIRK_MSI_INTX_BUG for BCM5714(S)/BCM5715(S)/BCM5780(S) rather
  than clearing PCIM_CMD_INTxDIS unconditionally for all devices in bge(4).

MFC after:	3 days
2014-12-27 14:26:18 +00:00
Dmitry Chagin
34b3339810 Revert r274635 as it's completely wrong.
The parent of a pci dev device is a pciX device which do not
implement the PCIB_POWER_FOR_SLEEP method from pcib_if.m.
2014-11-19 11:05:45 +00:00
Dmitry Chagin
91bd62caf5 Use the correct device as the power_for_sleep() method
always pass request up to parent bridge.

Reviewed by:	jhb
MFC after:	1 week
xMFC:		r274386,r274397
2014-11-17 20:25:21 +00:00
Adrian Chadd
2da2ade021 Use the correct device (child) when asking the bus layer about which power
state said device should go into.

This was a snafu introduced in the ACPI/PCI awareness separation.

When putting a device into a power state, the bus (and thus firmware,
eg ACPI) should be asked before hand to check whether the device
can indeed go into that power state.

There's a set of nodes in ACPI under each device - the _SxD nodes - which
state which ACPI power state to put the device into when the system is
going into power save state 'x'.  So when going into S3, the existence
of an _S3D node would override whatever the system was trying to do.

By default the PCI code wants to put devices into D3 before suspending.

I have a laptop here (Asus Zenbook - check the PR) whose EHCI controller
really wants to be in D2 during suspend, not D3.  So if we put it into
D3 and then try to enter S3, everything hangs.  The device itself
can go into D3 - it just can't be there when the call to ACPI to enter
S3 occurs.  The PCI patch fixes this.

jkim@ noticed that the same is needed for the ACPI child device
enumeration.

Thankyou to Matt Dillon (the programmer, not the actor) for buying me
this particular laptop so I could debug the issues with the Atheros
AR9485 that is in it.  It's his fault that I ended up with this
laptop and was sufficiently annoyed by the lack of USB suspend
to go down this rabbit hole.

Tested:

* Thinkpad T400
* Thinkpad X230
* Thinkpad T42
* Thinkpad T60
* Asus Zenbook (see PR)
* Asus EEEPC 701
* Asus EEEPC 1001PX

TODO:

* Figure out what we should do about devices we unload drivers for
  that want to be in a specific state when entering S3 / S4 -
  the "put devices into D3 if they're not bound to a driver" option
  may also mess with things.

PR:		kern/194884
Reviewed by:	jhb, jkim
MFC after:	1 week
Relnotes:	yes
Sponsored by:	Matt Dillon <dillon@apollo.backplane.com> (hardware)
2014-11-11 17:14:11 +00:00
Davide Italiano
2be111bf7d Follow up to r225617. In order to maximize the re-usability of kernel code
in userland rename in-kernel getenv()/setenv() to kern_setenv()/kern_getenv().
This fixes a namespace collision with libc symbols.

Submitted by:   kmacy
Tested by:      make universe
2014-10-16 18:04:43 +00:00
Adrian Chadd
ffcf962dab Add a bus method to fetch the VM domain for the given device/bus.
* Add a bus_if.m method - get_domain() - returning the VM domain or
  ENOENT if the device isn't in a VM domain;
* Add bus methods to print out the domain of the device if appropriate;
* Add code in srat.c to save the PXM -> VM domain mapping that's done and
  expose a function to translate VM domain -> PXM;
* Add ACPI and ACPI PCI methods to check if the bus has a _PXM attribute
  and if so map it to the VM domain;
* (.. yes, this works recursively.)
* Have the pci bus glue print out the device VM domain if present.

Note: this is just the plumbing to start enumerating information -
it doesn't at all modify behaviour.

Differential Revision:	D906
Reviewed by:	jhb
Sponsored by:	Norse Corp
2014-10-09 05:33:25 +00:00
Pyun YongHyeon
dd6d49aad2 Oops, fix typo made in r272729. 2014-10-08 05:53:04 +00:00
Pyun YongHyeon
b19487dff8 Add new quirk PCI_QUIRK_MSI_INTX_BUG to pci(4).
QAC AR816x/E2200 controller has a silicon bug that MSI interrupt
does not assert if PCIM_CMD_INTxDIS bit of command register is set.

Reviewed by:	jhb
2014-10-08 05:34:39 +00:00
Justin Hibbits
a1c1634858 Stage one of multipass suspend/resume
Summary:
Add the beginnings of multipass suspend/resume, by introducing
BUS_SUSPEND_CHILD/BUS_RESUME_CHILD, and move the PCI driver to this.

Reviewers: jhb

Reviewed By: jhb

Differential Revision: https://reviews.freebsd.org/D590
2014-09-23 02:56:40 +00:00
Roger Pau Monné
cd407ca216 pci: add a new pci_child_added newbus method.
This is needed so when running under Xen the calls to pci_child_added
can be intercepted and a custom Xen method can be used to register
those devices with Xen. This should not include any functional
change, since the Xen implementation will be added in a following
patch and the native implementation is a noop.

Sponsored by: Citrix Systems R&D
Reviewed by: jhb

dev/pci/pci.c:
dev/pci/pci_if.m:
dev/pci/pci_private.h:
dev/pci/pcivar.h:
 - Add the pci_child_added newbus method.
2014-08-22 15:05:51 +00:00
Roger Pau Monné
073bf9dd70 pci: make MSI(-X) enable and disable methods of the PCI bus
Make the functions pci_disable_msi, pci_enable_msi and pci_enable_msix
methods of the newbus PCI bus. This code should not include any
functional change.

Sponsored by: Citrix Systems R&D
Reviewed by: imp, jhb
Differential Revision: https://reviews.freebsd.org/D354

dev/pci/pci.c:
 - Convert the mentioned functions to newbus methods.
 - Fix the callers of the converted functions.

sys/dev/pci/pci_private.h:
dev/pci/pci_if.m:
 - Declare the new methods.

dev/pci/pcivar.h:
 - Add helpers to call the newbus methods.

ofed/include/linux/pci.h:
 - Add define to prevent the ofed version of pci_enable_msix from
   clashing with the FreeBSD native version.
2014-08-20 14:57:20 +00:00
Hans Petter Selasky
af3b2549c4 Pull in r267961 and r267973 again. Fix for issues reported will follow. 2014-06-28 03:56:17 +00:00
Glen Barber
37a107a407 Revert r267961, r267973:
These changes prevent sysctl(8) from returning proper output,
such as:

 1) no output from sysctl(8)
 2) erroneously returning ENOMEM with tools like truss(1)
    or uname(1)
 truss: can not get etype: Cannot allocate memory
2014-06-27 22:05:21 +00:00
Hans Petter Selasky
3da1cf1e88 Extend the meaning of the CTLFLAG_TUN flag to automatically check if
there is an environment variable which shall initialize the SYSCTL
during early boot. This works for all SYSCTL types both statically and
dynamically created ones, except for the SYSCTL NODE type and SYSCTLs
which belong to VNETs. A new flag, CTLFLAG_NOFETCH, has been added to
be used in the case a tunable sysctl has a custom initialisation
function allowing the sysctl to still be marked as a tunable. The
kernel SYSCTL API is mostly the same, with a few exceptions for some
special operations like iterating childrens of a static/extern SYSCTL
node. This operation should probably be made into a factored out
common macro, hence some device drivers use this. The reason for
changing the SYSCTL API was the need for a SYSCTL parent OID pointer
and not only the SYSCTL parent OID list pointer in order to quickly
generate the sysctl path. The motivation behind this patch is to avoid
parameter loading cludges inside the OFED driver subsystem. Instead of
adding special code to the OFED driver subsystem to post-load tunables
into dynamically created sysctls, we generalize this in the kernel.

Other changes:
- Corrected a possibly incorrect sysctl name from "hw.cbb.intr_mask"
to "hw.pcic.intr_mask".
- Removed redundant TUNABLE statements throughout the kernel.
- Some minor code rewrites in connection to removing not needed
TUNABLE statements.
- Added a missing SYSCTL_DECL().
- Wrapped two very long lines.
- Avoid malloc()/free() inside sysctl string handling, in case it is
called to initialize a sysctl from a tunable, hence malloc()/free() is
not ready when sysctls from the sysctl dataset are registered.
- Bumped FreeBSD version to indicate SYSCTL API change.

MFC after:	2 weeks
Sponsored by:	Mellanox Technologies
2014-06-27 16:33:43 +00:00
Alexander Motin
e887c1dedf Add IOMMU PCI subclass, found on Tyan S8236 motherboard.
Submitted by:	Dmitry Luhtionov <dmitryluhtionov@gmail.com>
MFC after:	2 weeks
2014-05-20 14:39:22 +00:00
Steven Hartland
8197f45b6a Make uninteresting PCI devices with no attached drivers only print out
on a verbose boot

MFC after:	2 weeks
2014-04-30 16:42:12 +00:00
Ryan Stone
c8912fcbdf Correct a PCI enumeration bug introduced in r264011
Ensure that first_func is set to 0 on every iteration of the PCI slot
enumeration loop after the first.  There is a continue statement that would
cause first_func to stay at 1 any PCI device where slot 0 has no functions
until we find a slot that does have a function.  This would cause us to
not enumerate the first PCI function on the device.

Credit to markj@ for spotting the bug.

X-MFC-With: r264011
2014-04-03 22:32:12 +00:00
Ryan Stone
55d3ea1731 Add support for PCIe ARI
PCIe Alternate RID Interpretation (ARI) is an optional feature that
allows devices to have up to 256 different functions.  It is
implemented by always setting the PCI slot number to 0 and
re-purposing the 5 bits used to encode the slot number to instead
contain the function number.  Combined with the original 3 bits
allocated for the function number, this allows for 256 functions.

This is enabled by default, but it's expected to be a no-op on currently
supported hardware.  It's a prerequisite for supporting PCI SR-IOV, and
I want the ARI support to go in early to help shake out any bugs in it.
ARI can be disabled by setting the tunable hw.pci.enable_ari=0.

Reviewed by:	kib
MFC after:	2 months
Sponsored by:	Sandvine Inc.
2014-04-01 16:02:02 +00:00
Ryan Stone
5605a99e36 Add a method to get the PCI RID for a device.
Reviewed by:	kib
MFC after:	2 months
Sponsored by:	Sandvine Inc.
2014-04-01 15:47:24 +00:00
Ryan Stone
7036ae46bf Revert PCI RID changes.
My PCI RID changes somehow got intermixed with my PCI ARI patch when I
committed it.  I may have accidentally applied a patch to a non-clean
working tree.  Revert everything while I figure out what went wrong.

Pointy hat to: rstone
2014-04-01 15:06:03 +00:00
Ryan Stone
d773f48b1e Add a method to get the PCI Routing ID for a device
Reviewed by:	kib
Sponsored by:	Sandvine, Inc
2014-04-01 14:49:25 +00:00
John Baldwin
4edef187b8 Add support for managing PCI bus numbers. As with BARs and PCI-PCI bridge
I/O windows, the default is to preserve the firmware-assigned resources.
PCI bus numbers are only managed if NEW_PCIB is enabled and the architecture
defines a PCI_RES_BUS resource type.
- Add a helper API to create top-level PCI bus resource managers for each
  PCI domain/segment.  Host-PCI bridge drivers use this API to allocate
  bus numbers from their associated domain.
- Change the PCI bus and CardBus drivers to allocate a bus resource for
  their bus number from the parent PCI bridge device.
- Change the PCI-PCI and PCI-CardBus bridge drivers to allocate the
  full range of bus numbers from secbus to subbus from their parent bridge.
  The drivers also always program their primary bus register.  The bridge
  drivers also support growing their bus range by extending the bus resource
  and updating subbus to match the larger range.
- Add support for managing PCI bus resources to the Host-PCI bridge drivers
  used for amd64 and i386 (acpi_pcib, mptable_pcib, legacy_pcib, and qpi_pcib).
- Define a PCI_RES_BUS resource type for amd64 and i386.

Reviewed by:	imp
MFC after:	1 month
2014-02-12 04:30:37 +00:00
John Baldwin
0070c94be9 Add two tunables to ignore certain firmware-assigned resources. These
are mostly useful for debugging.
- hw.pci.clear_bars ignores all firmware-assigned ranges for BARs when
  set.
- hw.pci.clear_pcib ignores all firmware-assigned ranges for PCI-PCI
  bridge I/O windows when set.

MFC after:	1 week
2014-02-05 20:52:12 +00:00
John Baldwin
b986a7ec18 Simplify pci_reserve_map() by calling resource_list_reserve() to allocate
the resource after creating a resource list entry rather than reimplementing
it by hand.

MFC after:	1 week
2014-02-05 20:47:49 +00:00
John Baldwin
8d280bcbfc Properly set the alignment flags when allocating the initial range for a
BAR.  This only really matters when pci_do_realloc_bars is enabled and
the initial allocation of a specific range fails.

MFC after:	1 week
2014-02-05 19:24:16 +00:00
John Baldwin
84b755dfe5 Add support for displaying VPD for PCI devices via pciconf.
- Store the length of each read-only VPD value since not all values are
  guaranteed to be ASCII values (though most are).
- Add a new pciio ioctl to fetch VPD for a single PCI device.  The values
  are returned as a list of variable length records, one for the device
  name and each keyword.
- Add a new -V flag to pciconf's list mode which displays VPD data for
  each device.

MFC after:	1 week
2014-01-20 20:56:09 +00:00
Konstantin Belousov
c54a713f6a Make pci_get_dma_tag() non-static. Since the function is only
referenced by pointer, making it non-static should not have even the
negligible impact on the existing code.

Reviewed by:	jhb
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
2013-10-24 20:29:29 +00:00
Konstantin Belousov
feb96b46a2 Move the PCI_DMA_BOUNDARY definition into the pcivar.h.
Reviewed by:	jhb
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
2013-10-24 20:21:37 +00:00
John Baldwin
c825d4dc50 Properly handle I/O windows in bridges with the ISA enable bit set. These
beasts still exist unfortunately.  More details can be found in other
references, but the short version is that bridges with this bit set ignore
I/O port ranges that alias to valid ISA I/O port ranges.  In the driver
this requires not allocating these alias regions from the parent device
(so they are free to be acquired by ISA devices), and ensuring no child
devices use resources from these alias regions.
- Change the pcib_window structure to allow for an array of backing
  resources rather than a single resource and update the existing code
  to cope with this.  Some of the coping requires using the saved
  base and limit values in pcib_window instead of using rman operations
  on the backing resource.
- Add special handling for allocating and adjusting the I/O port window
  of an ISA-enabled bridge to only allocate the non-alias ranges and
  add those to the associated resource manager.
- Reject I/O port allocations for a fixed request that conflicts with an
  ISA alias range.
- Remove the "no prefected decode" verbose printf during boot.  The absence
  of a "prefetched decode" line is sufficient.
- Replace the "subtractively decoded bridge" verbose printf with a single
  printf that lists all the "special" decoding modes of a bridge: ISA,
  subtractive, and VGA.
- Add a custom bus_release_resource() method to the PCI bus driver so that
  it can properly free resources for I/O windows of PCI-PCI bridges.
  (These resources are not stored in the bridge device's resource list.)

PR:		misc/179033
MFC after:	2 weeks
2013-07-18 15:17:11 +00:00
Marius Strobl
68e9cbd385 - As it turns out, not only MSI-X is broken for devices passed through by
VMware up to at least ESXi 5.1. Actually, using INTx in that case instead
  may still result in interrupt storms, with MSI being the only working
  option in some configurations. So introduce a PCI_QUIRK_DISABLE_MSIX quirk
  which only blacklists MSI-X but not also MSI and use it for the VMware
  PCI-PCI-bridges. Note that, currently, we still assume that if MSI doesn't
  work, MSI-X won't work either - but that's part of the internal logic and
  not guaranteed as part of the API contract. While at it, add and employ
  a pci_has_quirk() helper.
  Reported and tested by: Paul Bucher
- Use NULL instead of 0 for pointers.

Submitted by:	jhb (mostly)
Approved by:	jhb
MFC after:	3 days
2013-07-09 23:12:26 +00:00
John Baldwin
e35ce1f271 Make detaching drivers from PCI devices more robust. While here, fix a
bug where a PCI device would be powered down if it failed to probe, but
not when its driver was detached (e.g. via kldunload).
- Add a new helper method resource_list_release_active() which forcefully
  releases any active resources of a specified type from a resource list.
- Add a bus_child_detached method for the PCI bus driver which forces any
  active resources to be released (and whines to the console if it finds
  any) and then powers the device down.
- Call pci_child_detached() if we fail to probe a device when a driver
  is kldloaded.  This isn't perfect but can avoid leaking resources
  from a probe() routine in the kldload case.

Reviewed by:	imp, brooks
MFC after:	1 month
2013-06-27 20:21:54 +00:00
John Baldwin
19e1c4d115 Disable hw.pci.realloc_bars by default. It wasn't needed for the original
tester of this fix, and realloc_bars breaks some other cases as a small
BAR that is reallocated can end up grabbing space needed by a much larger
BAR in the existing window of a PCI-PCI bridge.

MFC after:	3 days
2013-06-24 18:30:44 +00:00
John Baldwin
5569a8b8df Revision 233677 broke certain machines. Specifically, if the firmware/BIOS
assigned conflicting ranges to BARs then leaving the BARs alone could
result in one device stealing mmio accesses intended to go to a second
device.  Prior to 233677 the PCI bus driver attempted to handle this case
by clearing the BAR to 0 depending on BARs based at 0 not decoding (which
is not guaranteed to be true).  Now when a conflicting BAR is detected the
following steps are taken:

 1) If hw.pci.realloc_bars (a new tunable) is enabled (default is enabled),
    then ignore the current BAR setting from the firmware and attempt to
    allocate a fresh resource range for the BAR.

 2) If 1) failed (or was disabled), disable decoding for the relevant
    BAR type (e.g. disable mem decoding for a memory BAR) and emit a
    warning if booting verbose.

Tested by:	Alex Keda <admin@lissyara.su>
MFC after:	1 week
2013-05-09 19:24:50 +00:00
Marius Strobl
4495286fb2 - Complete r231621 by also blacklisting the bridge used by VMware for PCIe
devices. While at it, update the comment now that we know that MSI-X
  doesn't work with ESXi 5.1 for Intel 82576 either and the underlying issue
  is a bug in the MSI-X allocation code of the hypervisor.
  Reported by: Harald Schmalzbauer
- Make the nomatch table const.

MFC after:	1 week
2013-03-02 15:54:02 +00:00
Neel Natu
5bf80db676 Remove the quirk to allow use of MSI when the guest is running inside bhyve.
This became redundant after the hostbridge presented to the guest started
advertising the PCI-E capability (r246846).

Obtained from:	NetApp
2013-02-28 01:00:32 +00:00
Neel Natu
a61359a9a6 Add quirk to indicate that the bhyve hostbridge is capable of supporting
MSI and MSI-X even though it does not advertise the PCI-E capability
itself.

Obtained from:	NetApp
2013-01-05 18:48:23 +00:00
Dimitry Andric
29658c96ce Remove duplicate const specifiers in many drivers (I hope I got all of
them, please let me know if not).  Most of these are of the form:

static const struct bzzt_type {
	[...list of members...]
} const bzzt_devs[] = {
	[...list of initializers...]
};

The second const is unnecessary, as arrays cannot be modified anyway,
and if the elements are const, the whole thing is const automatically
(e.g. it is placed in .rodata).

I have verified this does not change the binary output of a full kernel
build (except for build timestamps embedded in the object files).

Reviewed by:	yongari, marius
MFC after:	1 week
2012-11-05 19:16:27 +00:00
Gavin Atkinson
3cdfd8d3b2 The correct generic term for PCIS_STORAGE_NVM is "NVM" not "NVM Express".
Submitted by:	jimharris
MFC after:	6 days
2012-09-20 08:30:17 +00:00
Gavin Atkinson
a5c5eaae8c Recognise NVM Express devices and pretty-print their name.
MFC after:	1 week
2012-09-19 18:22:14 +00:00
Gavin Atkinson
389c8bd51e Align the PCI Express #defines with the style used for the PCI-X
#defines.  This also has the advantage that it makes the names more
compact, iand also allows us to correct the non-uniform naming of
the PCIM_LINK_* defines, making them all consistent amongst themselves.

This is a mostly mechanical rename:
  s/PCIR_EXPRESS_/PCIER_/g
  s/PCIM_EXP_/PCIEM_/g
  s/PCIM_LINK_/PCIEM_LINK_/g

When this is MFC'd, #defines will be added for the old names to assist
out-of-tree drivers.

Discussed with:	jhb
MFC after:	1 week
2012-09-18 22:04:59 +00:00
John Baldwin
d79a477554 Only check to see if a memory resource is a PCI ROM BAR when activating
and deactivating PCI resources.  Previously, if a device had more than
48 MSI interrupts, then activating message 48 (which has a rid == PCIR_BIOS)
would incorrectly try to enable the PCI ROM BAR.

Tested by:	Olivier Cinquin  ocinquin uci edu
MFC after:	3 days
2012-05-23 13:41:12 +00:00
Jung-uk Kim
64d87e5bf2 Fix couple of style nits. 2012-03-29 19:29:24 +00:00
Jung-uk Kim
5757b18266 Revert r233662 and generalize the hack. Writing zero to BAR actually does
not disable it and it is even harmful as hselasky found out.  Historically,
this code was originated from (OLDCARD) CardBus driver and later leaked into
PCI driver when CardBus was newbus'ified and refactored with PCI driver.
However, it is not really necessary even for CardBus.

Reviewed by:	hselasky, imp, jhb
2012-03-29 19:26:39 +00:00
John Baldwin
0d95597ca9 Use a more proper fix for enabling HT MSI mapping windows on Host-PCI
bridges.  Rather than blindly enabling the windows on all of them, only
enable the window when an MSI interrupt is enabled for a device behind
the bridge, similar to what already happens for HT PCI-PCI bridges.

To implement this, each x86 Host-PCI bridge driver has to be able to
locate it's actual backing device on bus 0.  For ACPI, use the _ADR
method to find the slot and function of the device.  For the non-ACPI
case, the legacy(4) driver already scans bus 0 looking for Host-PCI
bridge devices.  Now it saves the slot and function of each bridge that
it finds as ivars that the Host-PCI bridge driver can then use in its
pcib_map_msi() method.

This fixes machines where non-MSI interrupts were broken by the previous
round of HT MSI changes.

Tested by:	bapt
MFC after:	1 week
2012-03-29 19:03:22 +00:00
Hans Petter Selasky
0e8542711a Fix for boot issue: Don't disable BARs on AGP devices. In general:
Don't disable BARs on any PCI display devices, because doing that can
sometimes cause the main memory bus to stop working, causing all
memory reads to return nothing but 0xFFFFFFFF, even though the memory
location was previously written.  After a while a privileged
instruction fault will appear and then nothing more can be debugged.
The reason for this behaviour is unknown.

MFC after:	1 week
2012-03-29 15:33:44 +00:00
Jung-uk Kim
96ec27d42b Add a PCI quirk to ignore PCI map registers from configuration space.
For example, some BIOS for AMD SB600 south bridge may map HPET MMIO base
address as a memory BAR for SMBus controller depending on a PM register
configuration.  Before r231161 (and r232086, subsequent MFC to stable/9),
it was not fatal but hpet(4) just failed to attach.  Since we probe and
attach HPET earlier than PCI devices now, it caused unfortunate hard lockup.
With this patch, it does not hang any more and HPET works at the same time.
Clean up some style nits while I am in the neighborhood.

PR:		kern/165647
Reviewed by:	jhb
MFC after:	3 days
2012-03-14 23:25:46 +00:00
Alexander Kabaev
6e9dcee4ca Save more of config space for PCI Express and PCI-X devices.
Expand pci_save_state and pci_restore_state to save more of
the config state for PCI Express and PCI-X devices. Various
writable control registers are present in PCI Express that
can potentially be lost over suspend/resume cycle.

This change is modeled after similar functionality in Linux.

Reviewed by: wlosh,jhb
MFC after:  1 month
2012-03-08 21:09:34 +00:00