It is required to proceed full cache flush before we can use wait
instruction on multicore, so use nop instead for now.
Submitted by: kan
Sponsored by: DARPA, AFRL
X1000 systems on chips.
Imgtec CI20 and Ingenic CANNA boards supported.
Submitted by: Alexander Kabaev <kan@FreeBSD.org>
Reviewed by: Ruslan Bukin <br@FreeBSD.org>
Sponsored by: DARPA, AFRL