Commit Graph

10 Commits

Author SHA1 Message Date
John Baldwin
2aa1dc7e3b Print CPU informtion later in boot.
Match other architectures and print CPU information during
cpu_startup().  In particular, this prints the information after the
message buffer is initialized which allows it to be retrieved after
boot via dmesg(8).

While here, add some extern declarations to <machine/md_var.h> in
place of duplicated declarations in various source files.

Reviewed by:	brooks
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D24936
2020-05-20 21:16:54 +00:00
Stanislav Galabov
ef4e6c8fe8 Fix access to cpu_model[] in mtk_soc_set_cpu_model()
There may be cases where cpu_model[] may not be 32bit aligned, so it is
better to not try to access it as such in order to avoid unaligned access.

Sponsored by:	Smartcom - Bulgaria AD
2018-11-19 06:48:48 +00:00
Stanislav Galabov
3154bc4680 Implement support for sysctl hw.model for Mediatek/Ralink SoCs
These SoCs have CHIPID registers, which store the Chip model, according
to the manufacturer; make use of those in order to better identify
the chip we're actually running on.

If we're unable to read the CHIPID registers for some reason we will
use the string "unknown " as a value for hw.model.

Reported by:	yamori813@yahoo.co.jp
Sponsored by:	Smartcom - Bulgaria AD
2018-11-16 11:17:18 +00:00
Adrian Chadd
01c914420d [mips] [rt2880] Add oldest Ralink MIPS SOC RT2880 support code.
* Target module have ic plus etherswitch ip175c.
* Also add etherswitch support code on rt driver.

Reviewed by:	mizhka
Differential Revision:	https://reviews.freebsd.org/D10336
2017-05-06 06:20:34 +00:00
Andrew Turner
a61804c095 Use the new ofw_bus_node_is_compatible function in the mips code.
Sponsored by:	ABT Systems Ltd
2016-11-13 09:33:41 +00:00
Stanislav Galabov
9e47d8d22d Ralink: Add more SoC compatible strings
Add more 'compatible' strings found in various LEDE DTS files.

Reviewed by:	adrian
Approved by:	adrian (mentor)
Sponsored by:	Smartcom - Bulgaria AD
Differential Revision:	https://reviews.freebsd.org/D6432
2016-05-19 06:29:43 +00:00
Stanislav Galabov
3378bfdb23 Allow RT3350 CPU clock to be detected as part of RT3050/RT3052 detection
OpenWRT's dts files treat RT3050/RT3052/RT3350 within the same SoC dtsi
file, so we need to distinguish between the three dynamically, mainly
because the bit we use to determine the clock speed on RT3050/RT3052
can actually be floating on RT3350 and RT3350 is always at 320MHz.

Approved by:	adrian (mentor)
Sponsored by:	Smartcom - Bulgaria AD
Differential Revision:	https://reviews.freebsd.org/D5983
2016-04-18 06:15:58 +00:00
Stanislav Galabov
c1300b5e37 Mediatek/Ralink: Get our drivers closer to OpenWRT dts definitions
This revision gets our Mediatek/Ralink drivers closer to OpenWRT's dts
definitions, so we can reuse them with less modifications later in order
to bring support for a lot of boards at once.

Approved by:	adrian (mentor)
Sponsored by:	Smartcom - Bulgaria AD
Differential Revision:	https://reviews.freebsd.org/D5961
2016-04-15 15:24:42 +00:00
Stanislav Galabov
1ccd15cac7 Fix wrong memory mapping
In mtk_soc.c memory is mapped incorrectly for MT7621. This revision fixes
this.

Approved by:	adrian (mentor)
Sponsored by:	Smartcom - Bulgaria AD
Differential Revision:	https://reviews.freebsd.org/D5882
2016-04-08 15:13:38 +00:00
Stanislav Galabov
10998af48d This revision adds the following parts:
- machine dependent low level init code
- SoC clocks detection and some utility functions
- Common interface to read/write/modify SoC system control registers, used
  by some of the other drivers and utility functions
- simple FDT resets support, based on the fdt_clock implementation already
  in the tree. For the moment resets and clocks are managed using these
  implementations. I am planning to port those to the new extres framework
  in the future, but currently I simply don't have time to do this part too.

Approved by:	adrian (mentor)
Sponsored by:	Smartcom - Bulgaria AD
Differential Revision:	https://reviews.freebsd.org/D5826
2016-04-07 11:02:49 +00:00