Commit Graph

5 Commits

Author SHA1 Message Date
Adrian Chadd
5ccb3bf6af Implement the AR933x interrupt driven UART code.
* Enable RX and host interrupts during bus probe/attach
* Disable all interrupts (+ host ISR) during bus detach
* Enable TX DONE interrupt only when we start transmitting; clear it when
  we're done.
* The RX/TX FIFO depth is still conjecture on my part.  I'll fix this
  shortly.
* The TX FIFO interrupt isn't an "empty" interrupt, it's an "almost empty"
  interrupt.  Sigh.  So..
* .. in ar933x_bus_transmit(), wait for the FIFO to drain before
  continuing.

I dislike having to wait for the FIFO to drain, alas.

Tested:

* Atheros AP121 board, AR9331 SoC.

TODO:

* RX/TX overflow, RX error, BREAK support, etc.
* Figure out the true RX/TX FIFO depth.
2013-04-05 00:26:06 +00:00
Adrian Chadd
ae0ac787f2 Implement AR933x polled IO uart bus code.
This implements the bus transmit/receive/sigchg/ipend methods with
a polled interrupt handler (ipend) rather than enabling hardware
interrupts.

The FIFO is faked at 16 bytes deep for now, just so the transmit
IO side doesn't suck too bad (the callout frequency limits how quickly
IO is flushed to the sender, rather than scheduling the callout more
frequently whilst there's active TX.  But I digress.)

Tested:

* Atheros AP121 (AR9330) reference board, booting to multi-user interactive
  mode.
2013-04-04 10:46:33 +00:00
Adrian Chadd
a296efdeeb AR933x CPU device improvements:
* Add baud rate and divisor programming code. See below for more
  information.

* Flesh out ar933x_init() to disable interrupts and program the initial
  console setup.

* Remove #if 0'ed code from ar933x_term().

* Explain what these functions do.

Now, the baud rate and divisor code comes from Linux, as a submission
to the OpenWRT project and Linux kernel from
Gabor Juhos <juhosg@openwrt.org>.

The original ticket for this code is https://dev.openwrt.org/ticket/12031 .

I've contacted Gabor and asked for his permission to also licence the patch
in question (which covers this code) to BSD lience and he's agreed.
Hence why I'm including it here in FreeBSD.

Tested:

* AP121 (AR9330)
2013-03-30 04:31:29 +00:00
Adrian Chadd
8eeea2945d AR933x UART updates:
* Default clock is 25MHz;
* Remove the UART register macro here - it's not needed as we don't need
  to "adjust" the register offset / spacing at all;
* Remove unused fields in the softc.

Tested:

* AP121
2013-03-30 04:13:47 +00:00
Adrian Chadd
308a33172f Bring over the initial, CPU-only UART support for the AR933x SoC.
This implements the kernel glue needed (getc, putc, rxready).

This isn't a 16550 UART, even if the datasheet overview claims so.

The Linux ar933x support was used as a reference, however the uart code
is a reimplementation.

Attentive viewers will note that the uart code is based off of the ns8250
code and the UART bus code is a stubbed-out version of this.  I'll be
replacing it with non-stubbed versions soon, making this a fully featured
driver.

Tested:

* AP121 reference board (AR933x), booting through the mountroot> prompt;
  then doing some basic interactive tests in ddb.
2013-03-28 19:27:06 +00:00