Commit Graph

13 Commits

Author SHA1 Message Date
Marius Strobl
66a79ac95d - Remove the old sparc64 OFW PCI code (as opposed to the former
"options OFW_NEWPCI").
  This is a bit overdue, the new sparc64 OFW PCI code which is
  meant to replace the old one is in place for 10 months and
  enabled by default in GENERIC for 8 months. FreeBSD 5.2 and
  5.2.1 also shipped with the new code enabled by default.
- Some minor clean-up, e.g. remove functions that encapsulated
  the #ifdefs for OFW_NEWPCI, remove unused resp. no longer
  required includes, etc.

Approved by:	tmm, no objections on freebsd-sparc64
2004-05-08 13:53:47 +00:00
Thomas Moestl
1d80cb1b37 Add the new sparc64 OFW PCI framework, conditional on options OFW_NEWPCI
for now. It introduces a OFW PCI bus driver and a generic OFW PCI-PCI
bridge driver. By utilizing these, the PCI handling is much more elegant
now.

The advantages of the new approach are:
- Device enumeration should hopefully be more like on Solaris now,
  so unit numbers should match what's printed on the box more
  closely.
- Real interrupt routing is implemented now, so cardbus bridges
  etc. have at least a chance to work.
- The quirk tables are gone and have been replaced by (hopefully
  sufficient) heuristics.
- Much cleaner code.

There was also a report that previously bogus interrupt assignments
are fixed now, which can be attributed to the new heuristics.

A pitfall, and the reason why this is not the default yet, is that
it changes device enumeration, as mentioned above, which can make
it necessary to change the system configuration if more than one
unit of a device type is present (on a system with two hme cars,
for example, it is possible that hme0 becomes hme1 and vice versa
after enabling the option). Systems with multiple disk controllers
may need to be booted into single user (and require manual specification
of the root file system on boot) to adjust the fstab.
Nevertheless, I would like to encourage users to use this option,
so that it can be made the default soon.

In detail, the changes are:
- Introduce an OFW PCI bus driver; it inherits most methods from the
  generic PCI bus driver, but uses the firmware for enumeration,
  performs additional initialization for devices and firmware-specific
  interrupt routing. It also implements an OFW-specific method to allow
  child devices to get their firmware nodes.
- Introduce an OFW PCI-PCI bridge driver; again, it inherits most
  of the generic PCI-PCI bridge driver; it has it's own method for
  interrupt routing, as well as some sparc64-specific methods (one to
  get the node again, and one to adjust the bridge bus range, since
  we need to reenumerate all PCI buses).
- Convert the apb driver to the new way of handling things.
- Provide a common framework for OFW bridge drivers, used be the two
  drivers above.
- Provide a small common framework for interrupt routing (for all
  bridge types).
- Convert the psycho driver to the new framework; this gets rid of a
  bunch of old kludges in pci_read_config(), and the whole
  preinitialization  (ofw_pci_init()).
- Convert the ISA MD part and the EBus driver to the new way
  interrupts and nodes are handled.
- Introduce types for firmware interrupt properties.
- Rename the old sparcbus_if to ofw_pci_if by repo copy (it is only
  required for PCI), and move it to a more correct location (new
  support methodsx were also added, and an old one was deprecated).
- Fix a bunch of minor bugs, perform some cleanups.

In some cases, I introduced some minor code duplication to keep the
new code clean, in hopes that the old code will be unifdef'ed soon.

Reviewed in part by:	imp
Tested by:	jake, Marius Strobl <marius@alchemy.franken.de>,
		Sergey Mokryshev <mokr@mokr.net>,
		Chris Jackman <cjackNOSPAM@klatsch.org>
Info on u30 firmware provided by:	kris
2003-07-01 14:52:47 +00:00
Thomas Moestl
c944338750 Fix interrupt assignment for non-builtin PCI devices on e450s.
This machine uses a non-standard scheme to specify the interrupts to
be assigned for devices in PCI slots; instead of giving the INO
or full interrupt number (which is done for the other devices in this
box), the firmware interrupt properties contain intpin numbers, which
have to be swizzled as usual on PCI-PCI bridges; however, the PCI host
bridge nodes have no interrupt map, so we need to guess the
correct INO by slot number of the device or the closest PCI-PCI
bridge leading to it, and the intpin.

To do this, this fix makes the following changes:
- Add a newbus method for sparc64 PCI host bridges to guess
  the INO, and glue code in ofw_pci_orb_callback() to invoke it based
  on a new quirk entry. The guessing is only done for interrupt numbers
  too low to contain any IGN found on e450s.
- Create another new quirk entry was created to prevent mapping of EBus
  interrupts  at PCI level; the e450 has full INOs in the interrupt
  properties of EBus devices, so trying to remap them could cause
  problems.
- Set both quirk entries for e450s; remove the no-swizzle entry.
- Determine the psycho half (bus A or B) a driver instance manages
  in psycho_attach()
- Implement the new guessing method for psycho, using the slot number,
  psycho half and property value (intpin).

Thanks go to the testers, especially Brian Denehy, who tested many kernels
for me until I had found the right workaround.

Tested by:	Brian Denehy <B.Denehy@90east.com>, jake, fenner,
		Marius Strobl <marius@alchemy.franken.de>,
		Marian Dobre <mari@onix.ro>
Approved by:	re (scottl)
2003-05-30 20:48:05 +00:00
Jake Burkholder
868aaa93bc Set the cache line size for subordinate pci bridges as well as for their
child devices.  This fixes dma timeouts for devices behind the bridge.

Reported by:	simokawa
Tested by:	simokawa
2003-03-27 02:01:59 +00:00
Warner Losh
a163d034fa Back out M_* changes, per decision of the TRB.
Approved by: trb
2003-02-19 05:47:46 +00:00
Alfred Perlstein
44956c9863 Remove M_TRYWAIT/M_WAITOK/M_WAIT. Callers should use 0.
Merge M_NOWAIT/M_DONTWAIT into a single flag M_NOWAIT.
2003-01-21 08:56:16 +00:00
Thomas Moestl
8286df3339 Initialize the cache line size register of all PCI devices in the
initial setup pass.
2003-01-06 17:12:23 +00:00
Thomas Moestl
ed2f312db5 Reverse the quirk table entry for swizzling on a missing interrupt map;
this is now done on all machines except for some known problematic ones.

Add an additional guard to make sure that the interrupt numbers are
in the correct range before swizzling. This should catch any remaining
models for which the swizzle is inappropriate.

Correct the swizzle calculation to account for the fact that the parent
interrupt numbers to be swizzled are 1-based.

Approved by:	re
2002-12-01 23:06:14 +00:00
Thomas Moestl
8c8a1169df Add two new workaround for firmware anomalies:
1. At least some Netra t1 models have PCI buses with no associated
   interrupt map, but obviously expect the PCI swizzle to be done with
   the interrupt number from the higher level as intpin. In this case,
   the mapping also needs to continue at parent bus nodes.
   To handle that, add a quirk table based on the "name" property of
   the root node to avoid breaking other boxen. This property is now
   retrieved and printed at boot.
2. On SPARCengine Ultra AX machines, interrupt numbers are not mapped
   at all, and full interrupt numbers (not just INOs) are given in
   the interrupt properties. This is more or less cosmetical; the
   PCI interrupt numbers would be wrong, but the psycho resource
   allocation method would pass the right numbers on anyway.

Tested by:	mux (1), Maxim Mazurok <maxim@km.ua> (2)
2002-11-07 16:07:46 +00:00
Thomas Moestl
5fb49f9fd6 Add PCI bus enumeration and latency timer setup to the sparc64 MD PCI
code. Both tasks are not always performed completely by the firmware.
The former is required to get some e450 models to boot; the latter fixes
the repeated fifo underruns with hme(4)s and gem(4)s observed on some
machines (and probably performance problems with other peripherals as
well).
2002-06-12 19:20:57 +00:00
Thomas Moestl
464ae30ee6 Make the OpenFirmware interrupt mapping code more generic, to reduce
the bus-dependent code and to be able to support more systems. The core
of the new code is mostly obtained from NetBSD.
Kluge the interrupt routing methods of the psycho and apb drivers so
that an intline of 0 can be handled for now; real routing is still not
possible (all intline registers are preinitialized instead); this will
require a sparc64-specific adaption of the driver for generic PCI-PCI
bridges with a custom routing method to work right.
2002-03-24 02:11:06 +00:00
Thomas Moestl
95c7d7d47e Don't panic when no interrupt map can be found for a PCI bus; this seems
to happen on some models, like the Netra T1.
2002-02-13 15:44:58 +00:00
Thomas Moestl
9d69e46260 Add support for the Sun psycho/sabre UPA-PCI bridge, some OpenFirmware
PCI support code, and a driver for the Sun APB PCI-PCI bridge.
Partly ported from NetBSD.
2001-11-09 20:19:58 +00:00