Commit Graph

126 Commits

Author SHA1 Message Date
Søren Schmidt
f2972d7eb8 Add support for the Promise command sequencer present on all modern Promise
controllers (PDC203** PDC206**).

This also adds preliminary support for the Promise SX4/SX4000 but *only*
as a "normal" Promise ATA controller (ATA RAID's are supported though
but only RAID0, RAID1 and RAID0+1).

This cuts off yet another 5-8% of the command overhead on promise controllers,
making them the fastest we have ever had support for.

Work is now continuing to add support for this in ATA RAID, to accellerate
ATA RAID quite a bit on these controllers, and especially the SX4/SX4000
series as they have quite a few tricks in there..

This commit also adds a few fixes to the SATA code needed for proper support.
2004-04-13 09:44:20 +00:00
Søren Schmidt
5df3ca789c Use UMA instead of plain malloc for getting ATA request storage.
This gives +10% performance on simple tests, so definitly worth it.
A few percent more could be had by not using M_ZERO'd alloc's, but
we then need to clear fields all over the place to be safe, and
that was deemed not worth the trouble (and it makes life dangerous).
2004-01-14 21:26:35 +00:00
Søren Schmidt
a7a120f649 Overhaul of the timeout/reinit framework. This should clear up most
of the leftovers from the old version that really doesn't work anymore.

Add a reset function for host-end of the ATA channel. This is needed
for the SiI3112 in order to whack it back to reality if a device
locks up the SATA interface (thereby preventing that we can reset the
device). The result is that ATA now recovers from the timeouts that
happens with the SiI3112A and more or less all disks based on old
PATA electronics with a Marvell PATA->SATA converter. This includes
lots of the popular SATA dongles and the WDC Raptor disks..
2004-01-11 22:08:34 +00:00
Søren Schmidt
b437f21e88 Workaround for errata on early versions of the sii3112.
Approved by: re@
2003-11-28 19:01:28 +00:00
Søren Schmidt
80344be509 Fix the DMA problem that most severely hit on the DS3112a SATA chip
in connection with Marvell based SATA->PATA dongles.

The problem was caused by a combination of things working
together to make it hard to spot...

The ATA driver has always started the ATA command, then build
the SG list for DMA and then finally started the DMA engine.
While this is according to specs, it poses a potential
problem as some controllers apparently do not allow for unlimitted
time between starting the ATA command and starting the DMA engine.

At about the same time as ATAng was committed there were lots
of other changes applied, some of which was locking in parts
that causes the busdma load functions to take significantly
longer to load the SG list.

This pushed the time spent between starting the ATA command and
starting the DMA engine over the hill for some controllers
(especially the Silicon Image DS3112a) and caused what looked
like lost interrupts.

The solution is to get all the SG list work or rather all
busdma related stuff done before we even try to start anything.

This has the nice side effect of seperating busdma out the
way it should be, so the working of the ATA machinery is not
cluttered up with busdma droppings, making the code easier
to read and understand.
2003-10-21 19:20:37 +00:00
Søren Schmidt
ebac4a7b77 Give more correct params to busdma_* 2003-10-07 13:48:55 +00:00
Søren Schmidt
6419d0b0e4 Cleanup the dma int/alloc/free code. 2003-08-25 11:13:04 +00:00
David E. O'Brien
aad970f1fe Use __FBSDID().
Also some minor style cleanups.
2003-08-24 17:55:58 +00:00
Søren Schmidt
5fdbb0d222 This is a major rework of the ATA driver (ATAng)
Restructure the way ATA/ATAPI commands are processed, use a common
ata_request structure for both. This centralises the way requests
are handled so locking is much easier to handle.

The driver is now layered much more cleanly to seperate the lowlevel
HW access so it can be tailored to specific controllers without touching
the upper layers. This is needed to support some of the newer
semi-intelligent ATA controllers showing up.

The top level drivers (disk, ATAPI devices) are more or less still
the same with just corrections to use the new interface.

Pull ATA out from under Gaint now that locking can be done in a sane way.

Add support for a the National Geode SC1100. Thanks to Soekris engineering
for sponsoring a Soekris 4801 to make this support.

Fixed alot of small bugs in the chipset code for various chips now
we are around in that corner anyways.
2003-08-24 09:22:26 +00:00
Warner Losh
4fbd232c86 Prefer new location of pci include files (which have only been in the
tree for two or more years now), except in a few places where there's
code to be compatible with older versions of FreeBSD.
2003-08-22 05:54:52 +00:00
Scott Long
f6b1c44d1f Mega busdma API commit.
Add two new arguments to bus_dma_tag_create(): lockfunc and lockfuncarg.
Lockfunc allows a driver to provide a function for managing its locking
semantics while using busdma.  At the moment, this is used for the
asynchronous busdma_swi and callback mechanism.  Two lockfunc implementations
are provided: busdma_lock_mutex() performs standard mutex operations on the
mutex that is specified from lockfuncarg.  dftl_lock() is a panic
implementation and is defaulted to when NULL, NULL are passed to
bus_dma_tag_create().  The only time that NULL, NULL should ever be used is
when the driver ensures that bus_dmamap_load() will not be deferred.
Drivers that do not provide their own locking can pass
busdma_lock_mutex,&Giant args in order to preserve the former behaviour.

sparc64 and powerpc do not provide real busdma_swi functions, so this is
largely a noop on those platforms.  The busdma_swi on is64 is not properly
locked yet, so warnings will be emitted on this platform when busdma
callback deferrals happen.

If anyone gets panics or warnings from dflt_lock() being called, please
let me know right away.

Reviewed by:	tmm, gibbs
2003-07-01 15:52:06 +00:00
Søren Schmidt
1b39bd2412 Third round of updates to the ATA driver.
More DMA cleanups, including fix for breakage on older Promise controllers.

Add more ways of getting to the ATA registers.
2003-04-07 14:12:12 +00:00
Søren Schmidt
566cf07a7c Second round of updates to the ATA driver.
Clean up the DMA interface too much unneeded stuff crept in with
the busdma code back when.

Modify the ATA_IN* / ATA_OUT* macros so that resource and offset
are gotten from a table. That allows for new chipsets that doesn't
nessesarily have things ordered the good old way. This also removes
the need for the wierd PC98 resource functions.

Tested on: i386, PC98, Alpha, Sparc64
2003-03-29 13:37:09 +00:00
Søren Schmidt
bb5bdd386e First round off updates/fixes to the ATA driver.
This moves all chipset specific code to a new file 'ata-chipset.c'.
Extensive use of tables and pointers to avoid having the same switch
on chipset type in several places, and to allow substituting various
functions for different HW arch needs.
Added PIO mode setup and all DMA modes.
Support for all known SiS chipsets. Thanks to Christoph Kukulies for
sponsoring a nice ASUS P4S8X SiS648 based board for this work!

Tested on:	i386, PC98, alpha and sparc64
2003-02-20 20:02:32 +00:00
Søren Schmidt
7fc7425df3 Small change to the previous commit, zero out the 48BIT flag in ata_command
instead of in dmadone.
2003-01-19 20:18:07 +00:00
Søren Schmidt
188869473d Add support for the ServerWorks CSB6.
The support for the 3'rd channel is only experimental.
2003-01-19 13:03:20 +00:00
Søren Schmidt
15fa4bd593 Fix the 48bit access support for the older Promise 66/100 controllers, the
first attempt was wrong and could cause r/w timeouts.

Add yet another Promise PCI id.
2003-01-19 11:47:32 +00:00
Søren Schmidt
2768d40bf1 Fix typo
PR: 45375
2003-01-09 13:54:07 +00:00
Søren Schmidt
4b4f97ae4c Add support for the nVidia nForce2 ATA part.
Fix support for the nForce1 as well, registers are offset 0x10
against the AMD/VIA parts.
2003-01-08 16:51:41 +00:00
Søren Schmidt
837832bc18 Add code that works around the problem that the older Promise
controllers (ultra/fasttrak-66/100) fails on 48bit accesses.
2003-01-08 10:03:31 +00:00
Søren Schmidt
8ba4488cea Add support for the PC98 platform to the ATA driver.
This mostly consists of functionality to serialize accesses to
the two ATA channels (which can also be used to "fix" certain
PCI based controllers).
Add support for Acard controllers.
Enable the ATA driver in PC98 GENERIC, and add device hints.
Update man page with latest support.

The PC98 core team has kindly provided me with a PC98
machine that made this all possible, thanks to all that
contributed to that effort, without that this would
probably newer have been possible..

Approved by: re@
2002-12-03 20:20:44 +00:00
Søren Schmidt
26cc243d90 Add yet another Promise PCI id. 2002-10-01 15:21:09 +00:00
Poul-Henning Kamp
c6ff03e2df Remove unused #includes: <sys/disk.h> <sys/devicestat.h> and <sys/sysctl.h>
Sponsored by:	DARPA & NAI Labs.
Approved by:	sos
2002-09-20 18:08:57 +00:00
Søren Schmidt
cea0b8e060 Add support for the VIA 8235.
Submitted by: Jason Dambrosio <jason@wiz.cx>
2002-09-18 09:39:37 +00:00
Poul-Henning Kamp
2f11d560cc remove #includes of <sys/bio.h> where not needed. 2002-09-14 18:59:32 +00:00
Søren Schmidt
a7089c2c4c Add preliminary mostly untested support for the Silicon Image Sil680 chip. 2002-09-12 15:25:59 +00:00
John Baldwin
c584bd8f63 Add PCI ID for the ICH4 ATA100 controller.
Sponsored by:	The Weather Channel
2002-07-19 22:14:54 +00:00
Søren Schmidt
098d258d05 Add yet another (older) Promise chip 2002-06-19 12:26:20 +00:00
Mike Barcroft
a30d4b3270 Move the new byte order function prototypes from <sys/param.h> to
<sys/endian.h>.  This puts us in line with NetBSD and OpenBSD.
2002-04-26 22:48:23 +00:00
Søren Schmidt
091a610ac9 Fix the breakage of tagged queueing that the busdma integration
introduced. Since its now only possible to have one DMA control
block at a time, we move the setup to dmastart instead.
2002-04-18 19:11:45 +00:00
Søren Schmidt
4ec627a3eb Add support for the nVIDIA nForce ATA controller.
Collapse the VIA/AMD/nVIDIA support code into one, they are
created more or less equal anyway..
2002-04-16 08:30:51 +00:00
Søren Schmidt
5b93eb04a9 Add yet another chip ID for a Promise TX2 chip. 2002-04-11 11:04:23 +00:00
Søren Schmidt
a12b615d49 Add yet another ATA133 Promise chip. 2002-04-07 07:53:34 +00:00
Søren Schmidt
7800211b08 Make the ATA driver compile & work on the sparc64 platform.
Initial work & code by tmm.

Lots of changes and rearrangements by yours truely to make busdma
be a little less a PITA (but I still dont like it).
2002-04-05 13:13:56 +00:00
Søren Schmidt
3eb933c093 Correct the Northbridge test on the new ATA133 VIA's
Misc cosmetics now I'm there.
2002-04-02 16:45:06 +00:00
Søren Schmidt
db9df6ae8f ATA100 is allowed on the HPT chips rev >= 3 2002-03-31 13:33:55 +00:00
Søren Schmidt
38009ef247 Add AMD 768 support. 2002-03-24 12:44:23 +00:00
Søren Schmidt
2c66127540 Add support for the ServerWorks CSB5 chips 2002-03-18 12:13:13 +00:00
Søren Schmidt
fefe430118 Even more Highpoint RAID support.
Fix the 80pin cable detection system.
2002-03-08 21:36:49 +00:00
Søren Schmidt
11de413756 Misc little cleanups:
Link if only ATAPI device in kernel config
Remove unused #includes
Rearrange a bit in ata-raid to make diff against -stable smaller
Enable wc as default again, dunne how this happend...
2002-03-05 09:24:19 +00:00
Søren Schmidt
6f87be981b Major update of the ATA RAID code, part 3:
Add code to properly detach/attach disks that are part of a RAID.

Mark a disk that is attached on an ATA channel belonging to a
RAID as a spare disk that can be used for rebuilding failed RAID1's.

Add support for rebuilding failed RAID1's.

Several fixes to the detach/attach code.

For replacing a disk in a failed RAID1 do the following:

Find the controller channel# of the failed disk.

Exec 'atacontrol detach <channel#>' to free the disk from the system.

Replace the failed disk with a new one of at least the same size.
If your have your disks in drawers/enclosures this can be done with
the system still running.

Exec 'atacontrol attach <channel#>' to add the disk to the system and
mark it as a valid spare for rebuild.

Exec 'atacontrol rebuild <array#>'

The system will rebuild the array on the fly, the array can still
be used during this, although with slower performance.

Please let me know of any problems with this!

Sponsored by: Advanis Inc.

MFC after: 2 weeks
2002-03-03 15:36:21 +00:00
Søren Schmidt
e6f71b525d Add support for the Highpoint HPT372 based cards (rocketraid 133).
HW Sponsored by: Mike Tancsa
2002-02-18 11:57:56 +00:00
Søren Schmidt
d99689e95c Add support for the Cenatek Rocket Drive. 2002-02-12 16:59:28 +00:00
Søren Schmidt
15641a2f41 Add support for the HighPoint HPT374 4 channel ATA chip.
Sponsored by: Isilon Systems.
2002-02-11 15:48:04 +00:00
Søren Schmidt
6ddce9039b Major update of the ATA RAID code, part 1:
Overhaul of the attach/detach code and structures, there were some nasty
bugs in the old implementation. This made it possible to collapse the
ATA/ATAPI device control structures into one generic structure.

A note here, the kernel is NOT ready for detach of active devices,
it fails all over in random places, but for inactive devices it works.
However for ATA RAID this works, since the RAID abstration layer
insulates the buggy^H^H^H^H^H^Hfragile device subsystem from the
physical disks.

Proberly detect the RAID's from the BIOS, and mark critical RAID1
arrays as such, but continue if there is enough of the mirror left
to do so.

Properly fail arrays on a live system. For RAID0 that means return EIO,
and for RAID1 it means continue on the still working part of the mirror
if possible, else return EIO.
If the state changes, log this to the console.

Allow for Promise & Highpoint controllers/arrays to coexist on the
same machine. It is not possible to distribute arrays over different
makes of controllers though.

If Promise SuperSwap enclosures are used, signal disk state on the
status LED on the front.

Misc fixes that I had lying around for various minor bugs.

Sponsored by: Advanis Inc.
2002-02-04 19:23:40 +00:00
Søren Schmidt
684c972cd6 Add support for the Promise TX4.
Rearrange the support for the VIA chips, and add experimental
support for ATA133 on the newest chips.
2002-01-28 13:17:10 +00:00
Søren Schmidt
3afc6bfba4 Add support for even more SiS chipsets.
Misc cosmetics.
2001-12-25 14:44:26 +00:00
John Baldwin
c8e555ec14 Fix comment for the SiS 645 chipset to be 645 instead of 635. 2001-12-19 01:23:32 +00:00
Søren Schmidt
ae22ec847b Adjust the timings for the SiS chips a bit, also add the SiS 645.
Cosmetics on the Acer chips (print right modes)
2001-12-14 21:28:49 +00:00
Søren Schmidt
7c5a0723d7 Initial support for the newer SiS chipsets, based on docs we finally
got from SiS.

This should also close PR 32421 which has patches which seem
to set the timing registers wrongly according to SiS...
2001-12-02 10:48:52 +00:00