Commit Graph

124 Commits

Author SHA1 Message Date
Adrian Chadd
569fa65ddd Call the DDR FIFO flush method when IP2 interrupts occur. 2011-04-30 11:56:04 +00:00
Adrian Chadd
41426ac408 Flip off debugging for now. 2011-04-30 11:40:31 +00:00
Adrian Chadd
d7fc7abf5a Add some initial PCIe bridge support for the AR724x chipsets.
This is reported to work on the AR7240 based Ubiquiti Rocket M5
but I haven't tested it on that hardware. I also don't yet have
it fully working on the AR7242 based development board here;
probe/attach functions but the register space resource looks like
the endian-ness is wrong (0x10000000 instead of 0x00001000).o

Further digging will be required.

Submitted by:	Luiz Otavio O Souza
2011-04-30 11:36:16 +00:00
Adrian Chadd
af0167995c In preparation for the AR724x PCIe bus code, make the AR71xx PCI bus
glue require 'device ar71xx_pci' .

Users of the AR71xx board configs will now require this for functioning
PCI:

device pci
device ar71xx_pci
2011-04-30 11:28:21 +00:00
Adrian Chadd
bb21522438 Add a missing DDR FIFO method for the ar71xx. 2011-04-30 02:31:56 +00:00
Adrian Chadd
f0fb75ebd2 Tidy up the naming of the ip2 DDR flush routine, and add an inline
accessor method (which is currently unused) in there.
2011-04-29 06:25:11 +00:00
Adrian Chadd
c746f80ee3 Add the IP2 DDR flush handlers.
These aren't yet used in the interrupt handler path but should be.
2011-04-28 11:13:26 +00:00
Hans Petter Selasky
b0a5e05f62 We don't need to call EOWRITE4(sc, EHCI_USBINTR, 0) directly from each EHCI
bus driver at detach, hence ehci_detach() does exactly this since r199718.

Submitted by:	Luiz Otavio O Souza
MFC after:	7 days
Approved by:	thompsa (mentor)
2011-04-12 07:49:11 +00:00
Adrian Chadd
a043f08ec2 if_arge has had a strange bug that only appears during high traffic
levels. TX would hang, RX wouldn't. A bit of digging showed the interface
send queue was full, but IFF_DRV_OACTIVE was clear and the hardware TX
queue was empty.

It turns out that there wasn't a check to drain the interface send
queue once hardware TX had completed, so if the interface send queue
had filled up in the meantime, subsequent packets would be dropped
by the higher layers and if_start (and thus arge_start()) would never
be called.

The fix is simple - call arge_start_locked() in the software interrupt
handler after the hardware TX queue has been handled or a TX underrun
occured. This way the interface send queue gets drained.
2011-04-05 06:46:07 +00:00
Adrian Chadd
85df7b525a * Add some more debugging to if_arge
* Make doubly sure that IFF_DRV_OACTIVE is set if the hardware TX queue is full
2011-04-05 06:33:35 +00:00
Adrian Chadd
ef2732b2ee Put the ARGE_DEBUG behind a kernel config option. 2011-04-05 05:29:10 +00:00
Adrian Chadd
ce1d8cf9e0 Begin fleshing out a functioning debugging setup for if_arge.
I'm seeing TX hangs when doing large amounts of TX traffic;
an interface reset fixes it. This will hopefully help me identify
why.
2011-04-05 05:15:48 +00:00
Hans Petter Selasky
3ea3537594 - Correct EHCI interrupt disabling at detach.
Submitted by:	Luiz Otavio O Souza
MFC after:	7 days
Approved by:	thompsa (mentor)
2011-04-03 20:17:49 +00:00
Adrian Chadd
77ae677e4a Add in some missing flags in the EHCI initialisation code,
needed to get USB working on the AR913x/AR724x.
2011-04-03 14:34:28 +00:00
Adrian Chadd
0b11462b7d A handful of the openwrt devices use a MAC address that's at a hard-coded
offset in the flash.

Some devices (eg the TPLink WR-1043ND) don't have a flash environment
partition which can be queried for the current board settings.

This particular workaround allows for image creators to use a hint
to set the base MAC address. For example:

hint.arge.0.eeprommac=0x1f01fc00
2011-04-02 03:48:15 +00:00
Adrian Chadd
eab9f72a5a Implement AR724x USB initialisation code.
This (again) still requires an offset for the AR913x/AR724x before USB will
function.

Submitted by: Luiz Otavio O Souzau <loos.br@gmail.com>
2011-03-31 02:36:22 +00:00
Adrian Chadd
3c14a0e3fb The previous commit didn't completely rename this to what it should be. 2011-03-28 09:10:59 +00:00
Adrian Chadd
01754fac52 Refactor out the ar71xx mac address code into something that's
just for Redboot.

At some point we're going to need to build options for different
boot environments - for example, the UBoot setups I've seen simply
have the MAC address hard-coded at a fixed location in flash.
The OpenWRT support simply yanks the if_arge MAC directly from that
in code, rather than trying to find a uboot environment to pull it
from.
2011-03-27 13:55:35 +00:00
Adrian Chadd
c720b9bd9e Add an option - AR71XX_REALMEM - which overrides the amount of
memory detected from Redboot, or overrides the "otherwise" case
if no Redboot information was found.

Some AR71XX platforms don't use Redboot (eg TP-LINK devices using
UBoot; some later Ubiquiti devices which apparently also use
UBoot) and at least one plain out lies - the Ubiquiti LS-SR71A
Redboot says there's 16mb of RAM when in fact there's 32mb.

A more "clean" solution will be needed at a later date.
2011-03-27 08:44:27 +00:00
Adrian Chadd
83d59d21b5 Add some missing flags needed for AR913x/AR724x USB to correctly operate.
The AR913x/AR724x USB lives at a different offset to the AR71xx
USB, so this needs to be either adjusted for in a subsequent
commit, or updated in hints for kernels compiled for those
platforms.

Submitted by: Luiz Otavio O Souzau <loos.br@gmail.com>
2011-03-27 08:32:47 +00:00
Adrian Chadd
23dcc4c655 * Add wireless MAC reset, in prep for bringing over AR9130 support.
* Whilst I'm here, reformat to fit inside 80 characters.
2011-03-13 08:46:58 +00:00
Adrian Chadd
c55baa23d8 Add the missing AR724x DDR flush routines for if_arge0.
Submitted by: Luiz Otavio O Souza
2011-03-13 08:36:57 +00:00
Adrian Chadd
85a5701186 Fix the TX underrun status reset; remove a now unused variable.
Submitted by: Luiz Otavio O Souza
2011-03-13 08:34:14 +00:00
Adrian Chadd
2b60eabf75 Commit FIFO configuration fixes from OpenWRT. This fixes performance
issues with if_arge on the AR913x and AR724x.

Reference: https://dev.openwrt.org/ticket/6754
Submitted by: Luiz Otavio O Souza
2011-03-13 08:28:21 +00:00
Adrian Chadd
8779d9c963 Add missing ar91xx definition for the WMAC reset control. 2011-01-09 06:17:46 +00:00
Oleksandr Tymoshenko
99629fa36d - Populate dump_avail with proper values from phys_avail 2010-12-09 07:01:03 +00:00
Warner Losh
161b83b959 Remove the 'machine mips' from DEFAULTS. Put the proper 'machine mips
mipsel' or 'machine mips mipseb' into the config file (with a few 64's
tossed in for good measure).  This will let us build the proper
kernels with different worlds as part of make universe.
2010-11-13 22:34:12 +00:00
Marius Strobl
d6c65d276e Converted the remainder of the NIC drivers to use the mii_attach()
introduced in r213878 instead of mii_phy_probe(). Unlike r213893 these
are only straight forward conversions though.

Reviewed by:	yongari
2010-10-15 15:00:30 +00:00
Oleksandr Tymoshenko
8c01516d7e - Fix values of CS1_EN and CS2_EN flags
- Unbreak kernel build by fixing naming convention of
    GPIO_FUNC flags

Spotted by: Luiz Otavio O Souza, Andrew Thompson
2010-09-29 23:06:41 +00:00
Oleksandr Tymoshenko
da5c5453e7 AR71XX_GPIO_* defines were introduced by adrian@ a while ago,
remove duplicated.
2010-09-29 21:01:16 +00:00
Oleksandr Tymoshenko
0dfca27f07 Add AR71XX GPIO bus driver. 2010-09-28 03:31:34 +00:00
Andrew Thompson
08e58cc093 Make a note of which platforms the mac strings come from.
Suggested by:	adrian
2010-09-17 01:13:48 +00:00
Andrew Thompson
3441a301f2 Use getenv to find the mac address since it could be in the bootloader
environment or command line and under different names.
2010-09-17 01:09:12 +00:00
Andriy Gapon
3d844eddb7 bus_add_child: change type of order parameter to u_int
This reflects actual type used to store and compare child device orders.
Change is mostly done via a Coccinelle (soon to be devel/coccinelle)
semantic patch.
Verified by LINT+modules kernel builds.

Followup to:	r212213
MFC after:	10 days
2010-09-10 11:19:03 +00:00
Adrian Chadd
813b73a5a9 Migrate if_arge to use the PLL cpuops.
This has been lightly tested on the AR7161 and AR9132.
2010-08-19 16:29:08 +00:00
Adrian Chadd
303fea5cdc Implement PLL generalisation in preparation for use in if_arge.
* Add a function to write to the relevant PLL register
* Break out the PLL configuration for the AR71XX into the CPU ops,
  lifted from if_arge.c.
* Add the AR91XX PLL configuration ops, using the AR91XX register
  definitions.
2010-08-19 16:25:15 +00:00
Adrian Chadd
44c5dea1d8 add the PLL set functions to cpuops 2010-08-19 16:15:30 +00:00
Adrian Chadd
88e08e7ce6 Fix mistaken indenting. 2010-08-19 12:52:49 +00:00
Adrian Chadd
c4df93502d Add some initial AR724X chipset support.
This is untested but should at least allow an AR724X to boot.

The current code is lacking the detail needed to expose the PCIe bus.
It is also lacking any NIC, PLL or flush/WB code.
2010-08-19 11:53:55 +00:00
Adrian Chadd
f3135331c6 Add initial Atheros AR91XX support.
This works well enough to bring a system up to single-user mode
using an MDROOT.

Known Issues:

* The EHCI USB doesn't currently work and will panic the kernel during
  attach.
* The onboard ethernet won't work until the PLL routines have been
  fleshed out and shoe-horned into if_arge.
* The WMAC device glue (and quite likely the if_ath support)
  hasn't yet been implemented.
2010-08-19 11:40:10 +00:00
Adrian Chadd
c2ddd1eef7 Add missing licence. 2010-08-19 11:18:50 +00:00
Adrian Chadd
8d19ed7cbc style(9) pick from imp@ . 2010-08-19 11:16:52 +00:00
Adrian Chadd
292899c376 Remove now unused 'reg'. 2010-08-19 02:15:39 +00:00
Adrian Chadd
6f96ebf309 Initialise the USB system using cpuops rather than the AR71XX specific method. 2010-08-19 02:14:53 +00:00
Adrian Chadd
1d11005672 Migrate the CPU reset path to use the new cpuops. 2010-08-19 02:12:04 +00:00
Adrian Chadd
5b877d30b5 Remove the now-unused DDR flush register value. 2010-08-19 02:10:05 +00:00
Adrian Chadd
23f10186b5 Make the PCI initialisation path use the new cpuops rather than directly
programming the reset register.
2010-08-19 02:05:16 +00:00
Adrian Chadd
fd11fd075a Make if_arge use the new cpuops rather than hard coding the DDR flush registers. 2010-08-19 02:04:35 +00:00
Adrian Chadd
70bd9230d1 Preparation work for supporting the AR91xx and AR724x.
* Implement a SoC probe function, from Linux, which determines the
  SoC family, type and revision. This only probes the AR71xx series
  SoC and (currently) panics on others.

* Migrate some of the AR71XX specific hardware init (USB device, determining
  system frequencies) into using the cpuops introduced in an earlier commit.
  Other SoC specific hardware stuff (per-device flush/WB, GPIO pin wiring,
  Ethernet PLL setup, other things I've likely missed) will be introduced in
  subsequent commits.

Reviewed by:	imp@
Obtained from:	(partially) Linux
2010-08-19 02:03:12 +00:00
Adrian Chadd
5429211e0a Add a DDR flush function, inspired by both Linux and if_arge.c. 2010-08-18 09:11:45 +00:00