Commit Graph

3141 Commits

Author SHA1 Message Date
Justin Hibbits
937e8f20af powerpc/pmap: Minor optimizations to 64-bit booke pmap
Don't recalculate the VM page of the page table pages, just pass them down
to free.  Also, use the pmap's page zero function instead of bzero().
2019-08-08 03:18:35 +00:00
Justin Hibbits
8b1531eca8 Fix build from r350622
It helps if my local kernel build has INVARIANTS.
2019-08-06 03:49:40 +00:00
Justin Hibbits
dc825fed55 powerpc/pmap: Simplify Book-E 64-bit page table management
There is no need for the 64-bit pmap to have a fixed number of page table
buffers.  Since the 64-bit pmap has a DMAP, we can effectively have user
page tables limited only by total RAM size.
2019-08-06 03:16:06 +00:00
Justin Hibbits
2b50838563 powerpc: Get 32-bit AIM building with secure-PLT
The last few changes needed before 32-bit AIM builds with secure-PLT with
base GCC.  Because ofwcall32.S and swtch32.S were branching to the GOT it
could not use secure PLT.
2019-08-05 01:37:18 +00:00
Justin Hibbits
69a277d98e powerpc: Enable the BUS_DMA_NOCACHE flag handling
The flag handling was committed commented out 7 years ago.  It works, and is
needed for LinuxKPI-based DRM drivers.

Also mark a local as potentially unusable, as it's only really used when KTR
is enabled.

Submitted by:	mmacy
2019-08-04 19:25:23 +00:00
Justin Hibbits
84ce4f0375 powerpc/powernv: Fix OPAL cfgread/cfgwrite error handling
Freeze clearing needs to heppen any time OPAL reads return either an error
(except OPAL_HARDWARE), AND any time it returns 0xff for all bytes.

For cfgwrite, any error that's not OPAL_HARDWARE should be cleaned up.
2019-08-03 01:55:51 +00:00
Justin Hibbits
0effb2ccf3 powerpc/powernv: Only clear EEH freeze for some errors
Only clear an EEH freeze if an error occurs.  However, if an OPAL_HARDWARE
error is returned, this indicates a hardware failure which cannot be
unfrozen, and instead needs a hardware reset.  Attempting to unfreeze a
broken PCH will result in console spam for each attempt.  To avoid the spam,
just don't do it.
2019-08-01 03:59:25 +00:00
Justin Hibbits
be01018809 powerpc64/mmu: Use a SLIST for the PVO delete list, instead of a RB_TREE
Summary:
Although it's convenient to reuse the pvo_plist for deletion, RB_TREE
insertion and removal is not free, and can result in a lot of extra work
to rebalance the tree.  Instead, use a SLIST as a LIFO delete queue,
which gives us almost free insertion, deletion, and traversal.

Reviewed by:	luporl
Differential Revision: https://reviews.freebsd.org/D21061
2019-08-01 03:55:58 +00:00
Leandro Lupori
6962841780 powerpc: Improve pvo allocation code
Added allocation retry loop in alloc_pvo_entry(), to wait for
memory to become available if the caller specifies the M_WAITOK flag.

Also, the loop in moa64_enter() was removed, as moea64_pvo_enter()
never returns ENOMEM. It is alloc_pvo_entry() memory allocation that
can fail and must be retried.

Reviewed by:	jhibbits
Differential Revision:	https://reviews.freebsd.org/D21035
2019-07-25 15:27:05 +00:00
Justin Hibbits
7c382eea30 powerpc/pmap64: Make moea64 statistics optional
Summary:
It turns out statistics accounting is very expensive in the pmap driver,
and doesn't seem necessary in the common case.  Make this optional
behind a MOEA64_STATS #define, which one can set if they really need
statistics.

This saves ~7-8% on buildworld time on a POWER9.

Found by bdragon.

Reviewed by:	luporl
Differential Revision: https://reviews.freebsd.org/D20903
2019-07-25 03:47:27 +00:00
Justin Hibbits
b75bd60a04 powerpc: Unbreak 64-bit pmap from 350206
oldpvo is never explicitly NULL'd by moea64_pvo_enter(), so don't check for
NULL to do anything, only check error.

PR:		239372
Reported by:	Francis Little
2019-07-22 22:59:50 +00:00
Justin Hibbits
5db86748b5 powerpc64/mmu: Make moea64_pvo_enter() return if an entry already exists
Summary:
Instead of searching for a PVO entry before adding, take advantage of
the fact that RB_INSERT() returns NULL if it inserts, and the existing entry if
an entry exists, without inserting a new entry.  This saves an extra tree
traversal in the cases where the PVO does not exist.

Reviewed by:	luporl
Differential Revision: https://reviews.freebsd.org/D20944
2019-07-22 03:11:54 +00:00
Justin Hibbits
b982c7ee20 powerpc: Remove an unnecessary #ifdef guard from slb.c
slb.c is only compiled for powerpc64, so no need for the #ifdef in this block.
2019-07-21 03:19:54 +00:00
Justin Hibbits
cafceaebea powerpc/SPE: Enable SPV bit for EFSCFD instruction emulation
EFSCFD (floating point single convert from double) emulation requires saving
the high word of the register, which uses SPE instructions.  Enable the SPE
to avoid an SPV Unavailable exception.

MFC after:	1 week
2019-07-20 18:22:01 +00:00
Justin Hibbits
8d00d89228 powerpc: Fix casueword(9) post-r349951
'=' asm constraint marks a variable as write-only.  Because of this, gcc
throws away the initialization of 'res', causing garbage to be returned if
the CAS was successful.  Use '+' to mark res as read/write, so that the
initialization stays in the generated asm.  Also, fix the reservation
clearing stwcx store index register in casueword32, and only do the dummy
store when needed, skip it if the real store has already succeeded.
2019-07-16 03:55:27 +00:00
John Baldwin
c18ca74916 Don't pass error from syscallenter() to syscallret().
syscallret() doesn't use error anymore.  Fix a few other places to permit
removing the return value from syscallenter() entirely.
- Remove a duplicated assertion from arm's syscall().
- Use td_errno for amd64_syscall_ret_flush_l1d.

Reviewed by:	kib
MFC after:	1 month
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D2090
2019-07-15 21:25:16 +00:00
Justin Hibbits
07b57507c9 powerpc64/pmap: No need for moea64_pvo_remove_from_page_locked() wrapper
The only consumer of moea64_pvo_remove_from_page_locked() already has the
page in hand, so there is no need to search for the page while holding the
lock.  Drop the wrapper, and rename _moea64_pvo_remove_from_page_locked().

Reported by:	alc
2019-07-13 03:39:46 +00:00
Justin Hibbits
a7e6ec601a powerpc64/pmap: Reduce scope of PV_LOCK in remove path
Summary:
Since the 'page pv' lock is one of the most highly contended locks, we
need to try to do as much work outside of the lock as we can.  The
moea64_pvo_remove_from_page() path is a low hanging fruit, where we can
do some heavy work (PHYS_TO_VM_PAGE()) outside of the lock if needed.
In one path, moea64_remove_all(), the PV lock is already held and can't
be swizzled, so we provide two ways to perform the locked operation, one
that can call PHYS_TO_VM_PAGE outside the lock, and one that calls with
the lock already held.

Reviewed By: luporl
Differential Revision: https://reviews.freebsd.org/D20694
2019-07-13 03:02:11 +00:00
Justin Hibbits
21e47be25e Set pcpu curpmap for powerpc64
Summary:
If an illegal instruction is encountered on a process running on a
powerpc64 kernel it would attempt to sync the cache before retrying the
instruction "just in case".  However, since curpmap is not set, when
moea64_sync_icache() attempts to lock the pmap, it's locking on a NULL pointer,
triggering a panic.  Fix this by adding a (assumed unnecessary) fallback to
curthread's pmap in moea64_sync_icache().

Reported by:	alfredo.junior_eldorado.org.br
Reviewed by:	luporl, alfredo.junior_eldorado.org.br
Differential Revision: https://reviews.freebsd.org/D20911
2019-07-13 00:19:57 +00:00
Konstantin Belousov
30b3018d48 Provide protection against starvation of the ll/sc loops when accessing userpace.
Casueword(9) on ll/sc architectures must be prepared for userspace
constantly modifying the same cache line as containing the CAS word,
and not loop infinitely.  Otherwise, rogue userspace livelocks the
kernel.

To fix the issue, change casueword(9) interface to return new value 1
indicating that either comparision or store failed, instead of relying
on the oldval == *oldvalp comparison.  The primitive no longer retries
the operation if it failed spuriously.  Modify callers of
casueword(9), all in kern_umtx.c, to handle retries, and react to
stops and requests to terminate between retries.

On x86, despite cmpxchg should not return spurious failures, we can
take advantage of the new interface and just return PSL.ZF.

Reviewed by:	andrew (arm64, previous version), markj
Tested by:	pho
Reported by:	https://xenbits.xen.org/xsa/advisory-295.txt
Sponsored by:	The FreeBSD Foundation
MFC after:	2 weeks
Differential revision:	https://reviews.freebsd.org/D20772
2019-07-12 18:43:24 +00:00
Justin Hibbits
9ac516a6f1 powerpc: Only worry about the lower 32 bits of SP in a 32-bit process
Summary:
Running a 32-bit process on a 64-bit POWER CPU may still use all 64-bits
in calculations, while ignoring the upper 32 bits for addressing
storage.  It so happens that some processes end up with r1 (SP) having
bit 31 set in some cases (33-bit address).  Writing out to this 33-bit
address obviosly fails.  Since the CPU ignores the upper bits, we should
as well.

sendsig() and cpu_fetch_syscall_args() appear to be the only functions
that actually rely on userspace register values for copy in/out, and
cpu_fetch_syscall_args() doesn't seem to be bitten in practice yet.

Reviewed By: luporl
Differential Revision: https://reviews.freebsd.org/D20896
2019-07-11 03:29:25 +00:00
Leandro Lupori
8b55f9f853 [PPC64] pseries: fix realmaxaddr calculation
On POWER9/pseries, QEMU passes several regions of memory,
instead of a single region containing all memory, as the
code was expecting.

Reviewed by:	jhibbits
Differential Revision:	https://reviews.freebsd.org/D20857
2019-07-10 13:36:17 +00:00
Justin Hibbits
b51bfc30ac powerpc: Clamp 32-bit binaries to 32-bit MAXUSER
sv_maxuser specifies the maximum addressable space for user space.  Presently
this is all 64-bits worth, which is impossible for a 32-bit process.

This bug has existed since the initial import of powerpc64 in 2010.

MFC after:	2 weeks
2019-07-10 04:09:15 +00:00
Mark Johnston
eeacb3b02f Merge the vm_page hold and wire mechanisms.
The hold_count and wire_count fields of struct vm_page are separate
reference counters with similar semantics.  The remaining essential
differences are that holds are not counted as a reference with respect
to LRU, and holds have an implicit free-on-last unhold semantic whereas
vm_page_unwire() callers must explicitly determine whether to free the
page once the last reference to the page is released.

This change removes the KPIs which directly manipulate hold_count.
Functions such as vm_fault_quick_hold_pages() now return wired pages
instead.  Since r328977 the overhead of maintaining LRU for wired pages
is lower, and in many cases vm_fault_quick_hold_pages() callers would
swap holds for wirings on the returned pages anyway, so with this change
we remove a number of page lock acquisitions.

No functional change is intended.  __FreeBSD_version is bumped.

Reviewed by:	alc, kib
Discussed with:	jeff
Discussed with:	jhb, np (cxgbe)
Tested by:	pho (previous version)
Sponsored by:	Netflix
Differential Revision:	https://reviews.freebsd.org/D19247
2019-07-08 19:46:20 +00:00
Leandro Lupori
54fdf3bf19 [PPC] Add missing SLB allocation KASSERT
Although PPC SLB code doesn't handle allocation failures,
which are rare, in most places it asserts that the pointer
returned by uma_zalloc() is not NULL, making it easier to
identify the failure and avoiding an invalid pointer dereference.

This change simply adds a missing KASSERT in SLB code.
2019-07-08 13:01:54 +00:00
Leandro Lupori
57d0d4a271 [PPC64] pseries llan: fix MAC address
There was an issue in pseries llan driver, that resulted in the first 2 bytes
of the MAC address getting stripped, and the last 2 being always 0.

In most cases the network interface still worked, despite the MAC being
different of what was specified to QEMU, but when some other host or DHCP
server expected a specific MAC, this would fail.

This change fixes this by shifting right by 2 the local-mac-address read from
device tree, if its length is 6 instead of 8, as observed in QEMU DT, that
always presents a 6 bytes value for this property.

PR:		237471
Reported by:	Alfredo Dal'Ava Junior
Reviewed by:	jhibbits
Differential Revision:	https://reviews.freebsd.org/D20843
2019-07-04 12:31:24 +00:00
Justin Hibbits
088c26aee8 powerpc/booke: Handle misaligned floating point loads/stores as on AIM
Misaligned floating point loads and stores are already handled for AIM, but
use the DSISR to obtain the necessary data.  Book-E does not have the DSISR,
so these fixups are not performed, leading to a SIGBUS on misaligned FP
loads or stores.  Obtain the necessary data on the Book-E side, similar to
how is done for SPE.

MFC after:	1 week
2019-06-26 01:14:39 +00:00
Justin Hibbits
f62da49b2f powerpc: Transition to Secure-PLT, like most other OSs
Summary:
PowerPC has two PLT models: BSS-PLT and Secure-PLT.  BSS-PLT uses runtime
code generation to generate the PLT stubs.  Secure-PLT was introduced with
GCC 4.1 and Binutils 2.17 (base has GCC 4.2.1 and Binutils 2.17), and is a
more secure PLT format, using a read-only linkage table, with the dynamic
linker populating a non-executable index table.

This is the libc, rtld, and kernel support only.  The toolchain and build
parts will be updated separately.

Reviewed By: nwhitehorn, bdragon, pfg
Differential Revision: https://reviews.freebsd.org/D20598
MFC after:	1 month
2019-06-25 00:40:44 +00:00
Conrad Meyer
c363b16c63 sys: Remove DEV_RANDOM device option
Remove 'device random' from kernel configurations that reference it (most).
Replace perhaps mistaken 'nodevice random' in two MIPS configs with 'options
RANDOM_LOADABLE' instead.  Document removal in UPDATING; update NOTES and
random.4.

Reviewed by:	delphij, markm (previous version)
Approved by:	secteam(delphij)
Differential Revision:	https://reviews.freebsd.org/D19918
2019-06-21 00:16:30 +00:00
Nathan Whitehorn
4d210a60c3 Fix bug on newbus device deletion: we should delete the child's devinfo
on deletion, not the parent's.

MFC after:	3 weeks
2019-06-16 21:56:45 +00:00
Brandon Bergren
664104b4af Fix PPC970 boot after r348783
r348783 changed the behavior of the kernel mappings and broke booting on G5.

- Split the kernel mapping logic out so that the case where we are
running from the wrong memory space is handled using identity
mappings, and the case where we are not using a DMAP is handled by
forcibly mapping the kernel into the dmap range as intended by
r348783.

Reported by:	Mikael Urankar
Reviewed by:	luporl
Approved by:	jhibbits (mentor)
Differential Revision:	https://reviews.freebsd.org/D20608
2019-06-12 15:58:11 +00:00
Leandro Lupori
49f10b5181 [PPC] Fix build error when POWERNV is disabled
When building a kernel supporting PSERIES but not POWERNV,
the compiler would complain about an error variable being
possibly used before being initialized.

In practice, however, this should never happen. In any case, it
is now initialized to an error value.
2019-06-11 11:23:15 +00:00
Leandro Lupori
5d8c3a0657 [PPC64] Fix ofw_initrd
Before this change, OFW initrd (as md) handling code was simulating an ofwbus
device. But as there isn't really a Device Tree (DT) node representing OFW
initrd (it is specified in 2 properties under /chosen), its driver was in fact
stealing other driver's DT node.  This was noticed after MD_ROOT_MEM became
default and QEMU's USB keyboard stopped working under VNC.

This change consists in simplifying the process of detection and mapping of
initrd memory, turning it into a simple startup step, instead of trying to
simulate a device.

Reviewed by:	jhibbits
Differential Revision:	https://reviews.freebsd.org/D20553
2019-06-11 11:16:41 +00:00
Justin Hibbits
fdb916d53e powernv: Port HMI handler to use the message framework
When an HMI occurs a message event also gets created with the details of the
exception.  Hook into the messaging framework to retrieve the HMI message.
Nothing is done with it yet, except to panic on unhandled exception.
2019-06-10 03:24:38 +00:00
Justin Hibbits
f433dab2de powerpc/powernv: Reduce the scope of the sensor guarding mutex
vmem_xalloc() cannot be called while holding a nonblocking mutex, warned
by WITNESS.  The lock may not be necessary in general, but it avoids
superfluous concurrent OPAL calls for the same sensor.

Reported by:	pkubaj
2019-06-10 03:16:55 +00:00
Justin Hibbits
988d63af1c powerpc/pmap: Move the SLB spill handlers to a better place
The SLB spill handlers are AIM-specific, and belong better with the rest of
the SLB code anyway.  No functional change.
2019-06-08 03:07:08 +00:00
Justin Hibbits
b7918b86b3 powerpc/aim: Use nitems() for calculating size of phys_avail in AIM pmaps
Same thing was already done in r347164 for Book-E pmap.
2019-06-08 02:36:07 +00:00
Leandro Lupori
b934fc7468 [PPC64] Support QEMU/KVM pseries without hugepages
This set of changes make it possible to run FreeBSD for PowerPC64/pseries,
under QEMU/KVM, without requiring the host to make hugepages available to the
guest.

While there was already this possibility, by means of setting hw_direct_map to
0, on PowerPC64 there were a couple of issues/wrong assumptions that prevented
this from working, before this changelist.

Reviewed by:	jhibbits
Differential Revision:	https://reviews.freebsd.org/D20522
2019-06-07 17:58:59 +00:00
Justin Hibbits
4420fc895f powerpc/moea: Fix moea64 native VA invalidation
Summary:
moea64_insert_pteg_native()'s invalidation only works by happenstance.
The purpose of the shifts and XORs is to extract the VSID in order to
reverse-engineer the lower bits of the VPN.  Currently a segment size is 256MB
(2**28), and ADDR_API_SHFT64 is 16, so ADDR_PIDX_SHIFT is equivalent.  However,
it's semantically incorrect, in that we don't want to shift by the page shift
size, we want to shift to get to the VSID.

Tested by:	bdragon
Differential Revision: https://reviews.freebsd.org/D20467
2019-06-01 01:40:14 +00:00
Justin Hibbits
8cd3016c00 powerpc64/pmap: Reapply r334235 to OEA64 pmap, clearing HID0_RADIX
This was lost in the re-merger of ISA3 MMU into moea64_native.
2019-05-25 04:56:06 +00:00
Piotr Kubaj
57557e714e Add snd_hda(4) to GENERIC64 used by powerpc64.
amd64 also has snd_hda(4) in GENERIC.

Approved by:	jhibbits (src committer), linimon (mentor)
2019-05-24 20:01:59 +00:00
Leandro Lupori
d3f78f00db Make options MD_ROOT_MEM default on PPC64
Having this option enabled by default on PowerPC64 kernels makes
booting ISO images much easier when on PowerNV.

With it, the ISO may simply be given to the -i flag of kexec.
Better yet, the ISO may be loop mounted on PetitBoot and its
kernel may be used to load itself.

Without this option, booting ISOs on remote PPC64 machines usually
involve preparing a separate kernel, with this option enabled.
2019-05-24 18:41:31 +00:00
Justin Hibbits
702818d200 powerpc/mpc85xx: Use the proper (EREF) form of writing to DBCR0
DBCR0, according to the Freescale EREF, is guaranteed to be updated, and
changes take effect, after an isync plus change of MSR[DE] from 0 to 1.
Otherwise it's guaranteed to be updated "eventually".  Use the expected
synchronization sequence to write it for resetting.

This prevents "Reset failed" from being printed immediately before the CPU
resets.

MFC after:	2 weeks
2019-05-23 03:47:25 +00:00
Justin Hibbits
72e58595b1 powerpc/booke: It helps to set variables before using them
Actually set the source and destination VA's before using them.  Fixes a
bizarre panic on 32-bit Book-E.  Not sure why this wasn't caught by the
compiler.
2019-05-23 03:40:48 +00:00
Leandro Lupori
0632bb89db Fix PPC64 kernel build with clang8 + lld8
This patch fixes the following lld link errors:

- unsupported dynamic relocations on read-only sections
- out-of-range TOC references

Submitted by:	git_bdragon.rtk0.net
Reviewed by:	jhibbits, luporl
MFC after:	2 weeks
Differential Revision:	https://reviews.freebsd.org/D19352
2019-05-22 15:56:41 +00:00
Justin Hibbits
b4b2e7a7b9 powerpc/booke: Use wrtee instead of msr to restore EE bit
The MSR[EE] bit does not require synchronization when changing.  This is a
trivial micro-optimization, removing the trailing isync from mtmsr().

MFC after:	1 week
2019-05-22 02:43:17 +00:00
Conrad Meyer
e2e050c8ef Extract eventfilter declarations to sys/_eventfilter.h
This allows replacing "sys/eventfilter.h" includes with "sys/_eventfilter.h"
in other header files (e.g., sys/{bus,conf,cpu}.h) and reduces header
pollution substantially.

EVENTHANDLER_DECLARE and EVENTHANDLER_LIST_DECLAREs were moved out of .c
files into appropriate headers (e.g., sys/proc.h, powernv/opal.h).

As a side effect of reduced header pollution, many .c files and headers no
longer contain needed definitions.  The remainder of the patch addresses
adding appropriate includes to fix those files.

LOCK_DEBUG and LOCK_FILE_LINE_ARG are moved to sys/_lock.h, as required by
sys/mutex.h since r326106 (but silently protected by header pollution prior
to this change).

No functional change (intended).  Of course, any out of tree modules that
relied on header pollution for sys/eventhandler.h, sys/lock.h, or
sys/mutex.h inclusion need to be fixed.  __FreeBSD_version has been bumped.
2019-05-20 00:38:23 +00:00
Justin Hibbits
c3acaec564 powerpc: Fix moea64 pmap from 347952
vm_paddr_t is only 32 bits on AIM32 (currently), causing a build failure with
the shifting.

MFC after:	2 weeks
MFC with:	r347952
2019-05-18 14:55:59 +00:00
Justin Hibbits
a57ec59f9c powerpc64/pmap: NUMA-ize the page pv lock pool to reduce contention
It was found during building llvm that the page pv lock pool was seeing very
high contention.  Since the pmap is already NUMA aware, it was surmised that
the domains were referencing similar pages in the different domains.  This
reduces contention to the point of noise in a lockstat(8) run (~51% down to
under 5%), reducing build times by up to 20%.

This doesn't do a perfect domain alignment, just a best-guess based on
hardware available, that the domain is roughly specified in the upper bits
of the PA.  Trying to be more clever would more than likely result in
reduced performance just on the work needed.

MFC after:	2 weeks
2019-05-18 11:14:43 +00:00
Brooks Davis
9e774e5340 FCP-101: Remove bm(4).
Relnotes:	yes
FCP:		https://github.com/freebsd/fcp/blob/master/fcp-0101.md
Reviewed by:	jhb, imp
Differential Revision:	https://reviews.freebsd.org/D20230
2019-05-17 15:20:51 +00:00