Commit Graph

362 Commits

Author SHA1 Message Date
Hans Petter Selasky
56d6361d92 Limit the number of times we loop inside the DWC OTG poll handler to
avoid starving other fast interrupts. Fix a comment while at it.

MFC after:	1 week
Suggested by:	Svatopluk Kraus <onwahe@gmail.com>
2015-07-31 09:12:31 +00:00
Hans Petter Selasky
ed0ed9b424 Optimise the DWC OTG host mode driver's receive path:
Remove NAKing limit and pause IN and OUT transactions for 125us in
case of NAK response for BULK and CONTROL endpoints. This gets the
receive latency down and improves USB network throughput at the cost
of some CPU usage.

MFC after:	1 month
2015-07-28 07:30:07 +00:00
Marius Strobl
43bc87c459 - Move the remainder of host controller capability registers reading from
xhci_start_controller() to xhci_init(). These values don't change at run-
  time so there's no point of acquiring them on every USB_HW_POWER_RESUME
  instead of only once during initialization. In r276717, reading the first
  couple of registers in question already had been moved as a prerequisite
  for the changes in that revision.
- Identify ASMedia ASM1042A controllers.
- Use NULL instead of 0 for pointers.

MFC after:	3 days
2015-07-27 15:26:50 +00:00
Hans Petter Selasky
a529288d65 Optimise the DWC OTG host mode driver's transmit path:
1) Use the TX FIFO empty interrupts to poll the transmit FIFO usage,
instead of using own software counters and waiting for SOF
interrupts. Assume that enough FIFO space is available to execute one
USB OUT transfer of any kind when the TX FIFO is empty.

2) Use the host channel halted event to asynchronously wait for host
channels to be disabled instead of waiting for SOF interrupts. This
results in less turnaround time for re-using host channels and at the
same time increases the performance.

The network transmit performance measured by "iperf" for the "RPi-B v1
2011/12" board, increased from 45MBit/s to 65Mbit/s after applying the
changes above.

No regressions seen using:
 - High Speed (BULK, CONTROL, INTERRUPT)
 - Full Speed (All transfer types)
 - Low Speed (Control and Interrupt)

MFC after:	1 month
Submitted by:	Daisuke Aoyama <aoyama@peach.ne.jp>
2015-07-16 16:08:40 +00:00
Hans Petter Selasky
b4df5b00f2 Fix for control endpoint handling in the DWC OTG driver. The data
stage processing is only allowed after the setup complete event has
been received. Else a race may occur and the OUT data can be corrupted.
While at it ensure resetting a FIFO has the required wait loop.

MFC after:	3 days
2015-06-02 17:40:52 +00:00
Hans Petter Selasky
68691fe0ce Fix for DWC OTG device side isochronous transfers. The even or odd
isochronous frame bit needs to be flipped.

MFC after:	3 days
2015-05-19 09:22:06 +00:00
Hans Petter Selasky
2624de5c56 Make the FIFO configuration a bit more flexible for the DWC OTG in
device side mode.
2015-05-18 16:18:04 +00:00
Hans Petter Selasky
4e36e4528c Disable multi process interrupts, because the current code doesn't use
them. Else we can end up in an infinite interrupt loop in USB device
mode.

MFC after:	3 days
2015-04-23 07:41:58 +00:00
Neel Natu
9b0e3c5a47 Modify the return value of the uhci/ehci/xhci PCI probe routines to
'BUS_PROBE_DEFAULT'. This allows bhyve's 'ppt' driver to claim ownership
of the device and pass it through to the guest.

In the common case where there are no competing drivers for USB controllers
this change is a no-op.

Reviewed by:	hselasky
MFC after:	2 weeks
2015-04-13 19:13:51 +00:00
Andrew Turner
8f3ad0f84e Add support for enabling the USB on the Raspberry Pi boards when it hasn't
been done by U-Boot. This allows the USB to work when we load the kernel
directly.

No dma sync is performed after these operations as the data we read/write
is not used by the cpu after the calls to the maimbox driver.

Differential Revision:	https://reviews.freebsd.org/D1940
Reviewed by:	imp, Michal Meloun (meloun AT miracle.cz)
MFC after:	1 Week
Sponsored by:	ABT Systems Ltd
2015-03-08 13:52:07 +00:00
Luiz Otavio O Souza
10defbbd80 Sort and remove unnecessary headers. 2015-03-03 17:20:19 +00:00
Hans Petter Selasky
0c31a8b000 Add quirk for USB 3.0 controllers which don't support 64-bit DMA.
MFC after:	3 days
Submitted by:	Gary Jennejohn <gljennjohn@gmail.com>
2015-03-03 10:21:54 +00:00
Hans Petter Selasky
2ac11c1199 Add quirk to disable 64-bit XHCI DMA after r276717.
Requested by:	Gary Jennejohn <gljennjohn@gmail.com>
MFC after:	3 days
2015-03-02 20:42:06 +00:00
Hans Petter Selasky
bcb1c16516 Ensure that the XHCI driver will refresh the control endpoint settings
when re-enumerating a FULL speed device. Else the wrong max packet
setting might be used when trying to re-enumerate a FULL speed device.

MFC after:	3 days
2015-02-24 08:53:47 +00:00
Hans Petter Selasky
f5757453dc Add support for the DWC OTG v2 chipset found in the STM32F4 series of
processors. Make sure we pullup the data lines in device mode when we
power on the port.

MFC after:	1 week
2015-02-23 17:01:38 +00:00
Hans Petter Selasky
fa592170fe Try to resolve infinite interrupts by clearing an undocumented
interrupt status bit. According to the UHCI controller specification
the host controller halted interrupt is non-maskable.

PR:		156596
Tested by:	adrian @
MFC after:	1 week
2015-02-17 07:52:50 +00:00
Hans Petter Selasky
2d759c8259 Handle VBUS error interrupts.
Submitted by:	SAITOU Toshihide <toshi@ruby.ocn.ne.jp>
PR:		190471
MFC after:	1 week
2015-02-16 15:34:10 +00:00
Hans Petter Selasky
a2a7864564 Fix DMA address casts. Regression issue after r278279.
MFC after:	3 days
2015-02-09 21:47:12 +00:00
Hans Petter Selasky
add9e3e5d3 Section 3.2.9 in the XHCI specification about control transfers says
that we should use a normal-TRB if there are more TRBs extending the
data-stage TRB. Add a dedicated state bit to the internal USB transfer
flags to handle this case.

Reported by:	Kohji Okuno <okuno.kohji@jp.panasonic.com>
MFC after:	1 week
2015-02-02 11:06:41 +00:00
Ian Lepore
4098ccafa4 Revise the arm bus_space implementation to avoid dereferencing the tag on
every operation to retrieve the bs_cookie value almost nothing actually uses.

The bus_space struct contains a private data pointer (poorly named bs_cookie,
now renamed to bs_privdata) which is used only by a few old armv4 xscale
implementations.  The bus_space functions were all defined to take this
value as the first parameter instead of the bus_space_tag_t, requiring all
the inline macro and function expansions to dereference the tag to pass it
to another function, which never uses it.  Now all the functions take the tag
as the first parameter and retrieve the privdata if they need it.

Also fix a couple bus_space_unmap() implementations that were calling
kva_free() instead of pmap_unmapdev().

Discussed with:	   cognet
2015-01-21 01:06:08 +00:00
Hans Petter Selasky
b78e84d132 Resolve a special case deadlock: When two or more threads are
simultaneously detaching kernel drivers on the same USB device we can
get stuck in the "usb_wait_pending_ref_locked()" function because the
conditions needed for allowing detach are not met. The "destroy_dev()"
function waits for all system calls involving the given character
device to return. Character device system calls may lock the USB
enumeration lock, which is also held when "destroy_dev()" is
called. This can sometimes lead to a deadlock not noticed by
WITNESS. The current solution is to ensure the calling thread is the
only one holding the USB enumeration lock and prevent other threads
from getting refs while a USB device detach is ongoing. This turned
out not to be sufficient. To solve this deadlock we could use
"destroy_dev_sched()" to schedule the device destruction in the
background, but then we don't know when it is safe to free() the
private data of the character device. Instead a callback function is
executed by the USB explore process to kill off any leftover USB
character devices synchronously after the USB device explore code is
finished and the USB enumeration lock is no longer locked. This makes
porting easier and also ensures us that character devices must
eventually go away after a USB device detach.

While at it ensure that "flag_iserror" is only written when "priv_mtx"
is locked, which is protecting it.

MFC after:	5 days
2015-01-13 16:37:43 +00:00
Hans Petter Selasky
f880872647 Fix misleading comment.
MFC after:	1 week
Reported by:	rpaulo@
2015-01-08 00:12:54 +00:00
Hans Petter Selasky
8086e9f493 Fix handling of an error case when the MUSB driver is operating in USB
device side mode.

MFC after:	1 week
Reported by:	br@
2015-01-08 00:11:11 +00:00
Hans Petter Selasky
b217d18412 Add 64-bit DMA support in the XHCI controller driver.
- Fix some comments and whitespace while at it.

MFC after:	1 month
Submitted by:	marius@
2015-01-05 20:22:18 +00:00
Hans Petter Selasky
ece4b0bd43 Make a bunch of USB debug SYSCTLs tunable, so that their value(s) can
be set before the USB device(s) are probed.
2015-01-05 15:04:17 +00:00
Hans Petter Selasky
454035ba1b Allow systems having a page size greater than 4K to use fewer
scatter-gather XHCI TRB entries for its payload data. The XHCI
controller can handle at least 65536 bytes per scatter-gather list
entry.

MFC after:	1 week
Suggested by:	Kohji Okuno <okuno.kohji@jp.panasonic.com>
2014-12-30 09:20:29 +00:00
Hans Petter Selasky
91cccb29c1 Add missed flushing of data which can happen when "xhci_configure_mask()"
is called from "xhci_configure_reset_endpoint()". Ensure the 3-strikes
error feature is always enabled except for ISOCHRONOUS transfers.

MFC after:	1 week
Suggested by:	marius@
2014-12-30 08:33:51 +00:00
Marius Strobl
dcf83ff0e9 Improve/fix interrupt allocation/setup/release:
- Simplify MSI allocation to what is actually needed for a single one.
- Release the MSI and the corresponding bus resource as appropriate when
  either the interrupt resource cannot be allocated or setting up the
  interrupt fails.
- Error out when interrupt allocation or setup fails and polling is
  disabled.
- Release the MSI after the corresponding bus resource so the former is
  not leaked on detach.
- Remove a redundant softc member.

MFC after:	3 days
2014-12-27 21:50:47 +00:00
Hans Petter Selasky
979d0afa7c Add port routing support for Wildcat Point.
PR:		195793
MFC after:	1 week
2014-12-08 21:14:13 +00:00
Hans Petter Selasky
654ea8e767 Optimise bit searching loop by using the ffs() function.
Make some related bit shifts unsigned while at it.
2014-12-05 12:07:53 +00:00
Hans Petter Selasky
157675bd2d Optimise the bit searching loops, by quickly skipping the 16 first set
bits if all the 16 first bits are set. This way the worst case
searching time is reduced from 32 to 16 cycles.
2014-12-03 21:55:44 +00:00
Hans Petter Selasky
e93086d0bf Workaround for possible bug in the SAF1761 chip. Wait 125us before
re-using a hardware propritary transfer descriptor, PTD, in USB host
mode. If the PTD's are recycled too quickly, it has been observed that
the hardware simply fails to schedule the requested job or resets
completely disconnecting all devices.
2014-12-03 21:48:30 +00:00
Adrian Chadd
c1a4be0fc0 Add PCI ID for Intel Lynx Point LP controller.
PR:		kern/195398
Submitted by:	grembo
Obtained from:	DragonflyBSD
MFC after:	1 week
2014-11-26 20:34:05 +00:00
Alexander Motin
e67f3bec39 Add bunch of PCI IDs of Intel Wildcat Point (9 Series) chipsets.
MFC after:	1 week
2014-11-26 04:23:21 +00:00
Justin Hibbits
4dc3495501 Add Apple Intrepid USB controller ID.
MFC after:	2 weeks
2014-11-25 06:15:00 +00:00
Hans Petter Selasky
5ada1acc02 Fix the host mode ISOCHRONOUS transfer interval programming in the
SAF1761 OTG driver. Currently the driver logic is very simple and
double buffering the USB transactions is not done.  Also you need to
use an external USB high speed USB HUB for reliable FULL speed
outgoing ISOCHRONOUS traffic, because the internal one chokes on
so-called split transfers above 188 bytes.
2014-11-22 17:26:43 +00:00
Hans Petter Selasky
4f27ddac0e Use correct length mask for split transactions. The hardware would
sometimes put non-zero values in the upper length bits, which are
available for high-speed-only USB transactions, breaking the reception
of data.
2014-11-22 08:47:04 +00:00
Kevin Lo
7eb884645c Add the Intel BayTrail USB device which needs port routing for USB 3.0.
Tested on the BayTrail E3845 platform.
Reviewed by:	hselasky
2014-10-21 07:24:58 +00:00
Hans Petter Selasky
f80ccb40c7 Refine support for disabling USB enumeration to allow device detach
and suspend and resume of existing devices.

MFC after:	2 weeks
2014-10-09 06:24:06 +00:00
Hans Petter Selasky
c38aa2537b Add support for disabling USB enumeration in general or on selected
USB HUBs.

MFC after:	2 weeks
2014-10-08 07:00:50 +00:00
Hans Petter Selasky
30c6f4bac5 Fix XHCI driver for devices which have more than 15 physical root HUB
ports. The current bitmap array was too small to hold more than 16
bits and would at some point toggle the context size, which then would
trigger an enumeration fault and cause a fallback to the EHCI
companion controller, if any.

MFC after:	3 days
2014-10-03 15:58:04 +00:00
Hans Petter Selasky
8b0569ba8f Make sure we always set the maximum number of valid contexts.
MFC after:	3 days
2014-10-02 16:56:00 +00:00
Hans Petter Selasky
a4a51f054d Set default cycle state in case of early interrupts.
MFC after:	3 days
2014-10-01 07:34:49 +00:00
Gavin Atkinson
265f42be76 Move the ARM Samsung s3c2xx0 support files into the samsung directory, to
match other platforms.

Discussed with:	andrew
2014-09-25 11:38:26 +00:00
Hans Petter Selasky
090817577b Some XHCI hardware requires dropping the endpoint context before
adding it again.

MFC after:	3 days
Submitted by:	Kohji Okuno <okuno.kohji@jp.panasonic.com>
2014-09-22 10:21:42 +00:00
Alexander Motin
4255b98bc1 Add IDs for Intel Patsburg USB 2.0 controller. 2014-09-05 07:42:34 +00:00
Hans Petter Selasky
5ec70ad261 - Implement fast interrupt handler to save CPU usage.
- Cleanup some register reads and writes to use existing register
  access macros.
- Ensure code which only applies to the control endpoint is not run
  for other endpoints in the data transfer path.

MFC after:	3 days
2014-08-05 18:48:12 +00:00
Hans Petter Selasky
88e27ba861 - Ensure code which only applies to the control endpoint is not run
for other endpoints in the data transfer path.
- Ensure all bits of the "EPCON" register is written during
initialisation.

MFC after:	3 days
2014-08-05 13:36:26 +00:00
Nick Hibma
7ae432c00d Remove unused defines.
Fix some device_printf's that were missing '\n' at the end or had
speling errors.

PR:		145319
Submitted by:	rozhuk.im gmail.com
2014-08-05 08:24:41 +00:00
Hans Petter Selasky
c65494287f Rename driver name a bit to avoid unit number confusion in dmesg.
MFC after:	3 days
2014-08-05 06:37:07 +00:00