Commit Graph

36 Commits

Author SHA1 Message Date
Scott Long
032b0a17dc Basic MPSAFE locking for the AHC and AHD drivers. 2007-04-17 06:26:25 +00:00
Justin T. Gibbs
ad3d2a4dc5 Use the AHC_DISABLE_PCI_PERR flag to silence parity error reporting on
chips where setting the FAILDIS bit is not effective.  While here,
try again to make it clear that reported parity errors indicate
a failure of some PCI device *other than* the aic7xxx controller.
2005-09-22 05:11:35 +00:00
Warner Losh
098ca2bda9 Start each of the license/copyright comments with /*-, minor shuffle of lines 2005-01-06 01:43:34 +00:00
Justin T. Gibbs
25edba1e56 In the PCI error interrupt handler, specify the width of the PCI configuration
cycle using the correct argument.  The location and width were reversed.

MFC in: 2 days
2004-08-22 14:02:43 +00:00
Justin T. Gibbs
b3b25f2cbf ahc_eisa.c:
ahc_pci.c:
ahd_pci.c:
aic7xxx.c:
aic79xx.c:
aic_osm_lib.c:
aic_osm_lib.h:
	Use common OSM routines from aic_osm_lib for bus dma operations,
	delay routines, accessing CCBs, byte swapping, etc.

aic7xxx_pci.c:
	Provide a better description for the 2915/30LP on attach.

aic7xxx.c:
aic79xx.c:
aic7770.c:
aic79xx_pci.c:
aic7xxx_pci.c:
aic7xxx_93cx6.c:
	Move FBSDID behind an ifdef so that these core files will
	still compile under other OSes.

aic79xx.h:
aic79xx_pci.c:
aic79xx.seq:
	To speed up non-packetized CDB delivery in Rev B, all CDB
	acks are "released" to the output sync as soon as the
	command phase starts.  There is only one problem with this
	approach.  If the target changes phase before all data are
	sent, we have left over acks that can go out on the bus in
	a data phase.  Due to other chip contraints, this only
	happens if the target goes to data-in, but if the acks go
	out before we can test SDONE, we'll think that the transfer
	has completed successfully.  Work around this by taking
	advantage of the 400ns or 800ns dead time between command
	phase and the REQ of the new phase.  If the transfer has
	completed successfully, SCSIEN should fall *long* before we
	see a phase change.  We thus treat any phasemiss that
	occurs before SCSIEN falls as an incomplete transfer.

	aic79xx.h:
		Add the AHD_FAST_CDB_DELIVERY feature.

	aic79xx_pci.c:
		Set AHD_FAST_CDB_DELIVERY for all Rev. B parts.

	aic79xx.seq:
		Test for PHASEMIS in the command phase for
		all AHD_FAST_CDB_DELIVERY controlelrs.

ahd_pci.c:
ahc_pci.c:
aic7xxx.h:
aic79xx.h:
	Move definition of controller BAR offsets to core header files.

aic7xxx.c:
aic79xx.c:
	In the softc free routine, leave removal of a softc from the
	global list of softcs to the OSM (the caller of this routine).
	This allows us to avoid holding the softc list_lock during device
	destruction where we may have to sleep waiting for our recovery
	thread to halt.

ahc_pci.c:
	Use ahc_pci_test_register access to validate I/O mapped in
	addition to the tests already performed for memory mapped
	access.

	Remove unused ahc_power_state_change() function.  The PCI
	layer in both 4.X and 5.X now offer this functionality.

ahd_pci.c:
	Remove reduntant definition of controller BAR offsets.  These
	are also defined in aic79xx.h.

	Remove unused ahd_power_state_change() function.  The PCI
	layer in both 4.X and 5.X now offer this functionality.

aic7xxx.c:
aic79xx.c:
aic79xx.h:
aic7xxx.h:
aic7xxx_osm.c:
aic79xx_osm.c:
	Move timeout handling to the driver cores.  In the case
	of the aic79xx driver, the algorithm has been enhanced
	to try target resets before performing a bus reset.  For
	the aic7xxx driver, the algorithm is unchanged.  Although
	the drivers do not currently sleep during recovery (recovery
	is timeout driven), the cores do expect all processing to
	be performed via a recovery thread.  Our timeout handlers
	are now little stubs that wakeup the recovery thread.

aic79xx.c:
aic79xx.h:
aic79xx_inline.h:
	Change shared_data allocation to use a map_node so
	that the sentinel hscb can use this map node in
	ahd_swap_with_next_hscb.  This routine now swaps
	the hscb_map pointer in additon to the hscb
	contents so that any sync operations occur on
	the correct map.

	physaddr -> busaddr

	Pointed out by: Jason Thorpe <thorpej@wasabisystems.com>

aic79xx.c:
	Make more use of the in/out/w/l/q macros for accessing
	byte registers in the chip.

	Correct some issues in the ahd_flush_qoutfifo() routine.
	    o Run the qoutfifo only once the command channel
	      DMA engine has been halted.  This closes a window
	      where we might have missed some entries.
	    o Change ahd_run_data_fifo() to not loop to completion.
	      If we happen to start on the wrong FIFO and the other
	      FIFO has a snapshot savepointers, we might deadlock.
	      This required our delay between FIFO tests to be
	      moved to the ahd_flush_qoutfifo() routine.
	    o Update/add comments.
	    o Remove spurious test for COMPLETE_DMA list being empty
	      when completing transactions from the GSFIFO with
	      residuals.  The SCB must be put on the COMPLETE_DMA
	      scb list unconditionally.
	    o When halting command channel DMA activity, we must
	      disable the DMA channel in all cases but an update
	      of the QOUTFIFO.  The latter case is required so
	      that the sequencer will update its position in the
	      QOUTFIFO.  Previously, we left the channel enabled
	      for all "push" DMAs.  This left us vulnerable to
	      the sequencer handling an SCB push long after that
	      SCB was already processed manually by this routine.
	    o Correct the polarity of tests involving
	      ahd_scb_active_in_fifo().  This routine returns
	      non-zero for true.

	Return to processing bad status completions through
	the qoutfifo.  This reduces the time that the sequencer
	is kept paused when handling transactions with bad
	status or underruns.

	When waiting for the controller to quiece selections,
	add a delay to our loop.  Otherwise we may fail to wait
	long enough for the sequencer to comply.

	On H2A4 hardware, use the slow slewrate for non-paced
	transfers.  This mirrors what the Adaptec Windows
	drivers do.

	On the Rev B. only slow down the CRC timing for
	older U160 devices that might need the slower timing.
	We define "older" as devices that do not support
	packetized protocol.

	Wait up to 5000 * 5us for the SEEPROM to become unbusy.
	Write ops seem to take much longer than read ops.

aic79xx.seq:
	For controllers with the FAINT_LED bug, turn the diagnostic
	led feature on during selection and reselection.  This covers
	the non-packetized case.  The LED will be disabled for
	non-packetized transfers once we return to the top level idle
	loop.  Add more comments about the busy LED workaround.

	Extend a critical section around the entire
	command channel idle loop process.  Previously
	the portion of this handler that directly manipulated
	the linked list of completed SCBs was not protected.
	This is the likely cause of the recent reports of
	commands being completed twice by the driver.

	Extend critical sections across the test for,
	and the longjump to, longjump routines.  This
	prevents the firmware from trying to jump to
	a longjmp handler that was just cleared by the
	host.

	Improve the locations of several critical section
	begin and end points.  Typically these changes
	remove instructions that did not need to be
	inside a critical section.

	Close the "busfree after selection, but before busfree
	interrupts can be enabled" race to just a single sequencer
	instruction.  We now test the BSY line explicitly before
	clearing the busfree status and enabling the busfree
	interrupt.

	Close a race condition in the processing of HS_MAILBOX
	updates.  We now clear the "updated" status before the
	copy.  This ensures that we don't accidentally clear
	the status incorrectly when the host sneaks in an update
	just after our last copy, but before we clear the status.
	This race has never been observed.

	Don't re-enable SCSIEN if we lose the race to disable SCSIEN
	in our interrupt handler's workaround for the RevA data-valid
	too early issue.

aic79xx_inline.h:
	Add comments indicating that the order in which bytes are
	read or written in ahd_inw and ahd_outw is important.  This
	allows us to use these inlines when accessing registers with
	side-effects.

aic79xx_pci.c:
	The 29320 and the 29320B are 7902 not 7901 based products.
	Correct the driver banner.

aic7xxx.h:
	Enable the use of the auto-access pause feature
	on the aic7870 and aic7880.  It was disabled due
	to an oversight.

aic7xxx.reg:
	Move TARG_IMMEDIATE_SCB to alias LAST_MSG to
	avoid leaving garbage in MWI_RESIDUAL.  This
	prevents spurious overflows whn operating target
	mode on controllers that require the MWI_RESIDUAL
	work-around.

aic7xxx.seq:
	AHC_TMODE_WIDEODD_BUG is a bug, not a softc flag.
	Reference the correct softc field when testing
	for its presence.

	Set the NOT_IDENTIFIED and NO_CDB_SENT bits
	in SEQ_FLAGS to indicate that the nexus is
	invalid in await busfree.

aic7xxx_93cx6.c:
	Add support for the C56/C66 versions of the EWEN and EWDS
	commands.

aic7xxx.c:
aic7xxx_pci.c:
	Move test for the validity of left over BIOS data
	to ahc_test_register_access().  This guarantees that
	any left over CHIPRST value is not clobbered by our
	register access test and lost to the test that was
	in ahc_reset.
2003-12-17 00:02:10 +00:00
Scott Long
ba079c0d9f aic79xx_pci.c:
aic7xxx_pci.c:
	When performing our register test, be careful
	to avoid resetting the chip when pausing the
	controller.  The test reads the HCNTRL register
	and then writes it back with the PAUSE bit
	explicitly set.  If the last write to the controller
	before our probe is to reset it, the CHIPRST
	bit will still be set, so we must mask it off
	before the PAUSE operation.  On some chip versions,
	we cannot access registers for a few 100us after
	a reset, so this inadvertant reset was causing PCI
	errors to occur on the read to check for paused
	status.

Submitted by:	gibbs
2003-09-25 23:36:41 +00:00
John Baldwin
e27951b29c Use PCIR_BAR(x) instead of PCIR_MAPS.
Glanced over by:	imp, gibbs
Tested by:		i386 LINT
2003-09-02 17:30:40 +00:00
David E. O'Brien
aad970f1fe Use __FBSDID().
Also some minor style cleanups.
2003-08-24 17:55:58 +00:00
Justin T. Gibbs
176b648e01 Clear stale PCI errors during our test for
successfully mapping our registers.  This
avoids the disabling of memory mapped I/O
just because some other driver probe happened
to touch our registers.
2003-06-06 23:52:34 +00:00
Justin T. Gibbs
1d528d6792 aic7770.c:
aic79xx.c:
aic79xx.h:
aic79xx_pci.c:
aic7xxx.c:
aic7xxx.h:
aic7xxx_pci.c:
	Switch ah?_reset() to take an additional "reinit" argument.
	Use this instead of init_level to determin if the chip
	should be fully reinitialized after a chip reset.  This
	is required so that ah?_shutdown() can reset the chip
	without side-effects.

aic79xx.c:
	Implement ahd_suspend() and ahd_resume().

aic7xxx.c:
	Change ahc_loadseq() to *not* restart the sequencer.
	This brings the loadseq behavior in line with that
	of the 7902 driver and also simplifies the init routine.

	Correct the resume routine to enable interrupts and
	restart the sequencer.
2003-06-06 23:48:19 +00:00
Justin T. Gibbs
177799b596 This driver supports the 2920C not the 2920.
Make this clear in our card identification string.

PR: kern/50428
Approved by: RE
2003-05-26 21:45:09 +00:00
Justin T. Gibbs
e4e6e6d6ea Fix disabling of PCI parity error interrupts. We need to set
FAILDIS in the SEQCTL register, not the HCNTRL register.

aic7xxx.c:
	Remeber SEQCTL settings in the "seqctl" field of our
	softc.  seqctl defaults to just having FASTMODE set,
	but the bus attachments can override this.

aic7xxx.h:
	Add the seqctl softc field.

aic7xxx_pci.c:
	Update the seqctl softc field and manually update SEQCTL
	when to many PCI errors occur

Approved by: RE
2003-05-26 21:20:47 +00:00
Justin T. Gibbs
3baccea690 Remove stray K&R style function definition.
Approved by: RE
2003-05-26 21:09:15 +00:00
Justin T. Gibbs
9bf327a70c aic7xxx.c:
aic7xxx.h:
	Split out core chip initialization into ahc_chip_init().
	This will allow us to reset the chip correctly at times
	other than initial chip setup.

aic7770.c
aic7xxx_pci.c:
	Flesh out bus chip init methods for our two
	bus attachments and use these, in addition to
	bus suspend/resume hooks to get the core in
	better shape for handling these events.

	When disabling PCI parity error checking, use FAILDIS.
	Although the chip docs indicate that clearing PERRESPEN
	should also work, it does not.

	Auto-disable pci parity error checking after informing
	the user of AHC_PCI_TARGET_PERR_THRESH number of parity
	errors observed as a target.

aic7xxx.h:
aic7xxx_pci.c
aic7770.c
aic7xxx.c
	Add the instruction_ram_size softc field.

	Remove the now unused stack_size softc field.

	Modify ahc_loadseq to return a failure code
	and to actually check the downloaded instruction
	count against the limit set in our softc.

	Modify callers of ahc_loadseq to handle load
	failures as appropriate.

	Set instruction RAM sizes for each chip type.

aic7xxx_pci.c:
	Add some delay in the aic785X termination
	control code.  This may fix problems with
	the 2930.

	Be consistent in how we access config space
	registers.  16bit registers are accessed using
	16bit ops.

aic7xxx.c:
	Correct spelling errors.

	Have ahc_force_renegotiation() take a devinfo as is done
	in the U320 driver.  Use this argument to correct a bug
	in the selection timeout handler where we forced a renegotiation
	with the last device that had set SAVED_SCSIID.  SAVED_SCSIID
	is only updated once a selection is *sucessfull* and so is
	stale for any selection timeout.

	Cleanup the setup of the devinfo for busfree events.  We
	now use this devinfo for a call to ahc_force_renegotiation()
	at the bottom of the routine, so it must be initialized in
	all cases.

	In ahc_pause_and_flushwork(), adjust the loop so that it
	will exit in the hot-eject case even if the INT_PEND mask
	is something other than 0xFF (as it is in this driver).

	Correct a wrapping string constant.

	Call ahc_fini_scbdata() after shutdown so that
	any ahc_chip_init() routine that might access
	SCB data will not access free'd memory.

	Correctly setup our buffer tag to indicate that 39bit
	addressing is available if in 39bit addressing mode.

	Rearrange some variable declarations based on
	type size.

aic7xxx.c
aic7xxx.h:
aic7xxx.reg:
	Consistently use MAX_OFFSET for the user max syncrate
	set from non-volatile storage.  This ensures that the
	offset does not conflict with AHC_OFFSET_UNKNOWN.

	Change AHC_OFFSET_UNKNOWN to 0xFF.  This is
	a value that the curr->offset can never be,
	unlike '0' which we previously used.  This
	fixes code that only checks for a non-zero
	offset to determine if a sync negotiation
	is required since it will fire in the unknown
	case even if the goal is async.

	Change MAX_OFFSET to 0x7f which is the max
	offset U160 aic7xxx controllers can negotiate.
	This ensures that curr->offset will not
	match AHC_OFFSET_UNKNOWN.

aic7xxx_inline.h:
	Have our inline interrupt handler return with a value
	indicating whether we serviced a real interrupt.  This
	is required for Linux support.

	Return earlier if the interrupt is not for us.
2003-05-03 23:55:38 +00:00
Justin T. Gibbs
70b41139c3 aic7xxx.reg:
Add a constant for the controller's stack size and the
	maximum scsi offset.

aic7xxx.seq:
	Style nit.  The source is implied to be the destination
	unless overridden in an "and" instruction.

	Update target mode code for changes in identify seen
	sequencer flags.

aic7xxx_pci.c:
	Ensure that the PCIERRGENDIS bit is set in the
	PCIERRGEN config space register.  Perhaps this
	is a reason for the spurios parity errors reported
	on U160 controllers.

	Honor the AHC_NO_BIOS_INIT flag.

	Allow PCI interrupt reporting to be disabled,
	by clearing the PERRRESEN bit in the command
	register.  This option is now enabled via a new
	softc flag: AHC_DISABLE_PCI_PERR.

	Disable SERR and pause the controller prior to performing
	our mmapped I/O test.  This should handle the case of
	controllers that do not "auto-access pause".  For legacy
	controllers, use SCB ram instead of scratch ram since
	the latter may contain settings left over from the BIOS
	that we will use if an seeprom is not found.

	Make use of new ahc_inl/outl() inlines.

aic7xxx.h:
	Reformat a few comments to follow driver style.

	Add a controller flags that indicate that a controller
	has not been initialized by the BIOS and whether to
	disable PCI parity errors..

	Remove stack probing softc members.

	Add a few more syncrate constants that are useful in speed
	fallback calculations.

	Add the SHOW_MASKED_ERRORS debug flag.

aic7xxx.h:
aic7xxx.c:
	Implement the SCB_SILENT flag.  This is useful for
	hushing up the driver during DV or other operations
	that we expect to cause transmission errors.  The
	messages will still print if the SHOW_MASKED_ERRORS
	debug option is enabled.

aic7xxx_inline.h:
	Implement ahc_[in|out][w|l|q].  This removes the need
	for manual 'or and shift" type operations throughout
	the driver.

aic7xxx.c:
	Move SELTO dignostic so that the SCB is still valid
	when we use it for printing path information.

	If we are narrow, limit syncrate to Ultra2.

	Don't clobber ppr_options when forcing a renegotiation.
	The current ppr_options may be referenced while queuing
	new commands.  Don't set our width to unknown when forcing
	negotiation on narrow controllers.  This will confuse the
	negotiation code into negotiating with a wide message on
	narrow controllers.

	Add an "asserting atn" diagnostic with controller/target
	information.

	Remove the probe_stack code.  The stack is always
	4 deep on legacy controllers, so probing is pointless.
	This also avoids an issue where probing the stack would
	upset the aic7770.

	In ahc_reset(), record whether or not we found the
	controller in a reset state.  If the controller was
	already reset, assume that no BIOS has initialized
	the controller and ignore left over scratch ram
	settings.

	Fix an ifdef bug that caused sequencer debugging to
	be enabled always.

	Clear the ultraenb flag in our tstate during startup.
	The ultraenbled'ness of a device is recorded in the user
	transfer settings.  tstate->ultraenb bitmask indicates
	which devices we have negotiated an ultra speed with.
	Just after initialization, we are async.  Setting the
	ultraenb flag while async seems to be harmless, but it
	was confusing to see the ULTRAENB flag set in the SCB.

	Enhance residual diagnostic to indicate if the residual
	if for sense information or normal data transfers.

	Indicate the features, bugs, and flags set in the softc
	that are used to control firmware patch download when
	booting verbose.

	In ahc_dump_card_state() fix a logic reversal.  The
	SCSIPHASE register only exists on U160 controllers.
	The SCSISIGI register exists on all controllers.  Not
	the other way around.  Also print out the ERROR register.

	Allow ahc_dump_card_state() to be called when the sequencer
	is not paused.  Add dump card state markers as in the U320
	driver.
2003-01-20 20:44:55 +00:00
Scott Long
97cae63d7f Last minute fixes to ahc and ahd:
ahd_pci.c:
	Retrieve the allow_memio hint from the resource manager to
	determine whether or not to try PCI MEMIO.

aic79xx_osm.h:
aic7xxx_osm.h:
	Don't wrongly abuse the callout_reset() interface when trying
	to abuse timeouts generated from the CAM layer.  This fixes the
	console freeze and lost timeout problem that many have reported,
	especially on SMP systems.

aic79xx_pci.c
aic7xxx_pci.c
	Rewrite the MEMIO test routine to prevent certain broken chipsets
	from trying to burst multiple DWORDs to the registers.  Also make
	the routine better detect byte merging by the host bridge and
	deal with it.

aic79xx.reg:
	Correct an incorrect register definition.

Approved by:	re (rwatson, jhb)
2002-12-04 22:51:29 +00:00
Scott Long
dc67dad8b1 Add a routine for testing memory mapped register access.
This will hopefully detect things like buggy via chipsets
so that the OSM can fallback to using I/O mapped access
when memory mapped I/O simply will not work.

Approved by:	re (blanket)
2002-11-30 19:13:55 +00:00
Justin T. Gibbs
274c41275c Move interrupt enable into the OSM.
Set the AHC_LSCBS_ENABLED softc flag appropriately.

Convert to using softc storage for our seeprom data.

Break seeprom parsing out into a separate routine.

Change our policy in regards to AHC_SPIOCAP so that we
will allow auto-termination to take place on some aic7855
based cards.

Remove initialized but never really used variables.
2002-08-31 06:44:56 +00:00
Justin T. Gibbs
8f214efc9a Major update to the aic7xxx driver:
ahc_eisa.c:
ahc_pci.c:
	Conform to new aic7xxx IRQ API.

	Adapt to aic7xxx_freebsd -> aic7xxx_osm changes.

aic7770.c:
	Disable card generated interrupt early in our probe for
	"extra safety"

	Commonize some seeprom code with the PCI side of the driver.

aic7xxx.c:
	Correctly initialize a few scratch ram locations during
	a sequencer restart.  This avoids spurious sequencer ram
	parity errors in some configurations.

	Include the softc in ahc_update_residual calls.  We need it
	for some diagnostics in this code path.

	Flag a data overrun on an auto-request sense failure as a
	CAM_AUTOSENSE_FAIL rather than a CAM_DATA_RUN_ERR.

	Force a renegotiation after noticing a parity error.  This
	covers targets that lose our negotiation settings but don't
	bother to give us a unit attention condition.  This can happen
	if a target fails during a reselection of us during a cable
	pull.

	Convert some code to using constants.

	Fix some typos.

	Correct target mode message loop handling.  ahc_clear_msg_state
	was not clearing the "need to go to message out phase" bit once
	our loop was over.

	Simplify some abort handling code.

	Include tag information in target mode immediate notify events.

	When shutting down EISA controllers, don't EISA BIOS settings in
	the high portions of scratch ram.  This fixes warm boot issues on
	some systems.

	Save a bit of space by only allocating the SCBs that we can use.

	Avoid some code paths in ahc_abort_scbs() if we are currently
	acting as a target.

	Correctly cleanup stranded SCBs in the card's SCB array.  These
	are SCBs who's mapping has already been torn down by code that
	aborted the SCB by seeing it in another list first.

	Add a comment about some potential bus reset issues for target
	mode on Twin (EISA only) controllers.

aic7xxx.h:
	Cleanup the hardware scb definitions a bit.

	Allocate a ful 256 byte scb mapping index.  This simplifies
	the lookup code since the table covers all possible (and potentially
	bogus) values.

	Make AHC_DEBUG work again.

aic7xxx.reg:
	Updates to hardware SCB definition.

	New definitions for target mode fixes.

aic7xxx.seq:
	In target mode, initialize SAVED_LUN just after we receive
	the identify message.  It may be required in the error recovery
	path when a normal cdb packet (includes lun) is not sent up to
	the host for processing.

	Respond to irregular messages during a selection in target mode.

	Defer looking for space for a cdb packet until we are about to
	enter command phase.  We want to be able to handle irregular messages
	even if we would otherwise return QUEUE_FULL or BUSY.

	Add support for sending Ignore Wide Residue messages as a target.

	In the disable disconnect case in target mode, set our transfer
	rate correctly once data are availble.

aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
	Add the ability to write and erase the seeprom.

aic7xxx_inline.h:
	Correct Big Endian handling of large cdb sizes (> 12 bytes).

	Adaptec to changes in the calc_residual API.

	Correct a target mode bug where we always attempted to service
	the input queue even if no progress could be made due to lack
	of ATIOs.

aic7xxx_osm.c:
	Adaptec to new IRQ mapping API.  The new API allows the core
	to only enable our IRQ mapping once it is safe (sufficient
	initialization) to do so.

	Slap bootverbose protection around some diagnostics.

	Only attempt DT phases if we are wide.

aic7xxx_osm.h:
	Enable big endian support.

	Adjust for IRQ API change.

aic7xxx_pci.c:
	Be more careful about relying on subvendor 9005 information.
	We now only trust it for HBAs.  This should allow the driver
	to attach to some MBs where the subvendor/device information
	does not follow the Adaptec spec.

	Only enable interrupts on the card once we are fully setup.

	Disable external SCB ram usage on the aic7895.  I have not
	been able to make it 100% reliable.

	Adjust to seeprom routines being properly prefixed with "ahc".

	Fix a few bugs in the external SCB ram probing routine.  We
	need to clear any parity errors we've triggered during the
	probe to avoid future, fatal, interrupts.

	If we detect an invalid cable combination, pretent there are
	no cable at all.  This will enable all of the terminators
	which is probably the safest configuration we can "guess".

MFC after: 4 days
2002-04-24 16:58:51 +00:00
Justin T. Gibbs
9f152ec7d2 aic7xxx.c:
Correct an off by one in our critical section handling.
		SEQADDR always reads the next instruction to execute,
		so we must subtract one from its value before making
		comparisons with entries in the critical section table.

		Print a few additional registers whenever we dump
		card state.

		Show the SCB_CONTROL and SCB_TAG values for all pending
		SCBs in card SCB ram when dumping card state.

	aic7xxx.seq:
		Fix a bug introduced while optimizing the SDPTR path.
		We would ack the SDPTR message twice on Ultra2 or better
		chips if it occurred after all data had been transferred
		for a transaction.

		Change our workaround for the PCI2.1 retry bug on some
		chips.  Although the previous workaround was logically
		correct, its faster method of draining the FIFO seemed
		to occassionally confuse the FIFO state.  We now drain
		the FIFO at half the speed which avoids the problem.

	aic7xxx_pci.c:
		Chips with the PCI 2.1 retry bug can't handle a 16byte
		cachesize.  If the cachesize is set to 16bytes, drop
		it to 0.
2001-08-05 22:20:12 +00:00
Justin T. Gibbs
cd036e891a ahc_pci.c:
If bus_dma will give us addresses > 32 bits, setup our dma tag
	to accept up to 39bit addresses.

aic7770.c:
	Update the softc directly rather than use an intermediate
	"probe_config" structure.

aic7xxx.c:
	Complete core work to support 39bit addresses for bulk data
	dma operations.  Controller data structures still must reside
	under the 4GB boundary to reduce code/data size in the sequencer
	and related data structures.  This has been tested under Linux
	IA64 and will be tested on IA64 for FreeBSD as soon as our port
	can run there.

	Add bus dmamap synchronization calls around manipulation of
	all controller/kernel shared host data structures.

	Implement data pointer reinitialation for a second data phase
	in a single connection in the kernel rather than bloat the
	sequencer.  This is an extremely rare operation (does it ever
	happen?) and the sequencer implementation was flawed for some
	of the newest chips.

	Don't ever allow our target role to initiate a PPR.  This
	is forbidden by the SCSI spec.

	Add a few missing endian conversions in the ignore wide pointers
	code.  The core has been tested on the PPC under Linux and should
	work for FreeBSD PPC.  As soon as I can test the OSM layer for
	FreeBSD PPC, I will.

	Move some of ahc_softc_init() into ahc_alloc() now that the
	probe_config structure is gone.

	Add a 4GB boundary condition on all of our dma tags.  32bit
	DAC under PCI only works on a single 4GB "page".  Although
	we can cross 4GB on a true 64bit bus, the card won't always
	be installed in one and we can save code space and cost in
	implementing high address support by assuming the high DWORD
	address will never change.

	Add diagnostics to ahc_search_qinfifo().

	Correct a target mode issue with bus resets.  To avoid an
	interrupt storm from a malicious third party holding the
	reset line, the sequencer would defer re-enabling the reset
	interrupt until either a select-out or select-in.  Unfortunately,
	the select-in enable bit is cleared by a bus reset, so a second
	reset will render the card deaf to an initiator's attempts to
	contact it.  We now re-enable bus reset interrupts immediately
	if the target role is enabled.

aic7xxx.h:
	Remove struct ahc_probe_config.

	SCB's now contain a pointer to the sg_map_node so we can perfrom
	bus dma sync operations on the SG list prior to queuing a command.

aic7xxx.reg:
	Register the Perforce ID for this file with the VERSION keyword
	so it is printed in generated files.

	Add the DSCOMMAND1 register which is used to access the high
	DWORD of address bits.

	Add the data pointer reinitialize sequencer interrupt code.

aic7xxx.seq:
	Register the Perforce ID for this file with the VERSION keyword
	so it is printed in generated files.

	Remove code to re-enable the bus reset interrupt after a select-in.
	In target mode we cannot defer this operation as ENSELI is cleared
	by a bus reset.

	Complete 39bit support.

	Generate a sequencer inteerrupt rather than handle the data
	pointers re-initialitation in the sequencer.

	Inline the "seen identify" assertion to save a few cycles.

	Short circuit the update of our residual data if we have
	fully completed a transfer.  The residual is correct from
	our last S/G load operation.

	Short circuit full SDPTR processing if the residual is 0.
	Just mark the transfer as complete.

aic7xxx_93cx6.c:
	Synchronize perforce IDs.

aic7xxx_freebsd.c:
	Complete untested 39bit support.

	Add missing endia conversions.

	Clear our residuals prior to starting a command.  The
	update residual code in the core only sets the residual
	if there is one.

aic7xxx_freebsd.h:
	Modeify ahc_dmamap_sync() macros to take an offset and a length.
	This is how sync operations are performed in NetBSD, and we should
	update our bus dma implementation to match.

aic7xxx_inline.h:
	Add data structure synchronization helper functions.

	Fix a bug in ahc_intr() where we would not clear our unsolicited
	interrupt counter after running our PCI interrupt handler.  This
	may have been the cause of the spurious PCI interrupt messages.

aic7xxx_pci.c:
	Adjust for loss of probe_config structure.

	Guard against bogus 9005 subdevice information as seen on some
	IBM MB configurations.

	Add 39bit address support.

MFC after: 10 days
2001-07-18 21:39:48 +00:00
Justin T. Gibbs
58fb7d8e0b ahc_eisa.c:
ahc_pci.c:
	Prepare for making ahc a module by adding module dependency
	and version info.

aic7770.c:
	Remove linux header ifdefs.  The headers are handled differently
	in Linux where local includes (those using "'s instead of <>'s)
	are allowed.

	Don't map our interrupt until after we are fully setup to
	handle interrupts.  Our interrupt line may be shared so
	an interrupt could occur at any time.

aic7xxx.c:
	Remove linux header ifdefs.

	current->curr to avoid Linux's use of current as a
	#define for the current task on some architectures.

	Add a helper function, ahc_assert_atn(), for use in
	message phases we handle manually.  This hides the fact
	that U160 chips with the expected phase matching disabled
	need to have SCSISIGO updated differently.

	if (ahc_check_residual(scb) != 0)
		ahc_calc_residual(scb);
	else
		ahc_set_residual(scb, 0);

       	becomes:

	ahc_update_residual(scb);

	Modify scsi parity error (or CRC error) handling to
	reflect expected phase being disabled on U160 chips.

	Move SELTO handling above BUSFREE handling so we can
	use the new busfree interrupt behavior on U160 chips.

	In ahc_build_transfer_msg() filter the period and ppr_options
	prior to deciding whether a PPR message is required.
	ppr_options may be forced to zero which will effect our
	decision.

	Correct a long standing but latent bug in ahc_find_syncrate().
	We could choose a DT only rate even though DT transfers were
	disabled.  In the CAM environment this was unlikely as CAM
	filters our rate to a non-DT value if the device does not
	support such rates.

	When displaing controller characteristics, include the
	speed of the chip.  This way we can modify the transfer
	speed based on optional features that are enabled/disabled
	in a particular application.

	Add support for switching from fully blown tagged queing
	to just using simple queue tags should the device reject
	an ordered tag.

	Remove per-target "current" disconnect and tag queuing
	enable flags.  These should be per-device and are not
	referenced internally be the driver, so we let the OSM
	track this state if it needs to.

	Use SCSI-3 message terminology.

aic7xxx.h:
	The real 7850 does not support Ultra modes, but there are
	several cards that use the generic 7850 PCI ID even though
	they are using an Ultra capable chip (7859/7860).  We start
	out with the AHC_ULTRA feature set and then check the
	DEVSTATUS register to determine if the capability is really
	present.

	current -> curr

	ahc_calc_residual() is no longer static allowing it to
	be called from ahc_update_residual() in aic7xxx_inline.h.

	Update some serial eeprom definitions for the latest
	BIOS versions.

aic7xxx.reg:
	Add a combined DATA_PHASE mask to the SCSIPHASE register
	definition to simplify some sequencer code.

aic7xxx.seq:
	Take advantage of some performance features available only
	on the U160 chips.  The auto-ack feature allows us to ack
	data-in phases up to the data-fifo size while the sequencer
	is still setting up the DMA engine.  This greatly reduces
	read transfer latency and simplifies testing for transfer
	complete (check SCSIEN only).  We also disable the expected
	phase feature, and enable the new bus free interrupt behavior,
	to avoid a few instructions.

	Re-arrange the Ultra2+ data phase handling to allow us to
	do more work in parallel with the data fifo flushing on a
	read.

	On an SDTR, ack the message immediately so the target can
	prepare the next phase or message byte in parallel with
	our work to honor the message.

aic7xxx_93cx6.c:
	Remove linux header ifdefs.

aic7xxx_freebsd.c:
	current -> curr

	Add a module event handler.

	Handle tag downgrades in our ahc_send_async() handler.
	We won't be able to downgrade to "basic queuing" until
	CAM is made aware of this queuing type.

aic7xxx_freebsd.h:
	Include cleanups.

	Define offsetof if required.

	Correct a few comments.

	Update prototype of ahc_send_async().

aic7xxx_inline.h:
	Implement ahc_update_residual().

aic7xxx_pci.c:
	Remove linux header ifdefs.

	Correct a few product strings.

	Enable several U160 performance enhancing features.

	Modify Ultra capability determination so we will enable
	Ultra speeds on devices with a 7850 PCI id that happen
	to really be a 7859 or 7860.

	Don't map our interrupt until after we are fully setup to
	handle interrupts.  Our interrupt line may be shared so
	an interrupt could occur at any time.
2001-05-15 19:41:12 +00:00
Justin T. Gibbs
b95de6dafd aic7770.c:
aic7xxx_pci.c:
	Enable board generation of interrupts only once our handler is
	in place and all other setup has occurred.

aic7xxx.c:
	More conversion of data types to ahc_* names.  tmode_tstate and
	tmode_lstate are the latest victims.

	Clean up the check condition path by branching early rather
	than indenting a giant block of code.

	Add support for target mode initiated sync negotiation.
	The code has been tested by forcing the feature on for
	all devices, but for the moment is left inaccesible until
	a decent mechanism for controlling the behavior is complete.
	Implementing this feature required the removal of the
	old "target message request" mechanism.  The old method
	required setting one of the 16 bit fields to initiate
	negotiation with a particular target.  This had the nice
	effect of being easy to change the request and have it
	effect the next command.  We now set the MK_MESSAGE bit
	on any new command when negotiation is required.  When
	the negotiation is successful, we walk through and clean
	up the bit on any pending commands.  Since we have to walk
	the commands to reset the SCSI syncrate values so no additional
	work is required.  The only drawback of this approach is that
	the negotiation is deferred until the next command is queued to
	the controller.  On the plus side, we regain two bytes of
	sequencer scratch ram and 6 sequencer instructions.

	When cleaning up a target mode instance, never remove the
	"master" target mode state object.  The master contains
	all of the saved SEEPROM settings that control things like
	transfer negotiations.  This data will be cloned as the
	defaults if a target mode instance is re-instantiated.

	Correct a bug in ahc_set_width().  We neglected to update
	the pending scbs to reflect the new parameters.  Since
	wide negotiation is almost always followed by sync
	negotiation it is doubtful that this had any real
	effect.

	When in the target role, don't complain about
	"Target Initiated" negotiation requests when an initiator
	negotiates with us.

	Defer enabling board interrupts until after ahc_intr_enable()
	is called.

	Pull all info that used to be in ahc_timeout for the FreeBSD
	OSM into ahc_dump_card_state().  This info should be printed
	out on all platforms.

aic7xxx.h:
	Add the SCB_AUTO_NEGOITATE scb flag.  This allows us to
	discern the reason the MK_MESSAGE flag is set in the hscb
	control byte.  We only want to clear MK_MESSAGE in
	ahc_update_pending_scbs() if the MK_MESSAGE was set due
	to an auto transfer negotiation.

	Add the auto_negotiate bitfield for each tstate so that
	behavior can be controlled for each of our enabled SCSI
	IDs.

	Use a bus interrupt handler vector in our softc rather
	than hard coding the PCI interrupt handler.  This makes
	it easier to build the different bus attachments to
	the aic7xxx driver as modules.

aic7xxx.reg:
	Remove the TARGET_MSG_REQUEST definition for sequencer ram.

aic7xxx.seq:
	Fix a few target mode bugs:

		o If MK_MESSAGE is set in an SCB, transition to
		  message in phase and notify the kernel so that
		  message delivery can occur.  This is currently
		  only used for target mode initiated transfer
		  negotiation.

		o Allow a continue target I/O to compile without
		  executing a status phase or disconnecting.  If
		  we have not been granted the disconnect privledge
		  but this transfer is larger than MAXPHYS, it may
		  take several CTIOs to get the job done.

	Remove the tests of the TARGET_MSG_REQUEST field in scratch ram.

aic7xxx_freebsd.c:
	Add support for CTIOs that don't disconnect.  We now defer
	the clearing of our pending target state until we see a
	CTIO for that device that has completed sucessfully.

	Be sure to return early if we are in a target only role
	and see an initiator only CCB type in our action routine.

	If a CTIO has the CAM_DIS_DISCONNECT flag set, propogate
	this flag to the SCB.  This flag has no effect if we've
	been asked to deliver status as well.  We will complete
	the command and release the bus in that case.

	Handle the new auto_negotiate field in the tstate correctly.

	Make sure that SCBs for "immediate" (i.e. to continue a non
	disconnected transaction) CTIO requests get a proper mapping
	in the SCB lookup table.  Without this, we'll complain when
	the transaction completes.

	Update ahc_timeout() to reflect the changes to ahc_dump_card_state().

aic7xxx_inline.h:
	Use ahc->bus_intr rather than ahc_pci_intr.
2001-03-29 00:36:35 +00:00
Justin T. Gibbs
6fb77fef4d This is an MFC candidate.
ahc_eisa.c:
	Change aic7770_map_int to take an additional irq parameter.
	Although we can get the irq from the eisa dev under FreeBSD,
	we can't do this under linux, so the OSM interface must supply
	this.

ahc_pci.c:
	Move ahc_power_state_change() to the OSM.  This allows us to
	use a platform supplied function that does the same thing.
	-current will move to the FreeBSD native API in the near
	future.

aic7770.c:
	Sync up with core changes to support Linux EISA.

	We now store a 2 bit primary channel number rather
	than a bit flag that only allows b to be the primary
	channel.   Adjust for this change.

aic7xxx.c:
	Namespace and staticization cleanup.  All exported symbols
	use an "ahc_" prefix to avoid collisions with other modules.

	Correct a logic bug that prevented us from dropping
	ATN during some exceptional conditions during message
	processing.

	Take advantage of a new flag managed by the sequencer
	that indicates if an SCB fetch is in progress.  If so,
	the currently selected SCB needs to be returned to the
	free list to prevent an SCB leak.  This leak is a rarity
	and would only occur if a bus reset or timeout resulting
	in a bus reset occurred in the middle of an SCB fetch.

	Don't attempt to perform ULTRA transfers on ultra capable
	adapters missing the external precision resistor required
	for ultra speeds.  I've never encountered an adapter
	configured this way, but better safe than sorry.

        Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
        in scratch ram.

        If we lookup a period of 0 in our table (async), clear the scsi offset.

aic7xxx.h:
	Adjust for the primary channel being represented as
	a 2 bit integer in the flags member of the ahc softc.

	Cleanup the flags definitions so that comment blocks are
	not cramped.

	Update seeprom definitions to correctly reflect the fact
	that the primary channel is represented as a 2 bit integer.

	Add AHC_ULTRA_DIASABLED softc flag to denote controllers
	missing the external precision resistor.

aic7xxx.reg:
	Add DFCACHETH to the definition of DFSTATUS for completness sake.

	Add SEQ_FLAGS2 which currently only contains the SCB_DMA
	(SCB DMA in progress) flag.

aic7xxx.seq:
	Correct a problem when one lun has a disconnected untagged
	transaction and another lun has disconnected tagged transactions.
	Just because an entry is found in the untagged table doesn't
	mean that it will match.  If the match on the lun fails, cleanup
	the SCB (return it to the disconnected list or free it), and snoop
	for a tag message.  Before this change, we reported an unsolicited
	reselection.  This bug was introduced about a month ago during an
	overly aggressive optimization pass on the reselection code.

	When cleaning up an SCB, we can't just blindly free the SCB.  In
	the paging case, if the SCB came off of the disconnected list, its
	state may never have been updated in host memory.  So, check the
	disconnected bit in SCB_CONTROL and return the SCB to the disconnected
	list if appropriate.

	Manage the SCB_DMA flag of SEQ_FLAGS2.

	More carefully shutdown the S/G dma engine in all cases by using
	a subroutine.  Supposedly not doing this can cause an arbiter hang
	on some ULTRA2 chips.

	Formatting cleanup.

	On some chips, at least the aic7856, the transition from
	MREQPEND to HDONE can take a full 4 clock cycles.  Test
	HDONE one more time to avoid this race.  We only want our
	FIFO hung recovery code to execute when the engine is
	really hung.

aic7xxx_93cx6.c:
	Sync perforce ids.

aic7xxx_freebsd.c:
	Adjust for the primary channel being a 2 bit integer
	rather than a flag for 'B' channel being the primary.

	Namespace cleanup.

	Unpause the sequencer in one error recovery path that
	neglected to do so.  This could have caused us to perform
	a bus reset when a recovery message might have otherwise been
	successful.

aic7xxx_freebsd.h:
	Use AHC_PCI_CONFIG for controlling compilation of PCI
	support consistently throughout the driver.

	Move ahc_power_state_change() to OSM.

aic7xxx_inline.h
	Namespace cleanup.

	Adjust our interrupt handler so it will work in the edge
	interrupt case.  We must process all interrupt sources
	when the interrupt fires or risk not ever getting an
	interrupt again.  This involves marking the fact
	that we are relying on an edge interrupt in ahc->flags
	and checking for this condition in addition to the
	AHC_ALL_INTERRUPTS flag.  This fixes hangs on the
	284X and any other aic7770 installation where level
	interrupts are not available.

aic7xxx_pci.c:
	Move the powerstate manipulation code into the OSM.  Several
	OSes now provide this functionality natively.

	Take another shot at using the data stored in scratch ram
	if the SCB2 signature is correct and no SEEPROM data is
	available.  In the past this failed if external SCB ram
	was configured because the memory port was locked.  We
	now release the memory port prior to testing the values
	in SCB2 and re-acquire it prior to doing termination control.

	Adjust for new 2 bit primary channel setting.

	Trust the STPWLEVEL setting on v 3.X BIOSes too.

	Configure any 785X ID in the same fashion and assume
	that any device with a rev id of 1 or higher has the
	PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
Justin T. Gibbs
1478c71123 aic7xxx.c:
Use the target offset rather than the target Id to reference
	the untagged SCB array.  The offset and id are identical save
	in the twin channel case.  This should correct several issues
	with the 2742T.

	Set the user and goal settings prior to setting the current
	settings.  This allows the async update routine to filter out
	intermediate transfer negotiation updates that may be less
	than interesting.  The Linux OSM uses this to reduce the amount
	of stuff printed to the console.

aic7xxx.seq:
	Correct an issue with the aic7770 in twin channel mode.
	We could continually attempt to start a selection even
	though a selection was already occurring on one channel.
	This might have the side effect of hanging our selection
	or causing us to select the wrong device.

	While here, create a separate polling loop for when we
	have already started a selection.  This should reduce
	the latency of our response to a (re)selection.  The diffs
	look larger than they really are due to some code rearrangement
	to optimize out a jmp.

aic7xxx_freebsd.c:
	Use the target offset rather than the target Id to reference
	the untagged SCB array.  The offset and id are identical save
	in the twin channel case.  This should correct several issues
	with the 2742T.

aic7xxx_inline.h:
	Get back in sync with perforce revision ID.

aic7xxx_pci.c:
	Identify adapters in ARO mode as such.

	Ensure that not only the subvendor ID is correct (9005)
	but also that the controller type field is valid before
	looking at other information in the subdevice id.  Intel
	seems to have decided that their subdevice id of 8086
	is more appropriate for some of their MBs with aic7xxx
	parts than Adaptec's sanctioned scheme.

	Add an exclusion entry for SISL (AAC on MB based adapters).
	Adapters in SISL mode are owned by the RAID controller, so
	even if a driver for the RAID controller is not present,
	it isn't safe for us to touch them.
2001-02-21 20:50:36 +00:00
Justin T. Gibbs
bfadd24d57 aic7xxx.c:
Style nits.

	Make sure that our selection hardware is disabled
	as soon as possible after detecting a busfree and
	even go so far as to disable the selection hardware
	in advance of an event that will cause a busfree
	(ABORT or BUS DEVICE RESET message).  The concern
	is that the selection hardware will select a target
	for which, after processing the bus free, there
	will be no commands pending.  The sequencer idle
	loop will re-enable the selection should it still be
	necessary.

	In ahc_handle_scsiint(), clear SSTAT0 events several
	PCI transactions (most notably reads) prior to clearing
	SCSIINT.  The newer chips seem to take a bit of time to
	see the change which can make the clearing of SCSIINT
	ineffective.

	Don't bother panicing at the end of ahc_handle_scsiint().
	Getting to the final else just means we lost the race
	with clearing SCSIINT.

	In ahc_free(), handle init-level 0.  This can happen when we
	fail the attach for RAID devices.  While I'm here, also kill
	the parent dma tag.

	In ahc_match_scb(), consider initiator ccbs to be any
	that are not from the target mode group.  This fixes
	a bug where an external target reset CCB was not getting
	cleaned up by the reset code.

	Don't bother freezing a ccb in any of our "abort" routines
	when the status is set to CAM_REQ_CMP.  This can happen
	for a target reset ccb.

aic7xxx.reg:
	Reserve space for a completion queue.  This will be used
	to enhance performance in the near future.

aic7xxx.seq:
	Remove an optimization for the 7890 autoflush bug that
	turned out to allow, in rare cases, some data to get
	lost.

	Implement a simpler, faster, fix for the PCI_2_1 retry
	bug that hangs the sequencer on an SCB dma for certain chips.

	Test against SAVED_SCSIID rather than SELID during target
	reselections.  This is how we always did it in the past,
	but the code was modified while trying to work around an
	issue with the 7895.  SAVED_SCSIID takes into account
	twin channel adapters such as the 2742T, whereas SELID
	does not have the channel bit.  This caused invalid
	selection warnings and other strangeness on these cards.

aic7xxx_pci.c
	Use the correct mask for checking the generic aic7892
	entry.
2001-02-10 18:04:27 +00:00
Justin T. Gibbs
64a3876fef Update Copyright notices for new year. (should have been in last commit). 2001-01-27 20:54:24 +00:00
Justin T. Gibbs
a5847d5c27 ahc_eisa.c:
Initialize rid to 0.  This doesn't seem to make any difference
	(the driver doesn't care what rid it gets and no-one seems to
	check rid's value), but follows standard conventions.

	Pass in our device_t to ahc_alloc().  We now use device_T
	softc storage, so passing NULL results in a panic.

	Set the unit number in our softc so that the driver core
	can retrieve it.

ahc_pci.c:
	Set the unit number in our softc so that the driver core
	can retrieve it.

aic7770.c:
	Insert our softc into the list of softcs when initialization
	is successful.

aic7xxx.c:
	Remove a workaround for an aic7895 bug we will never trigger.

	Add additional diagnostic info to ahc_dump_card_state().

	Always panic the system if a sequencer assertion fails.

	AHC_SCB_BTT is a "flag" not a "feature".  Check the right
	field in the softc.

	Replace a hard coded number with a constant.

	Guard against looping forever in ahc_pause_and_flushwork().
	A hot eject or card failure may make the intstat register
	return 0xFF, so limit the number of interrupts we'll process.

	Correct the code in ahc_search_qinfifo() that guarantees that
	the sequencer will see an abort collision if the qinfifo is
	modified when a DMA is in progress.  We now do this fixup
	after modifying the queue.  This guarantees that the HSCB
	we place at the head of the queue is not the same as the
	old head.  Using "next hscb" (guaranteed not to be the
	same as the first SCB) before clearing the queue could free
	up the original head hscb to be used during a remove operation
	placing it again at the head of the qinfifo.

aic7xxx.h:
	Reduce the maximum number of outstanding commands to 253 from
	254.  To handle our output queue correctly on machines that only
	support 32bit stores, we must clear the array 4 bytes at a
	time.  To avoid colliding with a DMA write from the sequencer,
	we must be sure that 4 slots are empty when we write to clear
	the queue.  This reduces us to 253 SCBs: 1 that just completed
	and the known three additional empty slots in the queue that
	preceed it.  Yahoo was able to force this race on one of their
	systems.  Interrupts were disabled for such a time that the
	entire output queue was filled (254 entries complete without
	any processing), and our 32bit write to clear the status clobbered
	one entry.

	Add a feature tag for devices that are removable.

aic7xxx.reg:
	Never use the sequencer interrupt value of 0xF0.  We need
	to guanrantee that an INTSTAT value of 0xFF can only occur
	during card failure or a hot-eject.

	Align the busy targets table with the begining of scratch
	space.  This seems to appease a chip bug in the aic7895.

aic7xxx.seq:
	Be sure to disable select-out after a bus free event that occurs
	early in a selection.  If we don't disable select-out, we will
	believe that it is enabled even though a new selection will never
	occur.

	Move the clearing of SELDI to just before a jump.  This appeases
	another chip bug of the aic7895.

	Make the target mode command loop a bit more efficient.

	AHC_SCB_BTT is a "flag" not a "feature".  Check the right
	field in the softc.

	Properly cleanup the last SCB we tested against should we
	fail to properly find an SCB for a reselection.

	Add some additional sequencer debugging code.

aic7xxx_freebsd.c:
	Limit the driver to 253 outstanding commands per adapter.

	Guard against overflow in timeout handling.

aic7xxx_inline.h:
	AHC_SCB_BTT is a "flag" not a "feature".  Check the right
	field in the softc.

aic7xxx_pci.c:
	Set the removable feature for the apa1480 cardbus and the 29160C
	Compact PCI card.

	Don't report high byte termination information for narrow cards.

	Use a PCI read rather than a questionable delay when fetching/setting
	termination settings.
2001-01-22 21:03:48 +00:00
Justin T. Gibbs
f8838555e8 aic7xxx.c:
aic7xxx.h:
	First pass at big-endian support in the Core.

	Capture state for second channel on TWIN channel adapters
	for suspend and resume.

aic7xxx_freebsd.h:
	Stubs for endian conversion functions.  These will get filled
	out once we get an official kernel api for this kind of thing
	that is something more elegant and efficient than a bunch of
	manual swaps #ifdefed by platform.

aic7xxx_pci.c
	Allow the second channel of motherboard aic7896 chips to be attached.
	It turns out that the encoding of the subdevice id differs between
	PCI cards and MB based controllers and our check to see, via
	the subvendor id, if the second channel was "stuffed" always
	turned out negative.
2001-01-05 19:15:37 +00:00
Justin T. Gibbs
56a7c4a852 ahc_eisa.c:
ahc_pci.c:
		Add detach support.

		Make use of soft allocated on our behalf by newbus.

		For PCI devices, disable the mapping type we aren't
		using for extra protection from rogue code.

	aic7xxx_93cx6.c:
	aic7xxx_93cx6.h:
		Sync perforce IDs.

	aic7xxx_freebsd.c:
		Capture the eventhandle returned by EVENTHANDER_REGISTER
		so we can kill the handler off during detach.

		Use AHC_* constants instead of hard coded numbers in a
		few more places.

		Test PPR option state when deciding to "really" negotiate
		when the CAM_NEGOTIATE flag is passed in a CCB.

		Make use of core "ahc_pause_and_flushwork" routine in our
		timeout handler rather than re-inventing this code.

		Cleanup all of our resources (really!) in ahc_platform_free().
		We should be all set to become a module now.

		Implement the core ahc_detach() routine shared by all of
		the FreeBSD front-ends.

	aic7xxx_freebsd.h:
		Softc storage for our event handler.

		Null implementation for the ahc_platform_flushwork() OSM
		callback.  FreeBSD doesn't need this as XPT callbacks are
		safe from all contexts and are done directly in ahc_done().

	aic7xxx_inline.h:
		Implement new lazy interrupt scheme.  To avoid an extra
		PCI bus read, we first check our completion queues to
		see if any work has completed.  If work is available, we
		assume that this is the source of the interrupt and skip
		reading INTSTAT.  Any remaining interrupt status will be
		cleared by a second call to the interrupt handler should
		the interrupt line still be asserted.  This drops the
		interrupt handler down to a single PCI bus read in the
		common case of I/O completion.  This is the same overhead
		as in the not so distant past, but the extra sanity of
		perforning a PCI read after clearing the command complete
		interrupt and before running the completion queue to avoid
		missing command complete interrupts added a cycle.

	aic7xxx.c:
		During initialization, be sure to initialize all scratch
		ram locations before they are read to avoid parity errors.
		In this case, we use a new function, ahc_unbusy_tcl() to
		initialize the scratch ram busy target table.

		Replace instances of ahc_index_busy_tcl() used to unbusy
		a tcl without looking at the old value with ahc_unbusy_tcl().

		Modify ahc_sent_msg so that it can find single byte messages.
		ahc_sent_msg is now used to determine if a transfer negotiation
		attempt resulted in a bus free.

		Be more careful in filtering out only the SCSI interrupts
		of interest in ahc_handle_scsiint.

		Rearrange interrupt clearing code to ensure that at least
		one PCI transaction occurrs after hitting CLRSINT1 and
		writting to CLRINT.  CLRSINT1 writes take a bit to
		take effect, and the re-arrangement provides sufficient
		delay to ensure the write to CLRINT is effective.  The
		old code might report a spurious interrupt on some "fast"
		chipsets.

		export ahc-update_target_msg_request for use by OSM code.

		If a target does not respond to our ATN request, clear
		it once we move to a non-message phase.  This avoids
		sending a MSG_NOOP in some later message out phase.

		Use max lun and max target constants instead of
		hard-coded values.

		Use softc storage built into our device_t under FreeBSD.

		Fix a bug in ahc_free() that caused us to delete
		resources that were not allocated.

		Clean up any tstate/lstate info in ahc_free().

		Clear the powerdown state in ahc_reset() so that
		registers can be accessed.

		Add a preliminary function for pausing the chip and
		processing any posted work.

		Add a preliminary suspend and resume functions.

	aic7xxx.h:
		Limit the number of supported luns to 64.  We don't
		support information unit transfers, so this is the
		maximum that makes sense for these chips.

		Add a new flag AHC_ALL_INTERRUPTS that forces the
		processing of all interrupt state in a single invokation
		of ahc_intr().  When the flag is not set, we use the
		lazy interrupt handling scheme.

		Add data structures to store controller state while
		we are suspended.

		Use constants instead of hard coded values where appropriate.

		Correct some harmless "unsigned/signed" conflicts.

	aic7xxx.seq:
		Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
		Older controllers seem to be confused by this.

		In target mode, ignore PHASEMIS during data phases.
		This bit seems to be flakey on U160 controllers acting
		in target mode.

	aic7xxx_pci.c:
		Add support for the 29160C CPCI adapter.

		Add definitions for subvendor ID information
		available for devices with the "9005" vendor id.
		We currently use this information to determine
		if a multi-function device doesn't have the second
		channel hooked up on a board.

		Add rudimentary power mode code so we can put the
		controller into the D0 state.  In the future this
		will be an OSM callback so that in FreeBSD we don't
		duplicate functionality provided by the PCI code.
		The powerstate code was added after I'd completed
		my regression tests on this code.

		Only capture "left over BIOS state" if the POWRDN
		setting is not set in HCNTRL.

		In target mode, don't bother sending incremental
		CRC data.
2000-12-20 01:11:37 +00:00
Justin T. Gibbs
72df3c5621 Sync Perforce IDs, add tranceiver state change support, and correct
numerous error recovery buglets.

Many thanks to Tor Egge for his assistance in diagnosing problems with
the error recovery code.

aic7xxx.c:
	Report missed bus free events using their own sequencer interrupt
	code to avoid confusion with other "bad phase" interrupts.

	Remove a delay used in debugging.  This delay could only be hit
	in certain, very extreme, error recovery scenarios.

	Handle transceiver state changes correctly.  You can now
	plug an SE device into a hot-plug LVD bus without hanging
	the controller.

	When stepping through a critical section, panic if we step
	more than a reasonable number of times.

	After a bus reset, disable bus reset interupts until we either
	our first attempt to (re)select another device, or another device
	attemps to select us.  This removes the need to busy wait in
	kernel for the scsi reset line to fall yet still ensures we
	see any reset events that impact the state of either our initiator
	or target roles.  Before this change, we had the potential of
	servicing a "storm" of reset interrupts if the reset line was
	held for a significant amount of time.

	Indicate the current sequencer address whenever we dump the
	card's state.

aic7xxx.reg:
	Transceiver state change register definitions.

	Add the missed bussfree sequencer interrupt code.

	Re-enable the scsi reset interrupt if it has been
	disabled before every attempt to (re)select a device
	and when we have been selected as a target.

	When being (re)selected, check to see if the selection
	dissappeared just after we enabled our bus free interrupt.
	If the bus has gone free again, go back to the idle loop
	and wait for another selection.

	Note two locations where we should change our behavior
	if ATN is still raised.  If ATN is raised during the
	presentation of a command complete or disconnect message,
	we should ignore the message and expect the target to put
	us in msgout phase.  We don't currently do this as it
	requires some code re-arrangement so that critical sections
	can be properly placed around our handling of these two
	events.  Otherwise, we cannot guarantee that the check of
	ATN is atomic relative to our acking of the message in
	byte (the kernel could assert ATN).

	Only set the IDENTIFY_SEEN flag after we have settled
	on the SCB for this transaction.  The kernel looks at
	this flag before assuming that SCB_TAG is valid.  This
	avoids confusion during certain types of error recovery.

	Add a critical section around findSCB.  We cannot allow
	the kernel to remove an entry from the disconnected
	list while we are traversing it.  Ditto for get_free_or_disc_scb.

aic7xxx_freebsd.c:
	Only assume that SCB_TAG is accurate if IDENTIFY_SEEN is
	set in SEQ_FLAGS.

	Fix a typo that caused us to execute some code for the
	non-SCB paging case when paging SCBs.  This only occurred
	during error recovery.
2000-11-10 20:13:41 +00:00
Justin T. Gibbs
dd1290f033 aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
	never exceed the settings specified by the user.

	In restart sequencer attempt to deal with a bug in the aic7895.
	If a third party reset occurs at just the right time, the
	stack register can lock up.  When restarting the sequencer
	after handling the SCSI reset, poke SEQADDR1 before resting
	the sequencers program counter.

	When something strange happens, dump the card's transaction
	state via ahc_dump_card_state().  This should aid in debugging.

	Handle request sense transactions via the QINFIFO instead of
	attaching them to the waiting queue directly.  The waiting
	queue consumes card SCB resources and, in the pathological case
	of every target on the bus beating our selection attemps and
	issuing a check condition, could have caused us to run out
	of SCBs.  I have never seen this happen, and only early
	cards with 3 or 4 SCBs had any real chance of ever getting
	into this state.

	Add additional sequencer interrupt codes to support firmware
	diagnostics.  The diagnostic code is enabled with the
	AHC_DEBUG_SEQUENCER kernel option.

	Make it possible to switch into and out of target mode on
	the fly.  The card comes up by default as an initiator but
	will switch into target mode as soon as an enable lun operation
	is performed.  As always, target mode behavior is gated
	by the AHC_TMODE_ENABLE kernel option so most users will
	not be affected by this change.

	In ahc_update_target_msg_request(), also issue a new
	request if the ppr_options have changed.

	Never issue a PPR as a target.  It is forbidden by the spec.

	Correct a bug in ahc_parse_msg() that prevented us from
	responding to PPR messages as a target.

	Mark SCBs that are on the untagged queue with a flag instead
	of checking several fields in the SCB to see if the SCB should
	be on the queue.  This makes it easier for things like automatic
	request sense requests to be queued without touching the
	untagged queues even though they are untagged requests.

	When dealing with ignore wide residue messages that occur
	in the middle of a transfer, reset HADDR, not SHADDR for
	non-ultra2 chips.  Although SHADDR is where the firmware
	fetches the ending transfer address for a save data pointers
	request, it is readonly. Setting HADDR has the side effect
	of also updating SHADDR.

	Cleanup the output of ahc_dump_card_state() by nulling out the
	free scb list in the non-paging case.  The free list is only
	used if we must page SCBs.

	Correct the transmission of cdbs > 12 bytes in length.  When
	swapping HSCBs prior to notifing the sequencer of the new
	transaction, the bus address pointer for the cdb must also
	be recalculated to reflect its new location.  We now defer
	the calculation of the cdb address until just before queing
	it to the card.

	When pulling transfer negotiation settings out of scratch
	ram, convert 5MHz/clock doubled settings to 10MHz.

	Add a new function ahc_qinfifo_requeue_tail() for use by
	error recovery actions and auto-request sense operations.
	These operations always occur when the sequencer is paused,
	so we can avoid the extra expense incurred in the normal
	SCB queue method.

	Use the BMOV instruction for all single byte moves on
	controllers that support it.  The bmov instruction is
	twice as fast as an AND with an immediate of 0xFF as
	is used on older controllers.

	Correct a few bugs in ahc_dump_card_state().  If we have
	hardware assisted queue registers, use them to get the
	sequencer's idea of the head of the queue.  When enumerating
	the untagged queue, it helps to use the correct index for
	the queue.

aic7xxx.h:

	Indicate via a feature flag, which controllers can take
	on both the target and the initiator role at the same time.

	Add the AHC_SEQUENCER_DEBUG flag.

	Add the SCB_CDB32_PTR flag used for dealing with cdbs
	with lengths between 13 and 32 bytes.

	Add new prototypes.

aic7xxx.reg:
	Allow the SCSIBUSL register to be written to.  This is
	required to fix a selection timeout problem on the 7892/99.

	Cleanup the sequencer interrupt codes so that all debugging
	codes are grouped at the end of the list.

	Correct the definition of the ULTRA_ENB and DISC_DSB locations
	in scratch ram.  This prevented the driver from properly honoring
	these settings when no serial eeprom was available.

	Remove an unused sequencer flag.

aic7xxx.seq:
	Just before a potential select-out, clear the SCSIBUSL
	register.  Occasionally, during a selection timeout, the
	contents of the register may be presented on the bus,
	causing much confusion.

	Add sequencer diagnostic code to detect software and or
	hardware bugs.  The code attempts to verify most list
	operations so any corruption is caught before it occurs.
	We also track information about why a particular reconnection
	request was rejected.

	Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
	when clearing the channel.

	Fix a target mode bug that would cause us to return busy
	status instead of queue full in respnse to a tagged transaction.

	Cleanup the overrun case.  It turns out that by simply
	butting the chip in bitbucket mode, it will ack any
	bytes until the phase changes.  This drasticaly simplifies
	things.

	Prior to leaving the data phase, make sure that the S/G
	preload queue is empty.

	Remove code to place a request sense request on the waiting
	queue.  This is all handled by the kernel now.

	Change the semantics of "findSCB".  In the past, findSCB
	ensured that a freshly paged in SCB appeared on the disconnected
	list.  The problem with this is that there is no guarantee that
	the paged in SCB is for a disconnected transation.  We now
	defer any list manipulation to the caller who usually discards
	the SCB via the free list.

	Inline some busy target table operations.

	Add a critical section to protect adding an SCB to
	the disconnected list.

aic7xxx_freebsd.c:
	Handle changes in the transfer negotiation setting API
	to filter incoming requests.  No filtering is necessary
	for "goal" requests from the XPT.

	Set the SCB_CDB32_PTR flag when queing a transaction with
	a large cdb.

	In ahc_timeout, only take action if the active SCB is
	the timedout SCB.  This deals with the case of two
	transactions to the same device with different timeout
	values.

	Use ahc_qinfifo_requeu_tail() instead of home grown
	version.

aic7xxx_inline.h:
	Honor SCB_CDB32_PTR when queuing a new request.

aic7xxx_pci.c:
	Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
Justin T. Gibbs
73f1c25915 Clean up error recovery code:
aic7xxx.c:
	In target mode, reset the TQINPOS on every restart of the sequencer.
	In the past we did this only during a bus reset, but there are other
	reasons the sequencer might be reset.

	In ahc_clear_critical_section(), disable pausing chip interrupts while
	we step the sequencer out of a critical section.  This avoids the
	possibility of getting a pausing interrupt (unexpected bus free,
	bus reset, etc.) that would prevent the sequencer from stepping.

	Send the correct async notifications in the case of a BDR or bus reset.

	In ahc_loadseq(), correct the calculation of our critical sections.
	In some cases, the sections would be larger than needed.

aic7xxx.h:
	Remove an unused SCB flag.

aic7xxx.seq:
	MK_MESSAGE is cleared by the kernel, there is no need to waste
	a sequencer instruction clearing it.

aic7xxx_freebsd.c:
	Go through the host message loop instead of issuing a single
	byte message directly in the ahc_timeout() case where we
	are currently on the bus to the device.  The effect is the same,
	but this way we get a nice printf saying that an expected BDR
	was delivered instead of an unexpected bus free.

	If we are requeuing an SCB for an error recovery action, be sure
	to set the DISCONNECTED flag in the in-core version of the SCB.
	This ensures that, in the SCB-paging case, the sequencer will
	still recognize the reselection as valid even if the version
	of the SCB with this flag set was never previously paged out
	to system memory.  In the non-paging case, set the MK_MESSAGE
	flag in SCB_CONTROL directly.

aic7xxx_pci.c:
	Enable the Memeory Write and Invalidate bug workaround for
	all aic7880 chips with revs < 1.  This bug is rarely triggered
	in FreeBSD as most transfers end on cache-aligned boundaries,
	but a recheck of my references indicates that these chips
	are affected.
2000-10-09 01:46:01 +00:00
Justin T. Gibbs
a49630ac82 Convert the driver to use a single DMA for fetching new commands instead
of two (one to access the circular input fifo, the other to get the SCB).
This costs us a command slot so the driver can now only queue 254
simultaneous commands.

Have the kernel driver honor critical sections in sequencer code.

When prefetching S/G segments only pull a cacheline's worth but
never less than two elements.  This reduces the impact of the
prefetch on the main data transfer when compared to the 128
byte fetches the driver used to do.

Add "bootverbose" logging for transfer negotiations.

Correct a bug in ahc_set_syncrate() that would prevent an update
of the sync parameters if only the ppr_options had changed.

Correct locking for calls to ahc_free_scb().  ahc_free_scb() is no
longer protected internally to simplify ports to other platforms.

Make sure we unfreeze our SIMQ if a resource shortage has occurred
and an SCB is been freed.

ahc_pci.c:
	Turn on cacheline streaming for all controllers that support it.

	Clarify diagnostic messages about PCI interrupts.
2000-10-05 04:24:14 +00:00
Justin T. Gibbs
c498406d58 Add Perforce RCSIDs for easy revision correlation to my local tree.
ahc_pci.c:
	Bring back the AHC_ALLOW_MEMIO option at least until the
	memory mapped I/O problem on the SuperMicro 370DR3 is
	better understood.

aic7xxx.c:
	If we see a spurious SCSI interrupt, attempt to clear it and
	continue by unpausing the sequencer.

	Change the interface to ahc_send_async().  Some async messages
	need to be broadcast to all the luns of a target or all the
	targets of a bus.  This is easier to achieve by passing explicit
	channel, target, and lun parameters instead of attempting to
	construct a device info struct to match.

	Filter the sync parameters for the PPR message in exactly the
	same way we do for an old fashioned SDTR message.

	Correct some typos and correct a panic message.

	Handle rejected PPR messages.

	In ahc_handle_msg_reject(), let ahc_build_transfer_msg() build
	any additional transfer messages instead of doing this inline.

aic7xxx.h:
	Increase the size of both msgout_buf and msgin_buf to
	better accomodate PPR messages.

aic7xxx_freebsd.c:
	Update for change in ahc_send_async() parameters.

aic7xxx_freebsd.h
	Update for change in ahc_send_async() parameters.

	Honor AHC_ALLOW_MEMIO.

aic7xxx_pci.c:
	Check the error register before going into full blown PCI
	interrupt handling.  This avoids a few costly PCI configuration
	space reads when we run our PCI interrupt handler because another
	device sharing our interrupt line is more active than we are.

	Also unpause the sequencer after processing a PCI interrupt.
2000-09-22 22:18:05 +00:00
Justin T. Gibbs
717d424718 Move aicasm to its own subdirectory.
Separate our platform independent hooks from core driver functionality
shared between platforms (FreeBSD and Linux at this time).

Add sequencer workarounds for several chip->chipset interactions.

Correct external SCB corruption problem on aic7895 based cards (3940AUW).

Lots of cleanups resulting from the port to another OS.
2000-09-16 20:02:28 +00:00