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Author SHA1 Message Date
Oleksandr Tymoshenko
63080dcd94 - Fix PCI routing code 2009-07-08 17:20:53 +00:00
Warner Losh
5ac0137013 Fix atomic_store_64 prototype for 64-bit systems. 2009-07-08 06:01:37 +00:00
Warner Losh
902598a268 Turns out this code was right, revert last change. 2009-07-08 06:00:18 +00:00
Warner Losh
59e5dff794 The kernel isn't quite ready for this to be optional... 2009-07-08 05:57:58 +00:00
Oleksandr Tymoshenko
41d99511cb - Fix off-by-one bug in arge_fixup_rx. If mbuf is located 
by the end of the page and even number of bytes long,
    that may cause TLBMiss exception for unallocated address.
- Fix mess with DMA sync opeartions
 2009-07-08 02:21:08 +00:00
Oleksandr Tymoshenko
b661054728 - Move dpcpu initialization to mips_proc0_init. It's 
more appropriate place for it. Besides dpcpu_init
    requires pmap module to be initialized and calling it
    int pmap.c hangs the system
 2009-07-07 19:55:09 +00:00
Warner Losh
4d33e6554c 64-bit fixes: fix printf formats and prefer MIPS_PHYS_TO_KSEG0. 2009-07-06 18:18:27 +00:00
Warner Losh
a371f04d66 GC some now-unused items. Fix for 64-bit build. Note: this breaks 
the 32-bit build (which we're not computing correctly anyway).
 2009-07-06 18:17:48 +00:00
Warner Losh
4df29a25aa 64-bit fixes: 
(1) fix printf formats.
(2) Prefer FreeBSD's MIPS_PHYS_TO_KSEG0 to hand-rolled one from Cavium.
(3) Mark a few 64-bit cleanliness issues (possible).
(4) Minor formatting fixes.
 2009-07-06 18:15:57 +00:00
Warner Losh
9d7dcb83db Minor fixes to printf formats. 2009-07-06 18:12:49 +00:00
Warner Losh
a01f85e046 Only build qdivrem on 32-bit ISA... 
# not sure this is the right selector...
 2009-07-06 08:16:25 +00:00
Warner Losh
e0dab9bcb8 Be more pedantic here. If we're going to shift something 
sizeof(long)*8 / 2 bits, then we better make sure we're shifting a
long that much, not an int.

# I'm surprised this is code would have a bug this basic.
 2009-07-06 08:00:26 +00:00
Warner Losh
4b9aa0a973 Prefer uintptr_t to int cast here. 2009-07-06 07:49:24 +00:00
Warner Losh
26b14c6dde Better types for 64-bit compatibility. Use %p and cast to void * and 
prefer uintptr_t to other int-type casts.
 2009-07-06 07:48:31 +00:00
Warner Losh
f548109087 No need to force mips32 here. 2009-07-06 07:47:39 +00:00
Warner Losh
025e48c64c Pass in the uint64 value, rather than a pointer to it. that's what 
the function expects...
 2009-07-06 07:46:13 +00:00
Warner Losh
e3c2111d5c Use ta0 instead of t4 and ta1 instead of t5. These map to the same 
registers on O32 builds, but t4 and t5 don't exist on N32 or N64.
 2009-07-06 07:45:02 +00:00
Warner Losh
10c8cc2b9f Use better casts for passing the small integer as a pointer here. 
Basically, replace int with uintptr_t.
 2009-07-06 07:43:50 +00:00
Warner Losh
243ab23fcf (1) Improvements for SB1. only allow real memory to be accessed. 
(2) make compile n64 by using more-proper casts.

Submitted by:	Neelkanth Natu (1)
 2009-07-06 07:42:54 +00:00
Warner Losh
b04ad5dd49 The MCOUNT macro isn't going to work in 64-bit mode. Add a note to 
this effect.
 2009-07-06 02:27:03 +00:00
Warner Losh
2967976763 Provide a macro for PTR_ADDU as well. We may need to implement this 
differently for N32...  Use PTR_ADDU in DO_AST macro.
 2009-07-06 02:22:51 +00:00
Warner Losh
54d05c03e5 Change the addu here to daddu. 
addu paranoina prodded by: jmallet@
 2009-07-06 02:22:06 +00:00
Warner Losh
3eecc82e89 addu and subu are special. We need to use daddu and dsubu here to get 
proper behavior.

Submitted by:	jmallet@
 2009-07-05 21:16:26 +00:00
Warner Losh
ece5503dbe (1) Use PTR_LA rather than bare la for N64 goodness (it is dla there) 
(2) SB1 needs COHERENT policy, not cached for the config register

Submitted by:	(2) Neelkanth Natu
 2009-07-05 15:23:54 +00:00
Warner Losh
4f4793e605 use "PTR_LA" in preference to a bare la so it translates to dla on 
64-bit ABIs.
 2009-07-05 15:22:22 +00:00
Warner Losh
add6da074c Now that we define atomic_{load,store}_64 inline in atomic.h, we don't 
need to define them here for the !N64 case.

We now define atomic_readandclear_64 in atomic.h, so no need to repeat
it here.
 2009-07-05 15:21:35 +00:00
Warner Losh
bd34d48210 The SB1 has cohernet memory, so add it. 
Also, Maxmem is better as a long.

Submitted by:	Neelkanth Natu
 2009-07-05 15:20:16 +00:00
Warner Losh
46d854bbdb The SB1 needs a special value for the cache field of the pte. 
Submitted by:	Neelkanth Natu
 2009-07-05 15:19:28 +00:00
Warner Losh
72322b2318 compute the areas to save registers in for 64-bit access correctly. 2009-07-05 15:18:06 +00:00
Warner Losh
f8b89abb9d First cut at 64-bit types. not 100% sure these are all correct for 
N32 ABI.
 2009-07-05 15:17:11 +00:00
Warner Losh
8de20ddba8 Trim unreferenced goo. SDRAM likely should be next, but it is still 
referenced.
 2009-07-05 15:16:27 +00:00
Warner Losh
61a1eed0b4 First cut at atomics for 64-bit machines and SMP machines. 
# Note: Cavium provided a port that has atomics similar to these, but
# that does a syncw; sync; atomic; sync; syncw where we just do the classic
# mips 'atomic' operation (eg ll; frob; sc).  It is unclear to me why
# the extra is needed.  Since my initial target is one core, I'll defer
# investigation until I bring up multiple cores.  syncw is an octeon specific
# instruction.
 2009-07-05 15:13:24 +00:00
Warner Losh
753b803f71 use %p in preference to 0x%08x for printing register_t values. Cast 
them to void * first.  This neatly solves the "how do I print a
register_t" problem because sizeof(void *) is always the same as
sizeof(register_t), afaik.
 2009-07-05 15:10:07 +00:00
Warner Losh
2d3c40cf49 Add config file for SWARM board, a sybyte SB-1-based board by 
Broadcom.  BCM-91250.

Submitted by:	Neelkanth Natu
 2009-07-05 08:40:26 +00:00
Warner Losh
24646e120c Bring in cdefs.h from NetBSD to define ABI goo. 
Obtained from:	NetBSD
 2009-07-05 08:14:00 +00:00
Warner Losh
0d978536b2 Pull in machine/cdefs.h for the ABI definitions. Provide a PTR_LA, 
ala sgi, and use it in preference to a bare 'la' so that it gets
translated to a 'dla' for the 64-bit pointer ABIs.
 2009-07-05 08:13:19 +00:00
Warner Losh
f547073088 Use uintptr_t rather than unsigned here for 64-bit correctness. 2009-07-05 07:01:34 +00:00
Warner Losh
da96ff5dae Define __ELF_WORD_SIZE appropriately for n64. Note for N32 I believe 
this is correct.  While registers are 64-bit, n32 is a 32-bit ABI and
lives in a 32-bit world (with explicit 64-bit registers, however).
Change an 8, which was 4 + 4 or sizeof(int) + SZREG to be a simple '4
+ SZREG' to reflect the actual offset of the structure in question.
 2009-07-05 07:00:51 +00:00
Warner Losh
64003afe2e (1) Use uintptr_t in preference to unsigned. The latter isn't right for 
64-bit case, while the former is.

(2) include a SB1 specific coherency mapping

Submitted by:	Neelkanth Nath (2)
 2009-07-05 06:56:51 +00:00
Warner Losh
220d1e7fb0 Go for broke: configure this to build mips64 N64 binary. 2009-07-05 06:49:56 +00:00
Warner Losh
bca296cba8 Publish PAGE_SHIFT to assembler 
# we should likely phase out PGSHIFT

Submitted by:	Neelkanth Natu
 2009-07-05 06:46:54 +00:00
Warner Losh
4ecfc54d9d db_expr_t should be a intptr_t, not an int. These expressions can be 
addresses or numbers, and that's a intptr_t if I ever saw one.
 2009-07-05 06:44:37 +00:00
Warner Losh
6855d90580 Define COP0_SYNC for SB1 CPU. 
Submitted by:	Neelkanth Natu
 2009-07-05 06:43:01 +00:00
Warner Losh
2c1c8bb345 Switch to ABI agnostic ta0-ta3. Provide defs for this in the right 
places.  Provide n32/n64 register name defintions.  This should have
no effect for the O32 builds that everybody else uses, but should help
make N64 builds possible (lots of other changes are needed for that).

Obtained from:	NetBSD (for the regdef.h changes)
 2009-07-05 06:39:37 +00:00
Warner Losh
561a3cc1a1 Move from using the lame invalid address I chose when trying to get 
Octeon going...  Turns out that you get tlb shutdowns with this...
Use PGSHIFT instead of PAGE_SHIFT.

Submitted by:	Neelkanth Natu
 2009-07-04 03:22:34 +00:00
Warner Losh
f94784e818 Add sibyte device support. 
Submitted by:	Neelkanth Natu
 2009-07-04 03:05:48 +00:00
Warner Losh
c72a141e81 Fix various conolse issues with cfe after MPSAFE tty. 
Fix a bug with getting env on cfe...
 2009-07-04 02:50:33 +00:00
Warner Losh
579c0614d5 Merge in new cfe environment passing of kenv for swarm/sibyte boards. 
Submitted by:	Neelkanth Natu
 2009-07-04 02:49:17 +00:00
Oleksandr Tymoshenko
09c817ba36 - MFC 2009-07-03 04:39:18 +00:00
Edward Tomasz Napierala
340263c992 Fix fpathconf(3) on fifos, in effect making ls(1) properly 
display '+' on them.  Taken from kern/125613, with cosmetic
changes.

PR:		kern/125613
Submitted by:	Jaakko Heinonen <jh at saunalahti dot fi>
Approved by:	re (kib)
 2009-07-02 20:05:21 +00:00