Commit Graph

122231 Commits

Author SHA1 Message Date
Mark Johnston
6514b4f061 Add GET_STACK_USAGE() for arm64.
Its absence meant that GEOM direct dispatch was disabled (the service
routines check the current thread's stack usage to determine whether
to hand off the request to a dedicated thread), and this change is
sufficient to enable direct dispatch by default.

Reviewed by:	allanjude
MFC after:	2 weeks
Differential Revision:	https://reviews.freebsd.org/D15527
2018-05-23 15:43:35 +00:00
Alexander Motin
af66b67ab2 Add ready polling after PHY reset on VIA SATA controllers.
According to PR there are cases of controller hang if soft reset is
sent before device report ready status after the hard reset.

I don't think this patch is perfect, but it was reported as working
by the submitter, and I have neither the old hardware nor interest to
test some improved version, so just done some style cleaning.

PR:		183294
Submitted by:	alexandre.martins@netasq.com
MFC after:	1 month
2018-05-23 15:22:58 +00:00
Luca Pizzamiglio
11d416666d Improve MAC address uniqueness on if_epair(4).
As reported in PR184149, it can happen that epair devices can have the same
MAC address.
This solution is based on a 32-bit hash, obtained combining the if_index of
the a interface and the hostid.
If the hostid is zero, a random number is used.

PR:		184149
Reviewed by:	wollman, eugen
Approved by:	cognet
Differential Revision:	https://reviews.freebsd.org/D15329
2018-05-23 13:10:57 +00:00
Mateusz Guzik
6fee84e35e Remove incorrect owepreempt assertion added in r334062
Yet another preemption request hitting between the counter being 0
and the check being reached will result in the flag no longer being
set.

Note the situation was already present prior to r334062 and is harmless.

Reported by:	pho
Reviewed by:	kib
2018-05-23 10:13:17 +00:00
Eitan Adler
ae4cfcdf30 mrsas(4): Remove unneed extra arg from MR_LdBlockSizeGet().
Obtained From: DragonFly (482292f9859e1ceae4f35343c0a8eac4c4486d1)
2018-05-23 07:39:00 +00:00
Matt Macy
89a1c07ac6 Bump FreeBSD_version after r333813 2018-05-23 06:15:55 +00:00
Matt Macy
8a656309b3 kern_sendit: use pre-initialized rights 2018-05-23 01:48:09 +00:00
Ilya Bakulin
96e47614f9 Implement initial MMC partitions support for MMCCAM.
For MMC cards, add partitions found on the card as separate disk(9) devices.
Don't do anything with RPMB partition for now.
Lots of code is copied almost 1:1 from the mmcsd.c in the old stack,
credits Marius Strobl (marius@FreeBSD.org)

Reviewed by:	marius
Approved by:	imp (mentor)
Differential Revision:	https://reviews.freebsd.org/D12762
2018-05-22 22:16:49 +00:00
Konstantin Belousov
e3fab0ff2b Fix UP build.
Reported by:	jhb
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
2018-05-22 20:50:19 +00:00
Ed Maste
03ba5353ce if_muge: only attach to LAN7800 Chip ID
This driver was developed for the LAN7800 and the register-compatible
LAN7515 (found on Raspberry Pi 3B+) and has only been tested on those
devices.

Sponsored by:	The FreeBSD Foundation
2018-05-22 20:00:56 +00:00
Mateusz Guzik
748b15fc02 Move preemption handling out of critical_exit.
In preperataion for making the enter/exit pair inline.

Reviewed by:	kib
2018-05-22 19:24:57 +00:00
Edward Tomasz Napierala
defd918d79 Add new PIDs for Audio, CDCE, MTP, and Mass Storage, from
https://github.com/obdev/v-usb/blob/master/usbdrv/USB-IDs-for-free.txt.

Big thanks to Christian Starkjohann for allocating those.

MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
2018-05-22 19:11:06 +00:00
Mark Johnston
f9a2008690 Fix the definition of td_startzero after r333466. 2018-05-22 16:33:09 +00:00
Ilya Bakulin
7fbf511890 Fix MMCCAM scanning for new cards.
r326645 used an incorrect argument for xpt_path_inq().

Reviewed by:	imp (mentor)
Differential Revision:	https://reviews.freebsd.org/D15521
2018-05-22 16:32:34 +00:00
Navdeep Parhar
80259b6c12 cxgbe(4): Only valid filters are expected to have a valid tid. 2018-05-22 16:23:14 +00:00
Mark Johnston
a99ee60b9a Ensure that "m" is initialized in vm_page_alloc_freelist_domain().
While here, remove a superfluous comment.

Coverity CID:	1383559
MFC after:	3 days
2018-05-22 16:19:48 +00:00
Andrew Turner
1442afc1c7 Handle reserved memory with the no-map property.
We shouldn't be mapping this memory, so we need to find it so it
can be excluded from the phys_avail map.

Reviewed by:	manu
Obtained from:	ABT Systems Ltd
Sponsored by:	Turing Robotic Industries
Differential Revision:	https://reviews.freebsd.org/D15518
2018-05-22 16:03:41 +00:00
Mark Johnston
9f78e2b83d Initialize the dumper struct before calling set_dumper().
Fields owned by the generic code were being left uninitialized,
causing problems in clear_dumper() if an error occurred.

Coverity CID:	1391200
X-MFC with:	r333283
2018-05-22 16:01:56 +00:00
Fabien Thomas
f8e73c47d8 Add a SPD cache to speed up lookups.
When large SPDs are used, we face two problems:

- too many CPU cycles are spent during the linear searches in the SPD
  for each packet
- too much contention on multi socket systems, since we use a single
  shared lock.

Main changes:

- added the sysctl tree 'net.key.spdcache' to control the SPD cache
  (disabled by default).
- cache the sp indexes that are used to perform SP lookups.
- use a range of dedicated mutexes to protect the cache lines.

Submitted by: Emeric Poupon <emeric.poupon@stormshield.eu>
Reviewed by: ae
Sponsored by:	Stormshield
Differential Revision: https://reviews.freebsd.org/D15050
2018-05-22 15:54:25 +00:00
Andrew Turner
84cac654ae Revert r334035 for now. It breaks the boot on some boards as er expect to
be able to read UEFI RuntimeData memory via the DMAP region.
2018-05-22 15:52:11 +00:00
Mark Johnston
be9292a8c9 Typo.
Reported by:	rgrimes, vangyzen
X-MFC with:	r334050
2018-05-22 15:49:23 +00:00
Mark Johnston
6030b0c672 Flush caches before initiating a microcode update on Intel CPUs.
This apparently works around issues with updates of certain Broadwell
CPUs.

Reviewed by:	emaste, kib, sbruno
MFC after:	3 days
Differential Revision:	https://reviews.freebsd.org/D15520
2018-05-22 15:38:51 +00:00
Mark Johnston
db5a36bddf Simplify lagg_input().
No functional change intended.

MFC after:	2 weeks
2018-05-22 15:35:38 +00:00
Mateusz Guzik
ee252fc995 sx: fixup a braino in r334024
If a thread waiting on sx dropped Giant it would not be properly
reacquired on exit from the routine, later resulting in panics
indicating Giant is not held (when it should be).

The bug was not present in the original patch sent to pho, I wittingly
added it just prior to the commit and only smoke-tested it.

Reported by:	pho
2018-05-22 15:13:25 +00:00
Andrew Turner
3a327967cc Pass the array length into regions_to_avail.
On arm64 we will need to get the phys_avail array from before the kernel
is excluded to create teh DMAP region. In preperation for this pass in the
array length into regions_to_avail.
2018-05-22 14:26:58 +00:00
Konstantin Belousov
82a4284d4b Use local unique labels inside most often used macros.
Discussed with:	bde
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
2018-05-22 13:45:40 +00:00
Konstantin Belousov
a3c7cd11d2 Fix double-load of %cr3 and double-copy of the stack frame for the
kernel entry from userspace vm86.

Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
2018-05-22 13:30:56 +00:00
Andrey V. Elsukov
67ad3c0bf9 Restore the ability to keep states after parent rule deletion.
This feature is disabled by default and was removed when dynamic states
implementation changed to be lockless. Now it is reimplemented with small
differences - when dyn_keep_states sysctl variable is enabled,
dyn_match_ipv[46]_state() function doesn't match child states of deleted
rule. And thus they are keept alive until expired. ipfw_dyn_lookup_state()
function does check that state was not orphaned, and if so, it returns
pointer to default_rule and its position in the rules map. The main visible
difference is that orphaned states still have the same rule number that
they have before parent rule deleted, because now a state has many fields
related to rule and changing them all atomically to point to default_rule
seems hard enough.

Reported by:	<lantw44 at gmail.com>
MFC after:	2 days
2018-05-22 13:28:05 +00:00
Konstantin Belousov
14f7050dba Enable IBRS when entering an interrupt handler from usermode.
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
2018-05-22 13:25:15 +00:00
Andrew Turner
5a00bf535c Only set realmem based on memory where the EXFLAG_NOALLOC is unset. This
will allow us to query the maps at any time without disturbing this value.

Obtained from:	ABT Systems Ltd
Sponsored by:	Turing Robotic Industries
2018-05-22 13:21:44 +00:00
Andrew Turner
89b5faf887 On ThunderX2 we need to be careful to only map the memory the firmware
lists in the EFI memory map. As such we need to reduce the mappings to
restrict them to not be the full 1G block. For now reduce this to a 2M
block, however this may be further restricted to be 4k page aligned as
other SoCs may require.

This allows ThunderX2 to boot reliably to userspace without performing
any speculative memory accesses to invalid physical memory.

Sponsored by:	DARPA, AFRL
2018-05-22 11:26:41 +00:00
Andrew Turner
9d0728e04e Stop using the DMAP region to map ACPI memory.
On some arm64 boards we need to access memory in ACPI tables that is not
mapped in the DMAP region. To handle this create the needed mappings in
pmap_mapbios in the KVA space.

Submitted by:	Michal Stanek (mst@semihalf.com)
Sponsored by:	Cavium
Differential Revision:	https://reviews.freebsd.org/D15059
2018-05-22 11:16:45 +00:00
Andrew Turner
79402150c1 Switch arm64 to use the same physmem code as 32-bit arm.
The main advantage of this is to allow us to exclude memory from being
used by the kernel. This may be from the memreserve property, or ranges
marked as no-map under the reserved-memory node.

More work is still needed to remove the physmap array. This is still used
for creating the DMAP region, however other patches need to be committed
before we can remove this.

Obtained from:	ABT Systems Ltd
Sponsored by:	Turing Robotic Industries
2018-05-22 11:07:04 +00:00
Andrew Turner
66971d57e9 Allow the 32-bit arm physmem code to work on arm64.
This will help simplify the arm64 code and allow us to properly exclude
memory that should never be mapped.

Obtained from:	ABT Systems Ltd
Sponsored by:	Turing Robotic Industries
2018-05-22 10:31:06 +00:00
Andrew Turner
89ae4d7f7a Coalesce adjacent physical mappings.
This reduces the overhead when we have many small mappings, e.g. on some
EFI systems. This is to help use this code on arm64 where we may have a
large number of entries from the EFI firmware.

Obtained from:	ABT Systems Ltd
Sponsored by:	Turing Robotic Industries
Differential Revision:	https://reviews.freebsd.org/D15477
2018-05-22 10:14:20 +00:00
Roger Pau Monné
ffe4446b33 xen-blkback: do not use state 3 (XenbusStateInitialised)
Linux will not connect to a backend that's in state 3
(XenbusStateInitialised), it needs to be in state 2
(XenbusStateInitWait) for Linux to attempt to connect to the backend.

The protocol seems to suggest that the backend should indeed wait in
state 2 for the frontend to connect, which makes state 3 unusable for
disk backends.

Also make sure blkback will connect to the frontend if the frontend
reaches state 3 (XenbusStateInitialised) before blkback has processed
the results from the hotplug script (Submitted by Nathan Friess).

MFC after:	1 week
2018-05-22 08:51:16 +00:00
Mateusz Guzik
99ece3a9cd Reduce sdt-related branch-fest in mi_switch.
The code was evaluating flags before resorting to checking if dtrace is
enabled. This was inducing forward jumps in the common case.
2018-05-22 08:27:33 +00:00
Mateusz Guzik
2466d12b09 sx: port over writer starvation prevention measures from rwlock
A constant stream of readers could completely starve writers and this is not
a hypothetical scenario.

The 'poll2_threads' test from the will-it-scale suite reliably starves writers
even with concurrency < 10 threads.

The problem was run into and diagnosed by dillon@backplane.com

There was next to no change in lock contention profile during -j 128 pkg build,
despite an sx lock being at the top.

Tested by:	pho
2018-05-22 07:20:22 +00:00
Mateusz Guzik
9feec7ef69 rw: decrease writer starvation
Writers waiting on readers to finish can set the RW_LOCK_WRITE_SPINNER
bit. This prevents most new readers from coming on. However, the last
reader to unlock also clears the bit which means new readers can sneak
in and the cycle starts over.

Change the code to keep the bit after last unlock.

Note that starvation potential is still there: no matter how many write
spinners are there, there is one bit. After the writer unlocks, the lock
is free to get raided by readers again. It is good enough for the time
being.

The real fix would include counting writers.

This runs into a caveat: the writer which set the bit may now be preempted.
In order to get rid of the problem all attempts to set the bit are preceeded
with critical_enter.

The bit gets cleared when the thread which set it goes to sleep. This way
an invariant holds that if the bit is set, someone is actively spinning and
will grab the lock soon. In particular this means that readers which find
the lock in this transient state can safely spin until the lock finds itself
an owner (i.e. they don't need to block nor speculate how long to spin
speculatively).

Tested by:	pho
2018-05-22 07:16:39 +00:00
Matt Macy
df58dad520 pmc: annotate locking for po_ssnext in pmc_owner 2018-05-22 05:49:40 +00:00
Matt Macy
137fd41bd9 fix i386 builds after r334005 and r334009
r334005: add pc_ibpb_set as it is now referenced by common code
(although presumably not needed on i386 since it has been there
since the first spectre mitigation work on amd64)

r334009: there is no amd64 rflags -> i386 eflags
2018-05-22 05:09:33 +00:00
Justin Hibbits
1a3eaf6cc8 Add an IPMI attachment for PowerNV systems
IPMI access on PowerNV systems is done through the OPAL firmware.  This adds a
simple attachment for communicating with the FSP/BMC on these machines.  This
has been tested on a Talos POWER9 workstation, only in the bootup phase, noting
the successful attachment messages:

...
ipmi0: IPMI device rev. 0, firmware rev. 2.00, version 2.0, device support mask 0
ipmi0: Number of channels 2
...

The ipmi device has not been added to GENERIC64, but may be after further
testing.  It may also eventually be added to the ipmi module at that point.
2018-05-22 03:57:32 +00:00
Justin Hibbits
5272c9bd07 Add a comment explaining the need of a global temporary variable
cpu_xirr is used only as a temporary location for the OPAL call in
PIC_DISPATCH().

Requested by:	nwhitehorn
2018-05-22 03:24:16 +00:00
Justin Hibbits
9c6ba29de1 Basic OPAL sensor support for POWER9 platforms
Summary:
PowerNV architectures (in the test case POWER9) export sensors via the device
tree, which are accessed via OPAL calls.  This adds sysctl nodes for each
device in a generic fashion.  New sysctl nodes are:

dev.opal_sensor.N.sensor
dev.opal_sensor.N.sensor_min
dev.opal_sensor.N.sensor_max
dev.opal_sensor.N.type
dev.opal_sensor.N.label

These are rooted at a parent attachment under opal, called opalsens.  This does
not add support for the "sensor groups" defined in the device tree.

Reviewed by:	breno.leitao_gmail.com
Differential Revision: https://reviews.freebsd.org/D15362
2018-05-22 02:42:53 +00:00
John Baldwin
9e2154ff1c Cleanups related to debug exceptions on x86.
- Add constants for fields in DR6 and the reserved fields in DR7.  Use
  these constants instead of magic numbers in most places that use DR6
  and DR7.
- Refer to T_TRCTRAP as "debug exception" rather than a "trace trap"
  as it is not just for trace exceptions.
- Always read DR6 for debug exceptions and only clear TF in the flags
  register for user exceptions where DR6.BS is set.
- Clear DR6 before returning from a debug exception handler as
  recommended by the SDM dating all the way back to the 386.  This
  allows debuggers to determine the cause of each exception.  For
  kernel traps, clear DR6 in the T_TRCTRAP case and pass DR6 by value
  to other parts of the handler (namely, user_dbreg_trap()).  For user
  traps, wait until after trapsignal to clear DR6 so that userland
  debuggers can read DR6 via PT_GETDBREGS while the thread is stopped
  in trapsignal().

Reviewed by:	kib, rgrimes
MFC after:	1 month
Differential Revision:	https://reviews.freebsd.org/D15189
2018-05-22 00:45:00 +00:00
Emmanuel Vadot
b091392eb8 aw_mmc: Correctly reset the mmc controller
Always disable FIFO access as we don't use it.
Rename some register bits so they are in sync with the register name.

While here add my copyright as I've probably wrote 70% of the code here.
2018-05-21 21:15:46 +00:00
Konstantin Belousov
3621ba1ede Add Intel Spec Store Bypass Disable control.
Speculative Store Bypass (SSB) is a speculative execution side channel
vulnerability identified by Jann Horn of Google Project Zero (GPZ) and
Ken Johnson of the Microsoft Security Response Center (MSRC)
https://bugs.chromium.org/p/project-zero/issues/detail?id=1528.
Updated Intel microcode introduces a MSR bit to disable SSB as a
mitigation for the vulnerability.

Introduce a sysctl hw.spec_store_bypass_disable to provide global
control over the SSBD bit, akin to the existing sysctl that controls
IBRS. The sysctl can be set to one of three values:
0: off
1: on
2: auto

Future work will enable applications to control SSBD on a per-process
basis (when it is not enabled globally).

SSBD bit detection and control was verified with prerelease microcode.

Security:	CVE-2018-3639
Tested by:	emaste (previous version, without updated microcode)
Sponsored by:	The FreeBSD Foundation
MFC after:	3 days
2018-05-21 21:08:19 +00:00
Konstantin Belousov
9be4bbbb21 Add definition for Intel Speculative Store Bypass Disable MSR bits
Security:	CVE-2018-3639
Sponsored by:	The FreeBSD Foundation
MFC after:	3 days
2018-05-21 21:07:13 +00:00
Konstantin Belousov
2320153fcc Preserve other bits in IA32_SPEC_CTL MSR when changing the IBRS and
STIBP states.

Tested by:	emaste (previous version)
Sponsored by:	The FreeBSD Foundation
MFC after:	3 days
2018-05-21 21:05:55 +00:00
Andriy Gapon
a23a4e68fa uchcom: extend hardware support to version 0x30
This change adds support for a UBS<->RS232 adapter based on CH340 (or an
analogue) that I own.  The device seems to have a newer internal version
(0x30) and the existing code incorrectly configures line control for it
resulting in garbled transmission.  The changes are based on what I
learned in Linux drivers for the same hardware.

Additional changes:
- use UCHCOM_REG_LCR1 / UCHCOM_REG_LCR2 instead of explicit 0x18 and
  0x25
- use NULL instead of 0 where a pointer is expected

Reviewed by:	hselasky
MFC after:	3 weeks
Differential Revision: https://reviews.freebsd.org/D15498
2018-05-21 21:04:31 +00:00