Commit Graph

2797 Commits

Author SHA1 Message Date
Julian Elischer
6a9344d45a Add an explanatory note that would have saved me an hour or two
of confusion had it been there when I started reading the code..
2001-08-25 01:16:47 +00:00
John Baldwin
e5dfa86a70 Axe a commented, unused #define related to the old giant lock. 2001-08-24 16:52:31 +00:00
John Baldwin
a0f831f573 Remove references to the old giant kernel lock in various comments. 2001-08-24 16:46:15 +00:00
Peter Wemm
c1c2006ca7 Export the actual KERNBASE to the symbol table. We can use nlist() to get
this without having to second guess it in userland.
2001-08-24 08:29:54 +00:00
Peter Wemm
5897d41109 Move cpu_fxsr definition to C code (so debug info is generated) and where
it is easily #ifdef'ed so that we dont miss unintentional references to it.
2001-08-24 08:27:24 +00:00
Peter Wemm
66875a2aff Fix a comment error that was fixed in the pc98 version. hw.maxmem is
really hw.physmem.
2001-08-23 01:49:12 +00:00
Peter Wemm
9f9360003f Dont add UPAGES to the %cs segment limit. There is nothing there except
page tables.
2001-08-23 01:25:21 +00:00
Peter Wemm
3b703181e3 Dont compile in SSE fxsave/fxrstor instructions if CPU_ENABLE_SSE isn't
active.
2001-08-23 01:03:56 +00:00
Mitsuru IWASAKI
e4e9098988 Move CR4.PGE enabling code after paging is enabled via CR0.PG based on
the description (2.5. CONTROL REGISTERS) of Intel developer's manual at:
ftp://download.intel.com/design/PentiumII/manuals/24319202.pdf

Reviewed by:	peter, bde, tlambert2@mindspring.com
Pointed-out by:	"Shin'ya Kumabuchi" <kumabu@t3.rim.or.jp>
MFC after:	1 week
2001-08-22 15:41:43 +00:00
Matthew Dillon
219d632c15 Move most of the kernel submap initialization code, including the
timeout callwheel and buffer cache, out of the platform specific areas
and into the machine independant area.  i386 and alpha adjusted here.
Other cpus can be fixed piecemeal.

Reviewed by:    freebsd-smp, jake
2001-08-22 04:07:27 +00:00
Peter Wemm
3d6fde76ed Introduce two new sysctl's.. vm.kvm_size and vm.kvm_free. These are
purely informational and can give some advance indications of tuning
problems.  These are i386 only for now as it seems that the i386 is
the only one suffering kvm pressure.
2001-08-22 00:50:46 +00:00
John Baldwin
3a9e0f5bd1 Push down Giant some in trap_pfault() so we don't grab Giant around
trap_fatal() to make restarting from panic's slightly easier.  Before if
one did 'w 0 0' in ddb, the longjmp in ddb inside of trap_fatal() would
result in Giant being held (or recursed one level deeper) which led to
problems later on.  You can now drop to teh debugger, do 'w 0 0', and
continue w/o a problem.
2001-08-21 23:15:25 +00:00
Warner Losh
0b9427de88 The general conesnsus on irc was that pci bios for config registers
and such was just a bad idea and one that users should be forced to
enable if they want it.  This patch introduces a hw.pci.enable_pcibios
tunable for those people.  This does not impact the pcibios interrupt
routing at all.

Approved by: peter, msmith
2001-08-21 07:53:37 +00:00
Matthew Dillon
6db5812aef Fix bug in physmem_est calculation - the kernel_map size was not being
converted into pages.

Fix bug in maxbcache calculation, nbuf must be tested against maxbcache
rather then physmem_est.

Obtained from:	bde
2001-08-21 07:20:06 +00:00
Peter Wemm
573be82757 Detect a certain type of PCIBIOS brain damage. For some reason,
some bios vendors took it apon themselves to "censor" the
host->pci bridges from PCIBIOS callers, even when the caller
explicitly asks for them.  This includes certain Compaq machines
(eg: DL360) and some laptops.

If we detect this, shut down pcibios and revert to using IO
port bashing.

Under -current, apcica does a better job anyway.
2001-08-21 03:10:55 +00:00
Peter Wemm
e8ebc08f80 Make COMPAT_43 optional again. XXX we need COMPAT_FBSD3 etc for this
stuff.
2001-08-21 02:32:59 +00:00
Matthew Dillon
2f9e4e8025 Limit the amount of KVM reserved for the buffer cache and for swap-meta
information.  The default limits only effect machines with > 1GB of ram
and can be overriden with two new kernel conf variables VM_SWZONE_SIZE_MAX
and VM_BCACHE_SIZE_MAX, or with loader variables kern.maxswzone and
kern.maxbcache.  This has the effect of leaving more KVM available for
sizing NMBCLUSTERS and 'maxusers' and should avoid tripups where a sysad
adds memory to a machine and then sees the kernel panic on boot due to
running out of KVM.

Also change the default swap-meta auto-sizing calculation to allocate half
of what it was previously allocating.  The prior defaults were way too high.
Note that we cannot afford to run out of swap-meta structures so we still
stay somewhat conservative here.
2001-08-20 00:41:12 +00:00
Peter Wemm
4faa812afa There is nothing special that requires SSE to be only on 686 class cpus.
This enables 586-only SMP kernels to compile again.

Problem reported by:  Jacek Jedrzejczak <jacol@ids.gda.pl>
2001-08-18 04:04:45 +00:00
David E. O'Brien
589278dbae style(9) and make consistent across platforms 2001-08-16 09:29:35 +00:00
Bill Paul
3708f8da9c Teach bus_dmamem_free() about contigfree(). This is a bit of a hack,
but it's better than the buggy behavior we have now. If we contigmalloc()
buffers in bus_dmamem_alloc(), then we must configfree() them in
bus_dmamem_free(). Trying to free() them is wrong, and will cause
a panic (at least, it does on the alpha.)

I tripped over this when trying to kldunload my busdma-ified if_rl
driver.
2001-08-15 17:26:54 +00:00
John Baldwin
2be7b27a41 Whitespace fixes to make this mostly fit in 80 columns. 2001-08-15 16:57:12 +00:00
Bruce Evans
3d66f80905 Use interrupt gates instead of trap gates for breakpoint and trace
traps, so that ddb can keep control (almost) no matter how it is
entered.  This breaks time-critical interrupts while the system is
stopped in ddb, but I haven't noticed any significant problems except
that applications become confused about the time.  Lost time will be
adjusted for later.  Anyway, the half-baked disabling of interrupts in
Debugger() gives the same problems for the usual way of entering ddb.
2001-08-13 13:22:50 +00:00
Bruce Evans
d072acf902 Removed he BPTTRAP() macro and its use. It was intended for restoring
bug for bug compatibility to ddb trap handlers after fixing the debugger
trap gates to be interrupt gates, but the fix was never committed.  Now
I want the fix to apply to ddb.
2001-08-13 12:42:13 +00:00
Mitsuru IWASAKI
dfc356335a Fix some trivial bugs.
- fix segment limit mis-calculation for GCODE_SEL, GDATA_SEL, GPRIV_SEL,
   LUCODE_SEL and LUDATA_SEL.
 - move `loader(8) metadata' related printf() after cninit().
 - use atop macro (address to pages) for segment limit calculation
   instead of i386_btop macro (bytes to pages).
 - fix style bugs for the declarations of ints.

Reviewed by:    bde, msmith (and arch & audit ML)
2001-08-12 08:37:39 +00:00
John Baldwin
688ebe120c - Close races with signals and other AST's being triggered while we are in
the process of exiting the kernel.  The ast() function now loops as long
  as the PS_ASTPENDING or PS_NEEDRESCHED flags are set.  It returns with
  preemption disabled so that any further AST's that arrive via an
  interrupt will be delayed until the low-level MD code returns to user
  mode.
- Use u_int's to store the tick counts for profiling purposes so that we
  do not need sched_lock just to read p_sticks.  This also closes a
  problem where the call to addupc_task() could screw up the arithmetic
  due to non-atomic reads of p_sticks.
- Axe need_proftick(), aston(), astoff(), astpending(), need_resched(),
  clear_resched(), and resched_wanted() in favor of direct bit operations
  on p_sflag.
- Fix up locking with sched_lock some.  In addupc_intr(), use sched_lock
  to ensure pr_addr and pr_ticks are updated atomically with setting
  PS_OWEUPC.  In ast() we clear pr_ticks atomically with clearing
  PS_OWEUPC.  We also do not grab the lock just to test a flag.
- Simplify the handling of Giant in ast() slightly.

Reviewed by:	bde (mostly)
2001-08-10 22:53:32 +00:00
Peter Wemm
2aca0c28d3 Zap 'ptrace(PT_READ_U, ...)' and 'ptrace(PT_WRITE_U, ...)' since they
are a really nasty interface that should have been killed long ago
when 'ptrace(PT_[SG]ETREGS' etc came along.  The entity that they
operate on (struct user) will not be around much longer since it
is part-per-process and part-per-thread in a post-KSE world.

gdb does not actually use this except for the obscure 'info udot'
command which does a hexdump of as much of the child's 'struct user'
as it can get.  It carries its own #defines so it doesn't break
compiles.
2001-08-08 05:25:15 +00:00
Nate Williams
3633ea98d7 - Removed comment about ThinkPad keyboards from the PCVT line. Any ThinkPad
that needs this probably won't run -current, as it's at least 5 years old.
2001-08-05 21:56:11 +00:00
Jake Burkholder
7e5102989e Use a machine dependent type, Elf_Hashelt, for the elements of the elf
dynamic symbol table buckets and chains.  The sparc64 toolchain uses 32
bit .hash entries, unlike other 64 bits architectures (alpha), which use
64 bit entries.

Discussed with: dfr, jdp
2001-07-31 03:46:39 +00:00
Peter Wemm
0b27d7104f Make PMAP_SHPGPERPROC tunable. One shouldn't need to recompile a kernel
for this, since it is easy to run into with large systems with lots of
shared mmap space.

Obtained from:	yahoo
2001-07-27 01:08:59 +00:00
Peter Wemm
3e02a8711a MASK_FPU_SW didn't do what it was expected to do. 2001-07-26 23:47:04 +00:00
Peter Wemm
bd40659f85 Call the early tunable setup functions as soon as kern_envp is available.
Some things depend on hz being set not long after this.
2001-07-26 23:06:44 +00:00
Bosko Milekic
49f854f926 - Do not handle the per-CPU containers in mbuf code as though the cpuids
were indices in a dense array. The cpuids are a sparse set and treat
  them as such, setting up containers only for CPUs activated during
  mb_init().

- Fix netstat(1) and systat(1) to treat the per-CPU stats area as a sparse
  map, in accordance with the above.

This allows us to properly boot with certain CPUs disactivated. However, if
we later decide to re-activate said CPUs, we will barf until we decide to
implement CPU spinon/spinoff callback hooks to allow for said CPUs' per-CPU
containers to get configured on their activation.

Reported by: mjacob
Partially (sys/ diffs) Submitted by: mjacob
2001-07-26 18:47:46 +00:00
Bill Paul
362c5c1e02 You were knocked senseless by the Boomerang, spun around by the Cyclone,
blown over by the Hurricane and had a house dropped on you by the Tornado.
Now it's time to have your parade rained on by... the Typhoon!

This commit adds driver support for 3Com 3cR990 10/100 ethernet
adapters based on the Typhoon I and Typhoon II chipsets. This is actually
a port of the OpenBSD driver with many hacks by me.

No Virginia, there isn't any support for the hardware crypto yet. However
there is support for TCP/IP checksum offload and VLANs.

Special thanks go to Jason Wright, Aaron Campbell and Theo de Raadt for
squeezing enough info out of 3Com to get this written, and for doing
most of the hard work.

Manual page is included. Compiled as a module and included in GENERIC.
2001-07-23 20:44:54 +00:00
Mitsuru IWASAKI
56d8cb57b9 Don't do sleep state transition if specified sleep state is not
supported by the system.
2001-07-22 19:13:54 +00:00
Mike Smith
bfae45aa43 Convert from acpi_strerror() to AcpiFormatException()
Fix dangling include of the dear departed acpi_ecreg.h
2001-07-21 10:24:37 +00:00
Mike Smith
9d839ea8e4 Update the OSD module to match the ACPI CA 20010717 import.
Submitted by:	"Grover, Andrew" <andrew.grover@intel.com> (OsdHardware.c)
2001-07-21 04:10:01 +00:00
Takanori Watanabe
6161544ca7 Add ACPI S2-S4BIOS Suspend/Resume code.
Some problems may remain.

Reviewed by:iwasaki
2001-07-20 06:07:34 +00:00
Brian S. Dean
3ad234d4ef swtch.s: During context save, use the correct bit mask for clearing
the non-reserved bits of dr7.

         During context restore, load dr7 in such a way as to not
         disturb reserved bits.

machdep.c: Don't explicitly disallow the setting of the reserved bits
           in dr7 since we now keep from setting them when we load dr7
           from the PCB.

           This allows one to write back the dr7 value obtained from
           the system without triggering an EINVAL (one of the
           reserved bits always seems to be set after taking a trace
           trap).

MFC after:	7 days
2001-07-19 04:37:27 +00:00
Kris Kennaway
a081aa7d72 Quiet a variable format-string warning.
MFC after:    1 week
2001-07-19 02:16:24 +00:00
Tor Egge
e55bc0a096 The per-cpu temporary buffers are not needed since the pcb_save areas have
the proper alignment.  Change dummy variable in npxinit from stack to bss
to ensure proper alignment.

Reviewed by:	bde
2001-07-17 13:06:47 +00:00
Tor Egge
a5d00fe997 Use PCPU_GET(cpuid) instead of curproc->p_oncpu.
Reviewed by:	peter
2001-07-16 06:00:23 +00:00
John Baldwin
ce11a18f0e Fix MCOUNT_ENTER() so it actually compiles in the profiling case.
Pointy hat to:	me
Submitted by:	Danny J. Zerkel <dzerkel@columbus.rr.com>
2001-07-14 21:40:53 +00:00
Dima Dorfman
2e1b1231fc `pcn' supports AMD Am79C97x cards, not Am79C79x cards.
PR:		28946
Submitted by:	Ryuichiro Imura <imura@ryu16.org>
2001-07-13 13:34:08 +00:00
Maxim Sobolev
2ac3543b03 Unbroke kernel if I686_CPU is not defined. 2001-07-13 11:23:06 +00:00
Peter Wemm
28f74b2003 The #define for pcb_savefpu seems to do more harm than good. 2001-07-12 12:48:08 +00:00
Peter Wemm
ad1b7ffaee Fix another missed pcb_savefpu reference (inside NPX_DEBUG) 2001-07-12 12:21:53 +00:00
Peter Wemm
6a25c625b2 Forgot this fix from another tree. make enable_sse() a real prototype. 2001-07-12 11:54:11 +00:00
Peter Wemm
aa32e9a994 Move init_sse() out of the "GenuineIntel" section, my AthlonMP system
has it, for example, and it works fine.
2001-07-12 06:36:03 +00:00
Peter Wemm
9d146ac5d1 Activate SSE/SIMD. This is the extra context switching support that
we are required to do if we let user processes use the extra 128 bit
registers etc.

This is the base part of the diff I got from:
  http://www.issei.org/issei/FreeBSD/sse.html
I believe this is by:  Mr. SUZUKI Issei <issei@issei.org>
SMP support apparently by: Takekazu KATO <kato@chino.it.okayama-u.ac.jp>
Test code by: NAKAMURA Kazushi <kaz@kobe1995.net>, see
  http://kobe1995.net/~kaz/FreeBSD/SSE.en.html

I have fixed a couple of style(9) deviations.  I have some followup
commits to fix a couple of non-style things.
2001-07-12 06:32:51 +00:00
Brian S. Dean
17bbfb5897 Add 'hwatch' and 'dhwatch' ddb commands analogous to 'watch' and
'dwatch'.  The new commands install hardware watchpoints if supported
by the architecture and if there are enough registers to cover the
desired memory area.

No objection by: audit@, hackers@

MFC after: 2 weeks
2001-07-11 03:15:25 +00:00