Original if_dwc driver used m_defrag as an implementation shortcut but on
1000Mb networks it affects performance. Implement multi-descriptor support for
TX path.
Tested on RK3399-Firefly, patch adds ~15% of network throughput.
Reviewed By: manu
Differential Revision: https://reviews.freebsd.org/D27520
DTS node can have this property which configure the burst length
for both TX and RX if it's the same.
This unbreak if_dwc on Allwinner A20 and possibly other boards that
uses this prop.
Reported by: qroxana <qroxana@mail.ru>
Do not hardcode what we setup for the DMA engine configuration but
lookup the fdt properties and configuring accordingly.
Use a default value of 8 for the burst dma length for both TX and
RX, this is what we used for TX before.
- Do not rely on U-Boot for clocks configuration, enable and set frequencies
in the driver's attach method.
- Adjust MAC settings according to detected linespeed on RK3399 and RK3328.
- Add support for RMII PHY mode on RK3328.
Reviewed by: manu
Differential Revision: https://reviews.freebsd.org/D26006
- refactorize packet receive path. Make sure that we don't leak mbufs
and/or that we don't create holes in RX descriptor ring
- slightly simplify handling with TX descriptors
MFC after: 4 weeks
By using DWC TRM terminology, normal descriptor format should be named
extended and alternate descriptor format should be named normal.
Should not been functional change.
MFC after: 4 weeks
Use naming nomenclature used in DesignWare TRM.
This driver was written by using Altera (now Intel) documentation for Arria
FPGA manual. Unfortunately this manual used very different (and in some cases
opposite naming) for registers and descriptor fields. Unfortunately,
this makes future expansion extremely hard.
Should not been functional change.
MFC after: 4 weeks
On rockchip board it seems that the value in the DTS
are not enough for reseting the chip, I don't know if
the value are really incorrect or if DELAY is not precise
enough or if the rockchip gpio driver have some "lag" of some
kind or not.
For now just add more delay.
In some cases, the driver must handle given properties located in
specific OF subnode. Instead of creating duplicate set of function, add
'node' as argument to existing functions, defaulting it to device OF node.
MFC after: 3 weeks
For DWC_GMAC_ALT_DESC implementations, the multicast hash table has only
64 entries. Instead of 8 registers starting at 0x500, a pair of registers
at 0x08 and 0x0c are used instead.
Approved by: re (hrs)
Submitted by: Guy Yur <guyyur@gmail.com>
No functional change, only trivial cases are done in this sweep,
Drivers that can get further enhancements will be done independently.
Discussed in: freebsd-current
This also adds a newbus interface that allows a SoC to override the
following settings:
- if_dwc specific SoC initialization;
- if_dwc descriptor type;
- if_dwc MII clock.
This seems to be an old version of the hardware descriptors but it is
still in use in a few SoCs (namely Allwinner A20 and Amlogic at least).
Tested on Cubieboard2 and Banana pi.
Tested for regressions on Altera Cyclone by br@ (old version).
Obtained from: NetBSD
Previously the OACTIVE flag was being set when the tx descriptors are fully
allocated but it wasn't unset anywhere.
As soon as a packet is transmitted, unset the OACTIVE flag and call start
routine to push any pending packets from the tx queue.
This closes another race where a full tx queue would jam the tx path (tx
queue is full, new packets cannot be added to queue and dwc_txstart never
gets called).
