Commit Graph

15 Commits

Author SHA1 Message Date
Landon J. Fuller
caeff9a3c2 bhnd(4): implement MIPS and PCI(e) interrupt support
On BHND MIPS SoCs, this replaces the use of hard-coded MIPS IRQ#s in the
common bhnd(4) core drivers; we now register an INTRNG child PIC that
handles routing of backplane interrupt vectors via the MIPS core.

On BHND PCI devices, backplane interrupt vectors are now routed to the
PCI/PCIe host bridge core when bus_setup_intr() is called, where they are
dispatched by the PCI core via a host interrupt (e.g. INTx/MSI).

The bhndb(4) bridge driver tracks registered interrupt handlers for the
bridged bhnd(4) devices and manages backplane interrupt routing, while
delegating actual bus interrupt setup/teardown to the parent bus on behalf
of the bridged cores.

Approved by:	adrian (mentor, implicit)
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D12518
2017-11-21 23:15:20 +00:00
Landon J. Fuller
89294a783a bhnd: Add support for supplying bus I/O callbacks when initializing an EROM
parser.

This allows us to use the EROM parser API in cases where the standard bus
space I/O APIs are unsuitable. In particular, this will allow us to parse
the device enumeration table directly from bhndb(4) drivers, prior to
full attach and configuration of the bridge.

Approved by:	adrian (mentor)
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D12510
2017-09-27 19:48:34 +00:00
Landon J. Fuller
8e35bf8319 bhnd: Implement bhnd(4) platform device registration.
Add bhnd(4) API for explicitly registering BHND platform devices (ChipCommon,
PMU, NVRAM, etc) with the bus, rather than walking the newbus hierarchy to
discover platform devices. These devices are now also refcounted; attempting
to deregister an actively used platform device will return EBUSY.

This resolves a lock ordering incompatibility with bwn(4)'s firmware loading
threads; previously it was necessary to acquire Giant to protect newbus access
when locating and querying the NVRAM device.

Approved by:	adrian (mentor)
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D12392
2017-09-27 19:44:23 +00:00
Landon J. Fuller
eb23aa8008 Add support for dumping bcma/siba EROM tables to the console via a new
BHND_EROM_DUMP() method.

Dump the EROM tables to the coneole on mips/broadcom devices if bootverbose
is enabled; this functionality is primarily useful when debugging SoC EROM
parsing and device matching issues during early boot.

Reviewed by:	mizhka
Approved by:	adrian (mentor)
Sponsored by:	Plausible Labs
Differential Revision:	https://reviews.freebsd.org/D10122
2017-04-24 18:35:25 +00:00
Landon J. Fuller
591e79bc76 [mips/broadcom]: Early boot NVRAM support
Add support for early boot access to NVRAM variables, using a new
bhnd_nvram_data_getvar_direct() API to support zero-allocation direct
reading of NVRAM variables from a bhnd_nvram_io instance backed by the
CFE NVRAM device.

Approved by:	adrian (mentor)
Differential Revision:	https://reviews.freebsd.org/D9913
2017-03-23 19:29:12 +00:00
Landon J. Fuller
b86f80276b Add MIPS boot support for the BCM4706/Northstar ChipCommon core.
This adds support for matching against a core lookup table when performing
early boot core lookup, and includes the BCM4706/Northstar-specific
ChipCommon core ID in the set of supported ChipCommon cores.

Approved by:	adrian (mentor)
Differential Revision:	https://reviews.freebsd.org/D10033
2017-03-17 22:02:02 +00:00
Landon J. Fuller
f75615f26f Split bcm_mipscore.c into bcm_bmips (BMIPS32/BMIPS3300) and bcm_mips74k
drivers.

The BMIPS32/BMIPS3300 cores use a register layout distinct from the MIPS74K
core, and are only found on siba(4) devices.

Reviewed by:	mizhka
Approved by:	adrian (mentor)
Differential Revision:	https://reviews.freebsd.org/D7791
2016-09-18 21:28:09 +00:00
Landon J. Fuller
111d7cb2e3 Migrate bhndb(4) to the new bhnd_erom API.
Adds support for probing and initializing bhndb(4) bridge state using
the bhnd_erom API, ensuring that full bridge configuration is available
*prior* to actually attaching and enumerating the bhnd(4) child device,
allowing us to safely allocate bus-level agent/device resources during
bhnd(4) bus enumeration.

- Add a bhnd_erom_probe() method usable by bhndb(4). This is an analogue
  to the existing bhnd_erom_probe_static() method, and allows the bhndb
  bridge to discover the best available erom parser class prior to newbus
  probing of its children.
- Add support for supplying identification hints when probing erom
  devices. This is required on early EXTIF-only chipsets, where chip
  identification registers are not available.
- Migrate bhndb over to the new bhnd_erom API, using bhnd_core_info
  records rather than bridged bhnd(4) device_t references to determine
  the bridged chipsets' capability/bridge configuration.
- The bhndb parent (e.g. if_bwn) is now required to supply a hardware
  priority table to the bridge. The default table is currently sufficient
  for our supported devices.
- Drop the two-pass attach approach we used for compatibility with bhndb(4) in
  the bhnd(4) bus drivers, and instead perform bus enumeration immediately,
  and allocate bridged per-child bus-level resources during that enumeration.

Approved by:	adrian (mentor)
Differential Revision:	https://reviews.freebsd.org/D7768
2016-09-04 00:58:19 +00:00
Landon J. Fuller
664a749708 Implement a generic bhnd(4) device enumeration table API.
This defines a new bhnd_erom_if API, providing a common interface to device
enumeration on siba(4) and bcma(4) devices, for use both in the bhndb bridge
and SoC early boot contexts, and migrates mips/broadcom over to the new API.

This also replaces the previous adhoc device enumeration support implemented
for mips/broadcom.

Migration of bhndb to the new API will be implemented in a follow-up commit.


- Defined new bhnd_erom_if interface for bhnd(4) device enumeration, along
  with bcma(4) and siba(4)-specific implementations.
- Fixed a minor bug in bhndb that logged an error when we attempted to map the
  full siba(4) bus space (18000000-17FFFFFF) in the siba EROM parser.
- Reverted use of the resource's start address as the ChipCommon enum_addr in
  bhnd_read_chipid(). When called from bhndb, this address is found within the
  host address space, resulting in an invalid bridged enum_addr.
- Added support for falling back on standard bus_activate_resource() in
  bhnd_bus_generic_activate_resource(), enabling allocation of the bhnd_erom's
  bhnd_resource directly from a nexus-attached bhnd(4) device.
- Removed BHND_BUS_GET_CORE_TABLE(); it has been replaced by the erom API.
- Added support for statically initializing bhnd_erom instances, for use prior
  to malloc availability. The statically allocated buffer size is verified both
  at runtime, and via a compile-time assertion (see BHND_EROM_STATIC_BYTES).
- bhnd_erom classes are registered within a module via a linker set, allowing
  mips/broadcom to probe available EROM parser instances without creating a
  strong reference to bcma/siba-specific symbols.
- Migrated mips/broadcom to bhnd_erom_if, replacing the previous MIPS-specific
  device enumeration implementation.

Approved by:	adrian (mentor)
Differential Revision:	https://reviews.freebsd.org/D7748
2016-09-03 23:57:17 +00:00
Landon J. Fuller
eb175e8bfb [mips/broadcom]: Replace static frequency table with generic PMU clock
handling.


- Extended PWRCTL/PMU APIs to support querying clock frequency during very
  early boot, prior to bus attach.
- Implement generic PMU-based calculation of UART rclk values.
- Replaced use of static frequency tables (bcm_socinfo) with
  runtime-determined values.

Approved by:	adrian (mentor)
Differential Revision:	https://reviews.freebsd.org/D7552
2016-08-27 00:06:20 +00:00
Landon J. Fuller
f90f4b6532 bhnd(4): Initial PMU/PWRCTL power and clock management support.
- Added bhnd_pmu driver implementations for PMU and PWRCTL chipsets,
  derived from Broadcom's ISC-licensed HND code.
- Added bhnd bus-level support for routing per-core clock and resource
  power requests to the PMU device.
- Lift ChipCommon support out into the bhnd module, dropping
  bhnd_chipc.

Reviewed by:	mizhka
Approved by:	adrian (mentor)
Differential Revision:	https://reviews.freebsd.org/D7492
2016-08-27 00:03:02 +00:00
Landon J. Fuller
cb4abe62ba [mips/broadcom] Generic platform_reset() support.
This adds support for performing platform_reset() on all supported
devices, using early boot enumeration of chipc capabilities and
available cores.


- Added Broadcom-specific MIPS CP0 register definitions used by
  BCM4785-specific reset handling.
- Added a bcm_platform structure for tracking chipc/pmu/cfe platform
  data.
- Extended the BCMA EROM API to support early boot lookup of core info
  (including port/region mappings).
- Extended platform_reset() to support PMU, PMU+AOB, and non-PMU
  devices.

Reviewed by:	mizhka
Approved by:	adrian (mentor)
Differential Revision:	https://reviews.freebsd.org/D7539
2016-08-26 20:16:02 +00:00
Landon J. Fuller
e15461c7e9 mips/broadcom: Implement CFE-based EARLY_PRINTF support.
This adds support for EARLY_PRINTF via the CFE console; the aim is to
provide a fix for the otherwise cyclic dependency between PMU discovery
and console printf/DELAY:

- We need to parse the bhnd(4) core table to determine the address (and
  type) of the PMU/PLL registers and calculate the CPU clock frequency.
- The core table parsing code will emit a printf() if a parse error is
  hit.
- Safely calling printf() without EARLY_PRINTF requires a working
  DELAY+cninit, which means we need the PMU.

Errors in core table parsing shouldn't happen, but lack of EARLY_PRINTF
makes debugging more difficult.

Approved by:	adrian (mentor)
Differential Revision:	https://reviews.freebsd.org/D7498
2016-08-17 20:24:14 +00:00
Landon J. Fuller
ff29b85a34 Replace mips/sentry5 with mips/broadcom
The delta between SENTRY5 and BCM was already small due to BCM being
derived from SENTRY5; re-integrating the two avoids the maintenance
overhead of keeping them both in sync with bhnd(4) changes.


- Re-integrate minor SENTRY5 deltas in bcm_machdep.c
- Modify uart_cpu_chipc to allow specifying UART debug/console flags via
  kenv and device hints.
- Switch SENTRY5 to std.broadcom
- Enabled CFI flash support for SENTRY5

Reviewed by:	Michael Zhilin <mizkha@gmail.com> (Broadcom MIPS support)
Approved by:	re (gjb), adrian (mentor)
Differential Revision:	https://reviews.freebsd.org/D6897
2016-06-25 04:34:54 +00:00
Adrian Chadd
041b2de9cc [mips/broadcom] Add initial support for Broadcom MIPS processor
Relies on BHND(4) driver.

There files contains machine-dependent code for Broadcom MIPS processor and
provide UART driver.

This is a work in progress; it and the current bhnd code is enough to boot
on the ASUS RT-N16 and RT-N53 platforms.

Submitted by:	Michael Zhilin <mizhka@gmail.com>
Differential Revision:	https://reviews.freebsd.org/D6251
2016-05-17 00:00:01 +00:00