Commit Graph

109 Commits

Author SHA1 Message Date
Conrad Meyer
1c25420ea8 ioat: Clean up logging
Replace custom Linux-like logging with a thin shim around
device_printf(), when the softc is available.

In ioat_test, shim around printf(9) instead.

Sponsored by:	EMC / Isilon Storage Division
2015-10-22 23:03:33 +00:00
Conrad Meyer
7afbb2638e ioat: Fix some attach/detach issues
Don't run the selftest until after we've enabled bus mastering, or the
DMA engine can't copy anything for our test.

Create the ioat_test device on attach, if so tuned.  Destroy the
ioat_test device on teardown.

Replace deprecated 'CALLOUT_MPSAFE' with correct '1' in callout_init().

Sponsored by:	EMC / Isilon Storage Division
2015-10-22 16:46:21 +00:00
Conrad Meyer
7c69db50df Improve flexibility of ioat_test / ioatcontrol(8)
The test logic now preallocates memory before running the test.

The buffer size is now configurable.  Post-copy verification is
configurable.  The number of copies to chain into one transaction (one
interrupt) is configurable.

A 'duration' mode is added, which repeats the test until the duration
has elapsed, reporting the B/s and transactions completed.

ioatcontrol.8 has been updated to document the new arguments.

Initial limits (on this particular Broadwell-DE) (and when the
interrupts are working) seem to be: 256 interrupts/sec or ~6 GB/s,
whichever limit is more restrictive.

Unfortunately, it seems the interrupt-reset handling on Broadwell isn't
working as intended.  That will be fixed in a later commit.

Sponsored by:	EMC / Isilon Storage Division
2015-10-22 04:38:05 +00:00
Conrad Meyer
b81eee4a22 ioat: Define IOAT_XFERCAP_VALID_MASK and use in ioat_read_xfercap
Instead of ANDing a magic constant later.

Sponsored by:	EMC / Isilon Storage Division
2015-10-22 04:33:05 +00:00
Conrad Meyer
f3e30f9721 ioat: Use correct macro, fix build on i386
Sponsored by:	EMC / Isilon Storage Division
2015-10-13 19:46:12 +00:00
Conrad Meyer
0d1a05d9e6 ioat(4): pci_save/restore_state to persist MSI-X registers over BDXDE reset
Also for BWD devices, per jimharris@.

Reviewed by:	jhb
Approved by:	markj (mentor)
Sponsored by:	EMC / Isilon Storage Division
Differential Revision:	https://reviews.freebsd.org/D3552
2015-09-02 22:48:41 +00:00
Conrad Meyer
4253ea5083 ioat: re-initialize interrupts after resetting hw on BDXDE
Resetting some generations of the I/OAT hardware (just BDXDE for now)
resets the corresponding MSI-X registers.  So, teardown and
re-initialize interrupts after resetting the hardware.

Reviewed by:	jimharris
Approved by:	markj (mentor)
Sponsored by:	EMC / Isilon Storage Division
Differential Revision:	https://reviews.freebsd.org/D3549
2015-09-02 16:48:03 +00:00
Conrad Meyer
8c8e848710 ioat(4): Minor style cleanups
Suggested by:	ngie
Reviewed by:	jimharris
Approved by:	markj (mentor)
Sponsored by:	EMC / Isilon Storage Division
Differential Revision:	https://reviews.freebsd.org/D3481
2015-08-25 17:39:03 +00:00
Conrad Meyer
e974f91c38 Import ioat(4) driver
I/OAT is also referred to as Crystal Beach DMA and is a Platform Storage
Extension (PSE) on some Intel server platforms.

This driver currently supports DMA descriptors only and is part of a
larger effort to upstream an interconnect between multiple systems using
the Non-Transparent Bridge (NTB) PSE.

For now, this driver is only built on AMD64 platforms.  It may be ported
to work on i386 later, if that is desired.  The hardware is exclusive to
x86.

Further documentation on ioat(4), including API documentation and usage,
can be found in the new manual page.

Bring in a test tool, ioatcontrol(8), in tools/tools/ioat.  The test
tool is not hooked up to the build and is not intended for end users.

Submitted by:	jimharris, Carl Delsey <carl.r.delsey@intel.com>
Reviewed by:	jimharris (reviewed my changes)
Approved by:	markj (mentor)
Relnotes:	yes
Sponsored by:	Intel
Sponsored by:	EMC / Isilon Storage Division
Differential Revision:	https://reviews.freebsd.org/D3456
2015-08-24 19:32:03 +00:00