whether the checksum of EEPROM is valid or not. Because driver
heavily relies on EEPROM information when it selectively enables
features/workarounds, it would be helpful to know whether driver
sees valid EEPROM.
While I'm here remove all other EEPROM accesses since the entire
EEPROM is loaded at device attach time.
MFC after: 2 weeks
the dev.fxp.%d.noflow tunable as the same effect can now be achieved with
ifconfig(8) by setting the flowcontrol media option as desired (besides
the tunable never having a chance to actually enable flow control support
so far).
In joint forces with: yongari
fxp(4) already used to extract most hardware MAC statistics but it
didn't show them. With this change, all MAC statistics counters
are exported. Because there are a couple of new counters for 82558
and 82559, enable extended MAC statistics functionality to get
these counters. Accoring to public data sheet, 82559 MAC statistics
return 24 DWORD counters(3 counters are unknown at this moment) so
increase MAC counter structure to meet the MAC statistics block size.
The completion of MAC counter dump is now checked against
FXP_STATS_DR_COMPLETE status code which is appended at the end of
status block. Previously fxp(4) ignored the status of the
FXP_SCB_COMMAND_CU_DUMPRESET command. fxp(4) does not wait for the
completion of pending command before issuing
FXP_SCB_COMMAND_CU_DUMPRESET. Instead it skips the command and try
it next time. This scheme may show better performance but there is
chance to loose updated counters after stopping controller. So make
sure to update MAC statistics in fxp_stop().
While I'm here move sysctl node creation to fxp_sysctl_node().
Tested by: Larry Baird < lab <> gta dot com >
offload for VLAN frames are also supported. The VLAN hardware
assistance is available only on 82550/82551 based controllers.
While I'm here change the confusing name of bit1 in byte 22 of
configuration block to vlan_drop_en. The bit controls whether
hardware strips VLAN tagged frame or not. Special thanks to wpaul
who sent valuable VLAN related information to me.
Tested on: i386, sparc64
controllers. ICH based controllers are treated as 82559. 82557,
earlier revision of 82558 and 82559ER have no WOL capability.
o WOL support requires help of a firmware so add check whether
hardware is capable of handling magic frames by reading EEPROM.
o Enable accepting WOL frames only when hardware is about to
suspend or shutdown. Previously fxp(4) used to allow receipt of
magic frame under normal operation mode which could cause
hardware hang if magic frame is received by hardware. Datasheet
clearly states driver should not allow WOL frames under normal
operation mode.
o Disable WOL frame reception in device attach so have fxp(4)
immunize against system hang which can be triggered by magic
packets when the hardware is not in fully initialized state.
o Don't reset all hardware configuration data in fxp_stop()
otherwise important configuration data is lost and this would
reset WOL configuration to default state which in turn cause
hardware hang on receipt of magic frames. To fix the issue,
preserve hardware configuration data by issuing a selective
reset.
o Explicitly disable interrupts after issuing selective reset as
reset may unmask interrupts.
Tested by: Alexey Shuvaev < shuvaev <> physik DOT uni-wuerzburg DOT de >
o Configure controller to use dynamic TBD as TSO requires that
operation mode.
o Add a dummy TBD to tx_cb_u as TSO can access one more TBD in TSO
operation.
o Increase a DMA segment size to 4096 to hold a full IP segment
with link layer header.
o Unlike other TSO capable controllers, 82550/82551 does not
modify the first IP packet in TSO operation so driver should
create an IP packet with proper header. Subsequent IP packets
are generated from the header information in the first IP packet
header. Likewise pseudo checksum also should be computed by
driver for the first packet.
o TSO requires one more TBD to hold total TCP payload. To make
code simple for TSO/non-TSO case, increase the index of the
first available TBD array.
o Remove KASSERT that checks the size of a DMA segment should be
less than or equal to MCLBYTES as it's no longer valid in TSO.
o Tx threshold and number of TBDs field is used to store MSS in
TSO. So don't set the Tx threshold in TSO case.
by using a __packed keyword for the fxp_rfa structure. The Intel
guys who designed this structure with unaligned fields deserve
to be shot.
Tested by: kris
Approved by: re@ (jhb)
endian safe.
- Change some u_int to u_int8_t which make more sense here since
we're really defining bytes. That produces the same code due to
how bitfields work.
- Add the definition of the vlan_drop_en bit (not used yet).
- Add some useful comments.
Obtained from: NetBSD
This patch is rather big because I had to significantly redesign
the driver to make the busdma conversion possible. Most notably,
hardware and software structures were carefully splitted to get
rid of all the structs overlapping evilness.
Special thanks to phk and Richard Puga <puga@mauibuilt.com> for
providing me with fxp(4) hardware to do this work.
Thanks to marcel for testing this on ia64, and to Fred Clift
<fclift@verio.net> for testing this on alpha.
Tested on: i386, ia64, alpha
the fxp driver. This is enabled only for the 82550/82551 chips
(PCI revision code 12 or 13). RX and TX checksum offload are
both supported. Transmit offload is limited to TCP and UDP only
right now: there seems to be a problem with IP header checksumming
on transmit in some cases.
This chip has hardware VLAN support as well. I hope to enable
support for this eventually.
the chip can cause a PCI protocol violation in under certain scenarios.
The workaround is to rewrite the EEPROM to disable Dynamic Standby Mode.
Once the EEPROM is rewritten, the system needs to be rebooted in order
to pick up the new settings.
This has been tested on several ICH2/ICH2-M systems, found in 815E based
boards, and usually identified by the presence of the 82562 ET/EM PHY.
Thanks to: Mike Tansca, Paul Saab for samples of the problematic boards.
of " &= ". Also change the MII PHY device mask to check the correct bits.
Cookie to: Andre Albsmeier <andre.albsmeier@mchp.siemens.de>
Pointy hat to: me
a 82557 (e.g.: a newer chip) then:
+ enable MWI, if the PCI configuration indicates the system supports it
+ enable usage of extended TxCB, for better performance
+ enable hardware flow control. FC frames will be passed up to the
host only if promiscuous mode is enabled.
and/or when using the card.
o Convert the driver to using bus_space. This allows alphas with
fxp's to boot, rather than panic'ing because rman_get_virtual()
doesn't really return a virtual address on alphas.
o Fix an alpha unaligned access error caused by some misfeature of
gcc/egcs: if link_addr & rbd_addr in the fxp_rfa struct are 32 bit
quantities, egcs will assume they are naturally aligned. So it will do
a ldl & some shifty/masky to twiddle 16 bit values in fxp_lwcopy().
However, if they are 16-bit aligned, the ldl will actually be done on
a 16-bit aligned value & we will panic with an unaligned access
error... Changing their definition to an array of chars seems to fix
this. I obtained this from NetBSD.
I've tested this on both i386 & alpha.
I have an 82559 card with the same id as the other 8255[78] chips, but
that was made with a date code of 0699 (June 99). The submitter shows
this working with the probe etc, but doesn't actually say it works as
on the ethernet. :-) Assuming it does, this is a RELENG_3 merge candidate.
Submitted by: Steven E Lumos <slumos@sam.ISRI.UNLV.EDU>
or unsigned int (this doesn't change the struct layout, size or
alignment in any of the files changed in this commit, at least for
gcc on i386's. Using bitfields of type u_char may affect size and
alignment but not packing)).
if it is in 10Mbps mode and gets certain types of garbage prior to
the packet header. The work-around involves reprogramming the
multicast filter if nothing is received in some number of seconds
(currently set at 15). As a side effect, implemented complete support
for multicasting rather than the previous 'receive all multicasts'
hack, since we now have the ability to program the filter table.
Fixed a serious bug which crept in with the timeout() changes;
the cookie was only saved on the first timeout() call in fxp_init()
and wasn't updated in the most common place in fxp_stats_update()
when the timeout was rescheduled. This bug would have resulted in
an eventual panic if fxp_stop() was called (which happens when any
interface flags are changed, for example).
Fixed a bug in Alpha support that would have caused the TxCB
descriptor chain to span a page boundry, causing serious problems
if the pages didn't happen to be contiguous.
Removed some gratuitous bit masking that was left over from an
older implementation.
Fixed a bug where too much was copied from the configuration
template, spilling over into memory that followed it.
Fixed handling of if_timer...it was cleared too early in some cases.
Fixed a bug in fxp_mdi_write - a hex number was missing a preceding 0x
and this was causing the routine to not wait for a PHY write to complete.
Added support for link0, link1, and link2 flags to toggle auto-
negotiation, 10/100, and half/full duplex:
link0 disable auto-negotiation
When set, these flags then have meaning:
-link1 10Mbps
link1 100Mbps
-link2 half duplex
link2 full duplex
...needs a manual page.
written:
1) Full duplex mode is now supported (and works!)
2) The 10Mbps-only PCI Pro/10 should now work (untested, however)
Thanks to Justin Gibbs for providing a PCI bus analyzer trace while the
Intel Windows driver was configuring the board...this made it possible
to figure out the mystery bit that I wasn't setting in the PHY for full
duplex to work.
This will make a number of things easier in the future, as well as (finally!)
avoiding the Id-smashing problem which has plagued developers for so long.
Boy, I'm glad we're not using sup anymore. This update would have been
insane otherwise.
