illumos/illumos-gate@6fb4854bed
This fixes the tst.resize1.d and tst.resize2.d DTrace tests, which have
been failing since r261122 since they were causing dtrace(1) to attempt to
allocate and use large amounts of memory, and get killed by the OOM killer
as a result.
MFC after: 1 month
upstream DTrace code. It indicates that the kernel memory allocator need not
attempt to satisfy non-blocking allocations in low-memory conditions. This
has no direct equivalent in the malloc(9) flags, so it is just defined to 0
for now.
source shows that board vendors seem to be about evenly split on this.
This commit is a trivial change to note that while the previous change
was supposed to be whitespace only, this functional change also crept in.
The added lines were:
/* Board vendors use both fdtaddr and fdt_addr names. Grrrr. */
if (s == NULL)
s = ub_env_get("fdt_addr");
Introduce CRT_HAS_128BIT, currently for all __LP64__ platforms.
Use it to enable the various functions for TI mode.
This makes sure the correct primitives are also built for sparc64.
^/user/gjb/hacking/release-embedded:
259994,260000,260895-260896,261139,261152,
261174,261176,261210,261221,261237,261239,
261448,261489
^/user/gjb/release-embedded:
262305,262307
svn:mergeinfo is intentionally not included in the commit, so it does
not propagate to head/.
Sponsored by: The FreeBSD Foundation
bsd.sys.mk, where it really belongs. This also causes the flag to get
added when clang is *not* the default system compiler, but is still
used, e.g. by setting WITH_CLANG_IS_CC manually.
MFC after: 3 days
to use-after-free.
fdescfree proceeds to free file pointers once fd_refcnt reaches 0, but
kern_proc_{o,}filedesc_out only checked for hold count.
MFC after: 3 days
directives, since on sparc64 we must still GNU as, which does not
support those directives.
Note there are several programs and libraries in our tree, which are
always compiled with -g, even if DEBUG_FLAGS is not set by the user!
It is a small and lightweight Mail Transport Agent.
It accepts mails from locally installed Mail User Agents (MUA) and delivers the
mails either locally or to a remote destination. Remote delivery includes
several features like TLS/SSL support, SMTP authentication and NULLCLIENT.
Make dma conditional to new WITHOUT_DMA option and make it respect WITHOUT_MAIL
Reviewed by: peter
Discussed with: emaste, bz, peter
The vlapic.ops handler 'enable_x2apic_mode' is called when the vlapic mode
is switched to x2APIC. The VT-x implementation of this handler turns off the
APIC-access virtualization and enables the x2APIC virtualization in the VMCS.
The x2APIC virtualization is done by allowing guest read access to a subset
of MSRs in the x2APIC range. In non-root operation the processor will satisfy
an 'rdmsr' access to these MSRs by reading from the virtual APIC page instead.
The guest is also given write access to TPR, EOI and SELF_IPI MSRs which
get special treatment in non-root operation. This is documented in the
Intel SDM section titled "Virtualizing MSR-Based APIC Accesses".
Enforce that APIC-write and APIC-access VM-exits are handled only if
APIC-access virtualization is enabled. The one exception to this is
SELF_IPI virtualization which may result in an APIC-write VM-exit.
The temperature monitor device is enabled to sample the die temperature at
16hz. The temperature is published via sysctl. A callout routine at 10hz
monitors the temperature and throttles back the cpu if the temperature
goes over a user-settable throttle point (by default 10C less than the
critical high-point temperature for the chip). The hardware is supposed
to be able to deliver an interrupt when the temperature exceeds a settable
limit, but the interrupt never arrives so for now a callout does the job.
At attach time we read the maximum cpu frequency the chip is allowed to run
at and the cpu is set to run at that speed. It's reported at attach time.
A sysctl variable reports the current speed when queried.
New sysctl values:
dev.imx6_anatop.0.cpu_mhz: 984
dev.imx6_anatop.0.temperature: 37.9C
dev.imx6_anatop.0.throttle_temperature: 95.0C
Steven Lawrance did the initial heavy lifting on this, but I changed
enough stuff that I'm the one to blame if anything breaks.
Submitted by: Steven Lawrance <stl@koffein.net>
saving the pointer will overwrite bytes belongs to another memory block
unexpectly, to fix the problem, use (allocated address + sizeof(void *)) as
initial value, and slip to next aligned address, so maximum extra bytes is
sizeof(void *) + align - 1.
Tested by: Andre Albsmeier < mail at ma17 dot ata dot myota dot orgndre >
reduce false positives.
The committed patch was provided by Christian Marg.
PR: 91732
Submitted by: Daniel O'Connor <doconnor at gsoft.com.au>
Skye Poier <spoier at gmail.com>
Alan Amesbury <amesbury at umn.edu>
Christian Marg <marg at rz.tu-clausthal.de>
MFC after: 1 month
Implement SPARCv9 atomic_swap_64 with a pseudo.
The SWAP instruction only exists in a 32-bit variant, but the 64-bit
atomic swap can be implemented in terms of CASX, like the other
atomic rmw primitives.
Submitted by: rdivacky
