Commit Graph

492 Commits

Author SHA1 Message Date
Søren Schmidt
cfaed55fd5 Add support for chipsets that has NULL'd BAR's for legacy ports.
This allows DMA to be used on a fine little geode system I got here and
most like on lots of older systems like that.

HW donated by:  Paul Ghering
2007-02-17 16:56:39 +00:00
John Baldwin
f13fc7c893 Adjust the global MSI blacklisting strategy so we don't have to explicitly
blacklist a bunch of old chipsets.  If a system contains a PCI-PCI bridge
that supports PCI-X, assume the chipset supports PCI-X.  If a system
contains a PCI-express root port, assume the chipset supports PCI-express.
If the chipset doesn't support either PCI-X or PCI-express, then blacklist
it by default.  We should now only need to explicitly blacklist PCI-X or
PCI-express chipsets that don't properly handle MSI.
2007-02-14 22:36:27 +00:00
John Baldwin
ea3f508362 - Fix an off by one error in pci_remap_msix_method() that effectively
broke the method as all the MSI-X table indices were off by one in
  the backend MD code.
- Fix a cosmetic nit in the bootverbose printf in pci_alloc_msix_method().
2007-02-14 22:32:55 +00:00
John Baldwin
8474d26b81 Add missing 'break' that in this case is harmless. 2007-02-14 17:02:15 +00:00
Robert Watson
7222b40265 As VPD support still causes hard hangs on boot with some hardware, add a
tunable allowing automatic parsing of VPD data to be disabled.  The
default is left as-is; if you are having problems with hard hangs at boot
due to VPD, try setting hw.pci.enable_vpd=0.  A proper architectural
solution has been under discussion for some time, but this allows me to
boot my test machines in the mean time.

Submitted by:	bz
Head nod:	jmg
2007-02-08 14:33:07 +00:00
John Baldwin
f50589d755 Add constants for the PCIY_VENDOR (vendor-specific), PCIY_DEBUG (EHCI
debug port), and PCIY_EXPRESS (PCI-express) capabilities.
2007-02-02 19:48:25 +00:00
John Baldwin
5fe82bca57 Expand the MSI/MSI-X API to address some deficiencies in the MSI-X support.
- First off, device drivers really do need to know if they are allocating
  MSI or MSI-X messages.  MSI requires allocating powerof2() messages for
  example where MSI-X does not.  To address this, split out the MSI-X
  support from pci_msi_count() and pci_alloc_msi() into new driver-visible
  functions pci_msix_count() and pci_alloc_msix().  As a result,
  pci_msi_count() now just returns a count of the max supported MSI
  messages for the device, and pci_alloc_msi() only tries to allocate MSI
  messages.  To get a count of the max supported MSI-X messages, use
  pci_msix_count().  To allocate MSI-X messages, use pci_alloc_msix().
  pci_release_msi() still handles both MSI and MSI-X messages, however.
  As a result of this change, drivers using the existing API will only
  use MSI messages and will no longer try to use MSI-X messages.
- Because MSI-X allows for each message to have its own data and address
  values (and thus does not require all of the messages to have their
  MD vectors allocated as a group), some devices allow for "sparse" use
  of MSI-X message slots.  For example, if a device supports 8 messages
  but the OS is only able to allocate 2 messages, the device may make the
  best use of 2 IRQs if it enables the messages at slots 1 and 4 rather
  than default of using the first N slots (or indicies) at 1 and 2.  To
  support this, add a new pci_remap_msix() function that a driver may call
  after a successful pci_alloc_msix() (but before allocating any of the
  SYS_RES_IRQ resources) to allow the allocated IRQ resources to be
  assigned to different message indices.  For example, from the earlier
  example, after pci_alloc_msix() returned a value of 2, the driver would
  call pci_remap_msix() passing in array of integers { 1, 4 } as the
  new message indices to use.  The rid's for the SYS_RES_IRQ resources
  will always match the message indices.  Thus, after the call to
  pci_remap_msix() the driver would be able to access the first message
  in slot 1 at SYS_RES_IRQ rid 1, and the second message at slot 4 at
  SYS_RES_IRQ rid 4.  Note that the message slots/indices are 1-based
  rather than 0-based so that they will always correspond to the rid
  values (SYS_RES_IRQ rid 0 is reserved for the legacy INTx interrupt).
  To support this API, a new PCIB_REMAP_MSIX() method was added to the
  pcib interface to change the message index for a single IRQ.

Tested by:	scottl
2007-01-22 21:48:44 +00:00
John Baldwin
6eb7ebfe25 - Change the PCI-X registers constants to be relative to the PCI-X PCI
capability rather than hardcoded offsets for a particular card.  While
  I'm here, expand the constants some.
- Change the ahd(4) driver to use pci_find_extcap() to locate the PCI-X
  capability to keep up with the first change.

Reviewed by:	scottl, gibbs (earlier version)
2007-01-19 22:37:52 +00:00
John Baldwin
abc007f085 Disable MSI for the Intel 845 and 865 chipsets and update comment for
E7210 to note it is the same devid as the 875 chipset.
2007-01-16 19:44:45 +00:00
John Baldwin
8bbeb21223 Fix the subvendor ID for PCI-PCI bridges.
- Retire the PCI_SUB*_1 constants and don't try to read a subvendor ID out
  of them.  There isn't a standard subvendor ID field for PCI-PCI bridges.
  Instead, the dword at offset 0x34 is actually mostly reserved except for
  the LSB which is the capabilities pointer.
- Add support for the PCI-PCI bridge subvendor ID capability (13) and use
  it to set the subvendor ID for PCI-PCI bridges.

MFC after:	 1 month
2007-01-16 17:04:42 +00:00
John Baldwin
22bf1c7fb0 - Add a new flag to the PCI-PCI driver to disable MSI on devices behind the
bridge if it doesn't pass MSI messages up correctly.  We set the flag
  in pcib_attach() if the device ID is disabled via a PCI quirk.
- Disable MSI for devices behind the AMD 8131 HT-PCIX bridge.  Linux has
  the same quirk.

Tested by:	no one despite repeated calls for testers
2007-01-13 04:57:37 +00:00
John Baldwin
77312b5673 Disable MSI for two ServerWorks chipsets. The first is based on a user
report.  The second is blacklisted in Linux.
2007-01-12 21:37:51 +00:00
John Baldwin
854923ae86 Blacklist a few more Intel chipsets re: MSI based on user reports:
E7500 and 855.
2007-01-12 21:30:25 +00:00
John Baldwin
af07bd5661 - Condense the comment for Intel chipset MSI blacklist entries.
- Blacklist the E7210.

PR:		kern/105768 (2)
Reported by:	marcus (2)
2007-01-12 13:33:56 +00:00
John Baldwin
9d1f363daf Disable MSI on the Intel E7505 chipset. It is reported broken on a Tyan
S2665ANF motherboard.

Reported by:	"Eugene M. Kim" <blue at white lv>
2006-12-28 06:14:42 +00:00
John Baldwin
cc4f30e1a5 Disable MSI for the Intel E7501 chipset.
Reported by:	jdp
2006-12-14 19:59:29 +00:00
John Baldwin
e31182d9ca Add a first pass at a way to blacklist MSI on systems where it doesn't
work:
- A new PCI quirk (PCI_QUIRK_DISABLE_MSI) is added to the quirk table.
- A new pci_msi_device_blacklisted() determines if a passed in device
  matches an MSI quirk in the quirk table.  This can be overridden (all
  quirks ignored) by setting the hw.pci.honor_msi_blacklist to 0.
- A global blacklist check is performed in the MI PCI bus code by checking
  to see if the device at 0:0:0 is blacklisted.

Tested by:	jdp
2006-12-14 19:57:06 +00:00
John Baldwin
2bbf9462ad Replace #define<space> with #define<tab> so the code is consistent with
style(9) and avoids mixing the two formats.
2006-12-14 16:53:48 +00:00
John Baldwin
3dcca30330 - Add constants for HT PCI capability registers including the various
subtypes of HT capabilities.
- Add constants for the MSI mapping window HT PCI capability.
- On i386 and amd64, enable the MSI mapping window on any HT bridges we
  encounter and report any non-standard mapping window addresses.
2006-12-12 19:33:25 +00:00
John Baldwin
0003a3f074 Give the WREG() macro the same lifetime as the REG() macro. 2006-12-12 19:30:40 +00:00
John Baldwin
310756939c Add some bootverbose printf's to detail how many MSI messages are allocated
and to which IRQs.

Requested by:	scottl
2006-12-12 19:29:01 +00:00
John-Mark Gurney
b318e84967 don't mark the cksum as invalid here... off is incorrect when we get
here, it's either unset, or it's valid, so we don't need to do anything
different...

Reported by:	Neterion (via rwatson)
2006-11-21 05:46:09 +00:00
John Baldwin
3bea4efeb1 Look for capabilities in PCI-PCI bridges using the same CAP PTR register
as for type 0 devices.

Submitted by:	grehan
MFC after:	1 week
2006-11-16 17:31:33 +00:00
John Baldwin
60b9b19721 Fix a couple of comment typos.
Reported by:	ru
2006-11-14 17:54:55 +00:00
John Baldwin
9bf4c9c1b0 First cut at MI support for PCI Message Signalled Interrupts (MSI):
- Add 3 new functions to the pci_if interface along with suitable wrappers
  to provide the device driver visible API:
  - pci_alloc_msi(dev, int *count) backed by PCI_ALLOC_MSI().  '*count'
    here is an in and out parameter.  The driver stores the desired number
    of messages in '*count' before calling the function.  On success,
    '*count' holds the number of messages allocated to the device.  Also on
    success, the driver can access the messages as SYS_RES_IRQ resources
    starting at rid 1.  Note that the legacy INTx interrupt resource will
    not be available when using MSI.  Note that this function will allocate
    either MSI or MSI-X messages depending on the devices capabilities and
    the 'hw.pci.enable_msix' and 'hw.pci.enable_msi' tunables.  Also note
    that the driver should activate the memory resource that holds the
    MSI-X table and pending bit array (PBA) before calling this function
    if the device supports MSI-X.
  - pci_release_msi(dev) backed by PCI_RELEASE_MSI().  This function
    releases the messages allocated for this device.  All of the
    SYS_RES_IRQ resources need to be released for this function to succeed.
  - pci_msi_count(dev) backed by PCI_MSI_COUNT().  This function returns
    the maximum number of MSI or MSI-X messages supported by this device.
    MSI-X is preferred if present, but this function will honor the
    'hw.pci.enable_msix' and 'hw.pci.enable_msi' tunables.  This function
    should return the largest value that pci_alloc_msi() can return
    (assuming the MD code is able to allocate sufficient backing resources
    for all of the messages).
- Add default implementations for these 3 methods to the pci_driver generic
  PCI bus driver.  (The various other PCI bus drivers such as for ACPI and
  OFW will inherit these default implementations.)  This default
  implementation depends on 4 new pcib_if methods that bubble up through
  the PCI bridges to the MD code to allocate IRQ values and perform any
  needed MD setup code needed:
  - PCIB_ALLOC_MSI() attempts to allocate a group of MSI messages.
  - PCIB_RELEASE_MSI() releases a group of MSI messages.
  - PCIB_ALLOC_MSIX() attempts to allocate a single MSI-X message.
  - PCIB_RELEASE_MSIX() releases a single MSI-X message.
- Add default implementations for these 4 methods that just pass the
  request up to the parent bus's parent bridge driver and use the
  default implementation in the various MI PCI bridge drivers.
- Add MI functions for use by MD code when managing MSI and MSI-X
  interrupts:
  - pci_enable_msi(dev, address, data) programs the MSI capability address
    and data registers for a group of MSI messages
  - pci_enable_msix(dev, index, address, data) initializes a single MSI-X
    message in the MSI-X table
  - pci_mask_msix(dev, index) masks a single MSI-X message
  - pci_unmask_msix(dev, index) unmasks a single MSI-X message
  - pci_pending_msix(dev, index) returns true if the specified MSI-X
    message is currently pending
- Save the MSI capability address and data registers in the pci_cfgreg
  block in a PCI devices ivars and restore the values when a device is
  resumed.  Note that the MSI-X table is not currently restored during
  resume.
- Add constants for MSI-X register offsets and fields.
- Record interesting data about any MSI-X capability blocks we come
  across in the pci_cfgreg block in the ivars for PCI devices.

Tested on:	em (i386, MSI), bce (amd64/i386, MSI), mpt (amd64, MSI-X)
Reviewed by:	scottl, grehan, jfv
MFC after:	2 months
2006-11-13 21:47:30 +00:00
John-Mark Gurney
ee03a332df fix hanging on invalid data... (This doesn't fix hanging due to broken
hardware)...

Tested by:	Ian Dowse, Adam K Kirchhoff and Vladimir Kushnir
2006-11-09 21:05:32 +00:00
John Baldwin
2604383634 Don't try to print a NULL string during boot. If a device doesn't have a
valid name yet, just omit the name during the bootverbose printfs.

MFC after:	1 week
2006-11-09 18:04:53 +00:00
John Baldwin
d65926888d Various whitespace cleanups. 2006-11-07 18:55:51 +00:00
Warner Losh
8e6c8e8c0c Doh! Actually commit checking against NULL for res.
Noticed by: dougb@
2006-11-04 06:56:51 +00:00
Warner Losh
a12fb4e632 Assign start to the value we were able to allocate and use that to
write out the BAR.  Otherwise, we were trying to shift a 32-bit
quantity on 32-bit platforms.  Also, 'start' check sanity to where it
is known.
2006-10-30 22:46:33 +00:00
Warner Losh
b0a2d4b8a9 More fully support 64-bit bars. Prior to this commit, we supported
only those bars that had addresses assigned by the BIOS and where the
bridges were properly programmed.  Now even unprogrammed ones work.
This was needed for sun4v.  We still only implement up to 2GB memory
ranges, even for 64-bit bars.  PCI standards at least through 2.2 say
that this is the max (or 1GB is, I only know it is < 32bits).

o Always define pci_addr_t as uint64_t.  A pci address is always 64-bits,
  but some hosts can't address all of them.
o Preserve the upper half of the 64-bit word during resource probing.
o Test to make sure that 64-bit values can fit in a u_long (true on some
  platforms, but not others).  Don't use those that can't.
o minor pedantry about data sizes.
o Better bridge resource reporting in bootverbose case.
o Minor formatting changes to cope with different data types on different
  platforms.

Submitted by: jmg, with many changes by me to fully support 64-bit
addresses.
2006-10-30 19:18:46 +00:00
John-Mark Gurney
8946c28270 fix tab indentation for CP and RV...
If the length is zero, catch this early, instead of making dflen go negative
and letting bad things happen...  We also check to see if RV (checksum) is
0, and handle that has a checksum failure...

Properly handle checksum failures by not processing read-write VPD data,
and removing all the found read-only data...

Tested by:	oleg (dflen going negative)
2006-10-20 21:28:11 +00:00
Warner Losh
413d6375d7 Remove redundant casts. The casts inside the macros should be
sufficient (or fixed if not).
2006-10-12 03:05:45 +00:00
John-Mark Gurney
667dc26e71 provide routines to access VPD data at the PCI layer...
remove sk's own implementation, and use the new calls to get the data...

Reviewed by:	-arch
2006-10-09 16:15:56 +00:00
Ruslan Ermilov
40ed3f472a Actually make bounds checking for PCIOCREAD and PCIOCWRITE work. 2006-10-06 14:31:32 +00:00
John-Mark Gurney
b70c1daf97 spell PCIS_CRYPTO_ENTERTAIN properly...
MFC after:	3 days
2006-09-20 06:47:14 +00:00
Yaroslav Tykhiy
776fc0e90e Commit the results of the typo hunt by Darren Pilgrim.
This change affects documentation and comments only,
no real code involved.

PR:		misc/101245
Submitted by:	Darren Pilgrim <darren pilgrim bitfreak org>
Tested by:	md5(1)
MFC after:	1 week
2006-08-04 07:56:35 +00:00
John Baldwin
19e9205a23 Simplify the pager support in DDB. Allowing different db commands to
install custom pager functions didn't actually happen in practice (they
all just used the simple pager and passed in a local quit pointer).  So,
just hardcode the simple pager as the only pager and make it set a global
db_pager_quit flag that db commands can check when the user hits 'q' (or a
suitable variant) at the pager prompt.  Also, now that it's easy to do so,
enable paging by default for all ddb commands.  Any command that wishes to
honor the quit flag can do so by checking db_pager_quit.  Note that the
pager can also be effectively disabled by setting $lines to 0.

Other fixes:
- 'show idt' on i386 and pc98 now actually checks the quit flag and
  terminates early.
- 'show intr' now actually checks the quit flag and terminates early.
2006-07-12 21:22:44 +00:00
Warner Losh
8cb2906936 Add a define for the Standard SD Host Controller Base Peripheral. 2006-05-30 21:36:12 +00:00
John Baldwin
53b8229e97 Workaround a hang on some nForce2 systems that can happen if the CPU goes
into and out of the halt state very quickly.

Submitted by:	Andriy Gapon <avg at icyb dot net dot ua>
MFC after:	1 week
2006-05-24 14:08:31 +00:00
John Baldwin
70bc2d3f4f Fixup some comments to allow for the fact that PCI domains are not specific
to Alpha hoses.
2006-05-11 22:13:21 +00:00
Marcel Moolenaar
d95bd0c34a The size of I/O ranges can be anything from 16 bytes to 2G bytes.
Lower the minimum for memory mapped I/O from 32 bytes to 16 bytes.
This fixes bus enumeration on ia64 now that the Diva auxiliary
serial port is attached to.
2006-04-27 04:53:18 +00:00
Jung-uk Kim
1def0ca64d Free allocated environment variables after use.
Coverity ID:	366
Found by:	Coverity Prevent
2006-04-21 19:35:03 +00:00
John Baldwin
cb46523df0 Don't add an agp child in vgapci's attach routine if the PCIY_AGP
capability is present as not all devices supported by the agp_i810 driver
(such as i915) have the AGP capability.  Instead, add an identify routine
to the agp_i810 driver that uses the PCI ID to determine if it should
create an agp child device.
2006-02-01 15:45:29 +00:00
John Baldwin
5aa58b3e8f Make the 'pci_devclass' pointer variable private (drivers really shouldn't
share devclass pointers, a mistake I've encouraged in the past) and
move the declaration of the pci_driver kobj class from cardbus.c to
pci_private.h so that other drivers can inherit from pci_driver.
2006-01-20 22:00:50 +00:00
John Baldwin
04dda605c5 - Make pcib_devclass private to sys/dev/pci/pci_pci.c and change all the
various pcib drivers to use their own private devclass_t variables for
  their modules.
- Use the DEFINE_CLASS_0() macro to declare drivers for the various pcib
  drivers while I'm here.
2006-01-06 19:22:19 +00:00
Warner Losh
a48895a77e Use __HAVE_ACPI and __PCI_REROUTE_INTERRUPT as appropriate rather than
the complicated #ifdefs.
2006-01-01 21:04:31 +00:00
Warner Losh
70261a611f Remove left-over #ifdef alpha routines. They aren't used by any of
our drivers, and don't appear to be necessary for GENERIC and LINT on
the alpha.  They don't belong in a MI header anyway...
2006-01-01 20:40:08 +00:00
Warner Losh
98b7810732 Remove stray debug from p4 integration. 2006-01-01 08:26:39 +00:00
Warner Losh
8d10dd1a82 Make RID2BAR actually return a number that can be plugged into PCIR_BAR()
rather than a bitmask.

Submitted by: ru@
2005-12-30 20:25:40 +00:00