Newer Allwinner MMC implementations use a different FIFO register offset
(0x200 instead of 0x100). Since the FDT uses the same compat string for
both cases, base the decision on which FIFO offset to use on the Allwinner
SoC family.
Reviewed by: Emmanuel Vadot <manu@bidouilliste.com>
Approved by: gonzo (mentor)
Differential Revision: https://reviews.freebsd.org/D5468
intr_pic_init_secondary. Replace them with a direct call. On BCM2836
and ARMADA XP we need to add this function, but it can be empty.
Reviewed by: ian, imp
Sponsored by: ABT Systems Ltd
Differential Revision: https://reviews.freebsd.org/D5460
slightly wrong on the others. We should just check if mp_ncpus is set to
more than one CPU as we may wish to run on a single core even when SMP is
available.
Reviewed by: ian
Sponsored by: ABT Systems Ltd
Differential Revision: https://reviews.freebsd.org/D5458
support for the i2c, mmc, and gmac clocks. Further clocks can be added as
needed.
Submitted by: Emmanuel Vadot <manu@bidouilliste.com>
Reviewed by: jmcneill
Differential Revision: https://reviews.freebsd.org/D5339
The HDMI driver will attach a framebuffer device when a display is
connected. If the EDID can be read and contains a preferred mode, it
will be used. Otherwise the framebuffer will default to 800x600.
In addition, if the EDID contains a CEA-861 extension block and the
"basic audio" flag is set, audio playback at 48kHz 16-bit stereo is
enabled on the controller.
Reviewed by: andrew
Approved by: gonzo (mentor)
Differential Revision: https://reviews.freebsd.org/D5383
driver. This mostly involves selecting the register offsets to use at
runtime based on the hardware we are talking to.
Submitted by: Emmanuel Vadot <manu@bidouilliste.com>
Differential Revision: https://reviews.freebsd.org/D5327
will be needed when we bring in further support for these SoCs.
Submitted by: Emmanuel Vadot <manu@bidouilliste.com>
Differential Revision: https://reviews.freebsd.org/D5340
For sources and destinations marked "noincr", the previous code was
incorrectly programming the dedicated DMA channel control register
using bit definitions for normal DMA channels. This code path is not
currently used, but will be used by the HDMI audio driver in review.
Reviewed by: andrew
Approved by: gonzo (mentor)
Differential Revision: https://reviews.freebsd.org/D5382
Only L2 PIPT cache is supported for __ARM_ARCH >= 6.
In fact, this is just a pure proclamation as this option is used
only in armv4 specific files now.
FDT platform code to detect when we are booting on one of these SoCs. The
driver changes will be added shortly.
Submitted by: Emmanuel Vadot <manu@bidouilliste.com>
Differential Revision: https://reviews.freebsd.org/D5338
configuration from the FDT data, then set the pins into the requested
state. As part of this the gpio controller now reports the correct number
of pins instead of returning the number of bank * 32.
To allow for a future consolidated kernel we add the SOC_ALLWINNER_A10 and
SOC_ALLWINNER_A20 kernel options. These need to be set as appropriate for
the SoC the kernel will boot on.
Submitted by: Emmanuel Vadot <manu@bidouilliste.com>
Differential Revision: https://reviews.freebsd.org/D5177
A10/A20 SoC. Based loosely on the submitters NetBSD driver, tested on
Cubieboard 2. Playback and capture are supported.
Submitted by: Jared McNeill <jmcneill@invisible.ca>
Differential Revision: https://reviews.freebsd.org/D5202
least the audio codec driver currently in review.
Submitted by: Jared McNeill <jmcneill@invisible.ca>
Differential Revision: https://reviews.freebsd.org/D5050
with this and an Allwinner SoC to power off.
Submitted by: Emmanuel Vadot <manu@bidouilliste.com>
Differential Revision: https://reviews.freebsd.org/D4954
Marvell twsi part, however uses different register locations, as such split
the existing driver into Marvell and Allwinner attachments.
While here clean a few style issues.
Submitted by: Emmanuel Vadot <manu@bidouilliste.com>
Differential Revision: https://reviews.freebsd.org/D4846
* Use the Linux compat string
* Use EARLY_DRIVER_MODULE to attach at the right time
* Add a generic A10 kernel config file
* A20 now use generic_timer
* Add two new dts files for Olimex boards
* Update our custom DTS file for A10 and A20 to use the same compatible
property names as the vendor ones.
Submitted by: Emmanuel Vadot <manu@bidouilliste.com>
Differential Revision: https://reviews.freebsd.org/D4792
* Use the ARM PLATFORM framework
* Use ARM_INTRNG on teh A20 as it has a GICv2
* Add a method to find which Allwinner SoC we are running on
Differential Revision: https://reviews.freebsd.org/D5059
The ci20 port (by kan@) is going to reuse almost all of the intrng code
since the SoC in question looks suspiciously like someone took an ARM
SoC design and replaced the ARM core with a MIPS core.
* migrate out the code;
* rename ARM_ -> INTR_;
* rename arm_ -> intr_;
* move the interrupt flush routine from intr.c / intrng.c into
arm/machdep_intr.c - removing the code duplication and removing
the ARM specific bits from here.
Thanks to the Star Wars: The Force Awakens premiere line for allowing
me a couple hours of quiet time to finish the universe builds.
Tested:
* make universe
TODO:
* The structure definitions in subr_intr.c still includes machine/intr.h
which requires one duplicates all of the intrng definitions in
the platform code (which kan has done, and I think we don't have to.)
Instead I should break out the generic things (function declarations,
common intr structures, etc) into a separate header.
* Kan has requested I make the PIC based IPI stuff optional.
the name the function will have when the new ARM_INTRNG code is integrated,
and doing this rename first will make it easier to toggle the new interrupt
handling code on/off with a config option for debugging.
This code initializes the GMAC clock and sets the pin mux to rgmii.
It also override the if_dwc defaults to set the alternate descriptor type
and MII clock used on A20.
Tested on cubieboard2 and banana pi.
pins, they specify the bank and the pin in two separated cells.
This allow the use of vendor's DTS definitions by adding a gpio map
routine that copes with that.
o Return the real hardware state in gpio_pin_getflags() instead of keep
the last state in an internal table. Now the driver returns the real
state of pins (input/output and pull-up/pull-down) at all times.
o Use a spin mutex. This is required by interrupts and the 1-wire code.
o Use better variable names and place parentheses around them in MACROS.
o Do not lock the driver when returning static data.
Tested with gpioled(4) and DS1820 (1-wire) sensors on banana pi.
change to GMAC easier on A20 SoCs.
On A10 only the EMAC controller is available (fast ethernet), but on A20
there is also GMAC a high (or better) performant controller (gigabit
ethernet).
On A20 the both controllers uses the same pins to talk to the ethernet PHY
(MII or RGMII) and they can be selected by the GPIO pin mux.
There is work in progress to bring in GMAC support.
The Allwinner SoC has an AHCI device on its internal main bus rather
than the PCI bus. This SoC is somewhat underdocumented, and its SATA
controller is no exception. The methods to support this chip were
harvested from the Linux Allwinner SDK, and then constants invented to
describe what's going on based on low-level constants contained in the
SATA standard and guess work.
This SoC requires a specific AHCI channel setup in order to start the
operations on the channel properly.
Clock setup and AHCI channel setup idea came from NetBSD.
Tested on Cubieboard 2 and Banana pi (and attachment on Cubieboard by
Pratik Singhal).
Differential Revision: https://reviews.freebsd.org/D737
Submitted by: imp
Reviewed by: imp, ganbold, mav, andrew
DMA handles all data transfers up to 128K or 16 segments and fallback to
pio mode when DMA requirements are not met.
The read performance has improved greatly while the write performance also
showed some improvement but seems limited by the card type and quality.
Submitted by: Pratik Singhal <pratiksinghal@freebsd.org>
Sponsored by: Google Summer of Code 2015
Tested on: A10 (cubieboard) and A20 (cubieboard 2 and banana pi)
This is based on the patch sent by Alexander Fedorov with the following
fixes/improvements:
- Better error handling;
- Clock is derived from PLL6 (obtained from netbsd);
- No more unnecessary busy loops on interrupt handler;
- style(9) fixes and code cleanup.
I also want to thanks Martin Galvan who has sent an alternative
implementation with some interesting fixes.
Tested on CubieBoard2, Banana-Pi (thanks to netgate!) and Cubieboard1
(Pratik Singhal).
This is intended to pave the way for the upcoming GSoC work (and make
easier the build of images for the supported boards).
PR: 196081
Submitted by: Alexander Fedorov <alexander.fedorov@rtlservice.com>
Each TX queue can hold one packet (yes, if_emac can send only two(!)
packets at a time).
Even with this change the very limited FIFO buffer (3 KiB for TX and 13 KiB
for RX) fill up too quick to sustain higher throughput.
For the TCP case it turns out that TX isn't the limiting factor, but the RX
side is (the FIFO fill up and starts to discard packets, so the sender has
to slow down).
Do not strip the ethernet CRC until we read all data from FIFO, otherwise
the CRC bytes would be left in FIFO causing the failure of next packet
(wrong packet header).
When this error happens the receiver has to be disabled and the RX FIFO
flushed, discarding valid packets.
With this fix if_emac behaves a lot better.
unit 0.
It seems that this 'simplification' was copied to all GPIO drivers in tree.
This fix a bug where a GPIO controller could fail to attach its children
(gpioc and gpiobus) if another GPIO driver attach first.
platform code, it is expected these will be merged in the future when the
ARM code is more complete.
Until more boards can be tested only use this with the Raspberry Pi and
rrename the functions on the other SoCs.
Reviewed by: ian@
and the functionality it provided into arm/exception.S. Rename the main
irq handling routine from arm_handler_execute() to arm_irq_handler() to
make it more congruent with how other exception handlers are named, and
also update its signature to reflect what has long been reality: it is
passed just a trapframe pointer, no interrupt number argument.
appropriate for each of the 'foo' in the tree. This will allow us to
compile them together (although symbol conflicts prevent us from doing
that today, this just fixes the file name collision).
It is available mostly in A10 devices like Hackberry, Marsboard,
Mele A1000, A2000, A100 HTPC, cubieboard1 and A20 device
like cubieboard2.
TX performance can be improved using both channels 0 and 1.
RX performance is poor and needs improvement with the assistance of
external DMA controller in case there is bulk TCP receiver.
Reviewed by: yongari@
Approved by: stas (mentor)
implementation in arm/machdep.c. Most arm platforms either don't need to
do anything, or just need to call the standard eventtimer init routines.
A generic implementation that does that is now provided via weak linkage.
Any platform that needs to do something different can provide a its own
implementation to override the generic one.
to check the status property in their probe routines.
Simplebus used to only instantiate its children whose status="okay"
but that was improper behavior, fixed in r261352. Now that it doesn't
check anymore and probes all its children; the children all have to
do the check because really only the children know how to properly
interpret their status property strings.
Right now all existing drivers only understand "okay" versus something-
that's-not-okay, so they all use the new ofw_bus_status_okay() helper.
static device mappings, rather than as the first of the initializations
that a platform can hook into. This allows a platform to allocate KVA
from the top of the address space downwards for things like static device
mapping, and return the final "last usable address" result after that and
other early init work is done.
Because some platforms were doing work in initarm_lastaddr() that needs to
be done early, add a new initarm_early_init() routine and move the early
init code to that routine on those platforms.
Rename platform_devmap_init() to initarm_devmap_init() to match all the
other init routines called from initarm() that are designed to be
implemented by platform code.
Add a comment block that explains when these routines are called and the
type of work expected to be done in each of them.
new devmap.[ch] files. Emphasize the MD nature of these things by using
the prefix arm_devmap_ on the function and type names (already a few of
these things found their way into MI code, hopefully it will be harder to
do by accident in the future).
The only remaining user was the code that allocates bounce pages for armv4
busdma. It's not clear why bounce pages would need uncached memory, but
if that ever changes, kmem_alloc_attr() would be the way to get it.
really need it. That would be almost everywhere it was included. Add
it in a couple files that really do need it and were previously getting
it by accident via another header.
included by vm/pmap.h, which is a prerequisite for arm/machine/pmap.h
so there's no reason to ever include it directly.
Thanks to alc@ for pointing this out.
Add support for A20 timer.
Correct interrupt offset depending from chip.
Add basic code for CPU configuration module.
For now, add kernel config and dts file
(only FDT blob related problem needs to be solved later in
order to have one kernel for both cubieboard1 and 2).
Approved by: ray@
sys/arm and sys/mips), squelching the clang 3.3 warnings about this.
Noticed by: tinderbox and many irate spectators
Submitted by: Luiz Otavio O Souza <loos.br@gmail.com>
PR: kern/177759
MFC after: 3 days
Switch eventtimers(9) from using struct bintime to sbintime_t.
Even before this not a single driver really supported full dynamic range of
struct bintime even in theory, not speaking about practical inexpediency.
This change legitimates the status quo and cleans up the code.
Fix pull-up and pull-down values of gpio.
According to A10 user manual possible pull register
values are 00 Pull-up/down disable, 01 Pull-up, 10 Pull-down.
Approved by: gonzo@
