Commit Graph

7 Commits

Author SHA1 Message Date
Eitan Adler
7a22215c53 Fix undefined behavior: (1 << 31) is not defined as 1 is an int and this
shifts into the sign bit.  Instead use (1U << 31) which gets the
expected result.

This fix is not ideal as it assumes a 32 bit int, but does fix the issue
for most cases.

A similar change was made in OpenBSD.

Discussed with:	-arch, rdivacky
Reviewed by:	cperciva
2013-11-30 22:17:27 +00:00
Robert Noland
9c03c0d88c Rework how drm maps are handled.
* On 32 bit platforms we steal the upper 4 bits of the map handle
   to store a unique map id.
 * On 64 bit platforms we steal the upper 24 bits.

Resolves issues where the offsets that are handed to mmap may overlap the VRAM on some cards.

Tested on: radeon, intel, mga, and via.

This will break nouveau.  I will spin new patches shortly.
2010-04-22 18:21:25 +00:00
Robert Noland
11de9e8c79 Cleanup in r600_blit
- Don't bother to assign vb until we know we have enough space
 - Add variables for sx2, sy2, dx2, dy2 so that these aren't
   calculated over and over, also reduce chance of errors.
 - Use switch to assign color/format

MFC after:	3 days
2009-10-30 18:08:46 +00:00
Robert Noland
883759335f Fix blitter support for RS880 chips
MFC after:	3 days
2009-10-30 16:55:31 +00:00
Robert Noland
d950002723 Fix blit pitch for 4 byte transfers on r600.
MFC after:	1 week
2009-09-28 22:38:44 +00:00
Robert Noland
14928dda5c Add a couple of small fixes from the AMD folks.
- max tex height is 8192
	- increment src/dst by the full transfer amount

MFC after:	3 days
2009-09-13 11:10:38 +00:00
Robert Noland
f588a0bda5 Add kernel support for Radeon R6/7xx 3D.
You will still need Mesa from git and possibly an updated DDX driver,
but this is working fairly well now.

MFC after:	2 weeks
2009-08-23 14:55:57 +00:00