than once. This appears to work around the hanging issues, at the
expense of warnings about bad RID allocations. I'm not sure this is a
permanant workaround, but does appear to help in the tests that I've
done here.
It currently supports the PMC Sierra Lite, Ultra and 622 chips and
the IDT 77105. The driver handles media options and state in a consistent
manner for ATM drivers. The next commit to the midway driver will make
it use utopia.
doesn't have one. The test was bogus on these architectures, but
recent changes broke it altogether.
Prompted by: phk
This should fix the recent SPARC 64 build problems.
o Register ISR INTR_MPSAFE.
o Loop on KTHREAD_DONE == 0 in the thread.
o Safe the INTR_MPSAFE flag for client drivers (don't know if there are any
CardBus/PCI drivers that are INTR_MPSAFE)
o Read status after acquiring mtx_lock(Giant) rather than before so that we
catch state changes that happen while Giant is being acquired.
o Turn off the CD bit when we see a CD interrupt, and turn it back on after
we've attached/detached the card.
o On suspend, actually set the CBB_SOCKET_MASK to zero rather than oring
in '0' to turn it off on suspend.
o If the ISR that's registerd is MPSAFE, don't acquire Giant around call to
client ISR.
o Fix comments to reflect these changes.
ia64-specific.
- When trying to re-route interrupts, don't change cfg->intline if the
re-route fails by returning an invalid vector. This fixes machines
without any way of routing interrupts such as older PC's without a
$PIR table.
We do not currently write the new intline value back to the hardware, but
we should. That will likely be added in a later commit.
if it was already enabled. We don't want to set it
when it shouldn't be set, we just don't want to
inadvertantly turn it off. This should fix a recent
report of the aic7xxx driver repeatedly complaining of
"unexpected busfree while idle" in one configuration.
successfully mapping our registers. This
avoids the disabling of memory mapped I/O
just because some other driver probe happened
to touch our registers.
This drive delays going async after receiving a WDTR
message. We now send an SDTR message after a WDTR even
if our goal is to go async. This should work even for
confused devices.
If we get an unexpected busfree when attempting a WDTR
or SDTR, only set the goal negotiation parameters we were
trying to negotiate to off. This means that should a WDTR
message fail, we will still try an SDTR if our goal is
non-async.
Fix a few more places where we were looking at goal.period
instead of goal.offset for determining if we should be
negotiating sync. This should not have any impact on
our behavior, but the offset is more definitive and should
be used.
aic79xx.c:
aic79xx.h:
aic79xx_pci.c:
aic7xxx.c:
aic7xxx.h:
aic7xxx_pci.c:
Switch ah?_reset() to take an additional "reinit" argument.
Use this instead of init_level to determin if the chip
should be fully reinitialized after a chip reset. This
is required so that ah?_shutdown() can reset the chip
without side-effects.
aic79xx.c:
Implement ahd_suspend() and ahd_resume().
aic7xxx.c:
Change ahc_loadseq() to *not* restart the sequencer.
This brings the loadseq behavior in line with that
of the 7902 driver and also simplifies the init routine.
Correct the resume routine to enable interrupts and
restart the sequencer.
obtained from o2micro. These should only be needed for 'older'
o2micro bridges (anything before the 7xxx series of bridges), but will
work with the new bridges.
# I don't plan on porting it to oldcard, but will happily commit to
# oldcard if someone else needs them.
Add sysctl's to display statistics/debug_info
Set WAIT_FOR_AUTONEG_DEFAULT to zero by default
Increment packet in/out statistics inline instead of every two seconds.
MFC after: 3 days
Always route PCI interrupts on i386 UP machines. I was planning to enable
this for i386 anyways once SMP support is done. Having this enabled fixes
problems on many people's laptops.
Requested by: imp
While a string is readable without a tool, an array is easier to process for
a monitoring application. This also prevents the extra hoops we need with
sbufs and locking.
Move the mtx_init() in en_attach() higher before the first failure point so
that we can unconditionally destroy it in en_destroy().
to unload. This would cause a panic on the second resetconfig.
Start Vinum at boot time at SI_SUB_RAID, not SI_SUB_VINUM.
SI_SUB_VINUM was there first, but there's no real distinction, and
SI_SUB_RAID is a more neutral name.
Submitted by: hmp
o adding locking to op submission
o mark interrupt handler MPSAFE
o don't use locking on detach; disabling interrupts should be sufficient
o change mutex string names so witness printouts are more meaningful
Note: locking is still pretty brute-force but it's probably not worth
improving it given the relatively low performance of hifn-based cards.
o replace driver-global lock with three locks: one for the handling of mcr1
operations, one for handling of mcr2 operations, and one for the mcr1
free list
o mark the interrupt handler MPSAFE
o don't use locking on detach; disabling interrupts is sufficient (I think)
Change the list interface to simplify things.
Remove old list ioctls which bogusly exported the softc to userland.
Move the softc and associated structures from the public header to
the source file.
Make CCD a GEOM class.
For now only use this for implementing a OAM config method which
can return a list of configured CCD devices in the format which
"ccdconfig -g[v]" would normally output.
bzero(ptr, sizeof(DC_RXLEN * 5));
which should obviously be:
bzero(ptr, DC_RXLEN * 5);
Looks like this bug may have reduced the effectiveness of the
workaround for the hardware bug in the PNIC chips.
MFC after: 1 week
o Remove register keyword
o ANSIfy prototypes
o Remove "return;" at the end of void functions
o Remove trailing spaces
o Don't align local variables with tabs and reorder them
o Don't use /* FOO */ at the end of a #ifdef FOO block if
it's a small block
- Other non-functional changes :
o 6 -> ETHER_ADDR_LEN
o Don't initialize if_output; ether_ifattach() does it for us
-Werror build with such option, but not other combinations. LINT
misses this because syscons knobs in LINT turn off a lot of code.
Reviewed by: marcel (some time ago)
Use the special LUNLEN_SINGLE_LEVEL constant for
post Rev A4 hardware for single byte luns. Without
this change, Rev B hardware would place the single
byte of lun data in byte 0 of the lun structure when
it should be in byte 1. Since there are few if any
devices on the market that support multiple luns in
target mode, the corrupted lun field (which was only
corrupted for non-zero luns) wasn't hurting us.
Approved by: re (rwatson)
aic79xx.h:
aic79xx.reg:
Return the SCB_TAG field to 16byte alignment.
It seems that on some PCI systems, SCBs are not
transferred correctly to the controller with
the previous placement of the SCB_TAG field.
Approved by: re (rwatson)
865. The APSIZE register has a variable-sized field of enabled bits.
To figure out how many bits a specific host bridge supports, write the
maximum width and see how many bits are set in the hardware. We then
use this mask for setting and getting the aperture size. Prior to this,
the agp(4) driver would treat an aperture size of 256 MB as 128 MB and
would not allocate enough physical memory for the GART as a result.
MFC after: 3 days
Sponsored by: The Weather Channel
Approved by: re (rwatson)
BUS_DMASYNC_ definitions remain as before. The does not change the ABI,
and reverts the API to be a bit more compatible and flexible. This has
survived a full 'make universe'.
Approved by: re (bmah)
aic79xx.c:
In ahd_handle_ign_wide_residue():
o Use SCB_XFERLEN_ODD SCB field to determine transfer
"oddness" rather than the DATA_COUNT_ODD logic.
SCB_XFERLEN_ODD is toggled on every ignore wide
residue message so that multiple ignore wide residue
messages for the same transaction are properly supported.
o If the sg list has been exausted, the sequencer
doesn't bother to update the residual data count
since it is known to be zero. Perform the zeroing
manually before calculating the remaining data count.
o Use multibyte in/out macros instead of shifting/masking
by hand.
aic79xx_inline.h:
In ahd_setup_scb_common(), setup the SCB_XFERLEN_ODD field.
aic79xx.reg:
Use the SCB_TASK_ATTRIBUTE field as a bit field in the
non-packetized case. We currently only define one bit,
SCB_XFERLEN_ODD.
Remove the ODD_SEG bit field that was used to carry the odd
transfer length information through the SG cache. This
is obviated by SCB_XFERLEN_ODD field.
Remove the DATA_COUNT_ODD scratch ram byte that was used
dynamicaly compute data transfer oddness. This is obviated
by SCB_XFERLEN_ODD field.
aic79xx.seq:
Remove all updates to the DATA_COUNT_ODD scratch ram field.
Remove all uses of ODD_SEG. These two save quite a few
sequencer instructions.
Use SCB_XFERLEN_ODD to validate the end of transfer
ignore wide residue message case.
aic7xxx.c:
In ahc_handle_ign_wide_residue():
o Use SCB_XFERLEN_ODD SCB field to determine transfer
"oddness" rather than the DATA_COUNT_ODD logic.
SCB_XFERLEN_ODD is toggled on every ignore wide
residue message so that multiple ignore wide residue
messages for the same transaction are properly supported.
o If the sg list has been exausted, the sequencer
doesn't bother to update the residual data count
since it is known to be zero. Perform the zeroing
manually before calculating the remaining data count.
o Ensure that SG_LIST_NULL is cleared in the
residual sg pointer for "mid-transfer" ignore
wide residue cases.
o Use multibyte in/out macros instead of shifting/masking
by hand.
aic7xxx.h:
Modify the SCB_GET_LUN() macro to mask the lun hardware
SCB field with LID. This leaves two bits in the LUN
field that can be used for other purposes.
aic7xxx.reg:
Change LID to be 0x3F. This is the maximum supported
lun size for non-packetized SCSI. Map the top bit
of the lun to SCB_XFERLEN_ODD. The host must set
this bit whenever a transfer is an odd length.
Remove the ODD_SEG bit field that was used to carry the odd
transfer length information through the SG cache. This
is obviated by SCB_XFERLEN_ODD field.
Remove the DATA_COUNT_ODD scratch ram byte that was used
dynamicaly compute data transfer oddness. This is obviated
by SCB_XFERLEN_ODD field.
aic7xxx.seq:
Be more careful in our handling of the SCB_LUN field. It
must be masked with LID if only lun information is desired.
Remove all updates to the DATA_COUNT_ODD scratch ram field.
Remove all uses of ODD_SEG. These two save quite a few
sequencer instructions.
Use SCB_XFERLEN_ODD to validate the end of transfer
ignore wide residue message case.
aic7xxx_inline.h:
In ahc_queue_scb(), setup the SCB_XFERLEN_ODD field.
Approved by: RE
FAILDIS in the SEQCTL register, not the HCNTRL register.
aic7xxx.c:
Remeber SEQCTL settings in the "seqctl" field of our
softc. seqctl defaults to just having FASTMODE set,
but the bus attachments can override this.
aic7xxx.h:
Add the seqctl softc field.
aic7xxx_pci.c:
Update the seqctl softc field and manually update SEQCTL
when to many PCI errors occur
Approved by: RE
to be more efficient by having the sequencer copy the
single byte of valid lun data into the long lun field.
aic79xx.c:
Memset our hardware SCB to 0 so that untouched
fields don't confuse diagnostic output. With the
old method for handling the Rev A bug, if the long
lun field was not 0, this could result in bogus
lun information being sent to drives.
Use the same SCB transfer size for all chip types
now that the long lun is not DMA'ed to the chip.
aic79xx.seq:
Add code to copy lun information for Rev.A hardware.
aic79xx_inline.h:
Remove host update of the long_lun field on every
packetized command.
Sort IDs based on chip type.
Remove IROC IDs. We'll switch to using the IROC masks
if/when we want to start attaching to IROC controllers.
Approved by: RE
structure, which is new to the 82550 and 82551, is used to transmit
a packet. This appears to fix the packet truncation problem that was
observed when using 82550-based fxp cards to transmit ICMP or fragmented
UDP packets of certain lengths which only had one to three bytes in the
second and final mbuf of the packet. This matches a note in the "Intel
8255x 10/100 Mbps Ethernet Controller Family Open Source Software Developer
Manual", which says that the hardware parse bit should be set when sending
these types of packets.
There have also been unconfirmed reports of similar problems when
transmitting TCP packets, which should not be affected by the above
mentioned change because the hardware parse bit was already being set
if the stack requested hardware checksumming of the packet. If the
problem remains, the use of the IPCB structure can be disabled to
cause the driver to fall back to using the older 82559 interface with
82550-based cards by setting
hint.fxp.UNIT_NUMBER.ipcbxmit_disable
to a non-zero value at boot time, or using kenv to set this variable
before using kldload to load the fxp driver.
Approved by: re (jhb)
set on realtek cards, but they work without it (and don't work with
it). The standard seems to imply that this is just a hint anyway, so
this should be harmless. It doesn't appear to be set on any other
cardbus cards that I have (or have seen).
This should make the rl based CardBus cards work again. I've been
running it for about a month now.
Approved by: re@ (jhb)
buffer space instead of a u_int32_t. Otherwise the upper 32 bits of
the address space get truncated and syscons blows up.
Approved by: re (safe, low risk amd64 fixes)
of the struct plex, which tore apart the mutex linked lists when the
plex table was expanded. Now we maintain a pool of mutexes (currently
32) to be shared by all plexes. This is still a lot better than the
splhigh() method used in other architectures.
expand_table: Add parameters file and line if we're debugging.
Approved by: re (jhb)
of the struct plex, which tore apart the mutex linked lists when the
plex table was expanded. Now we maintain a pool of mutexes (currently
32) to be shared by all plexes. This is still a lot better than the
splhigh() method used in other architectures.
Add and clarify comments.
Approved by: re (jhb)
of the struct plex, which tore apart the mutex linked lists when the
plex table was expanded. Now we maintain a pool of mutexes (currently
32) to be shared by all plexes. This is still a lot better than the
splhigh() method used in other architectures.
Approved by: re (jhb)
of the struct plex, which tore apart the mutex linked lists when the
plex table was expanded. Now we maintain a pool of mutexes (currently
32) to be shared by all plexes. This is still a lot better than the
splhigh() method used in other architectures.
update_volume_config: Remove redundant diskconfig parameter.
expand_table: Add parameters file and line if we're debugging.
Approved by: re (jhb)
Submitted by: Ted Unangst <tedu@stanford.edu>
Correct some inaccurate and badly formatted comments.
config_subdisk: If our drive is down, ensure that the subdisk is
crashed. Previously it was possible for the subdisk
to be up when the drive was down.
Change the way the plex lock mutexes work. Previously they were part
of the struct plex, which tore apart the mutex linked lists when the
plex table was expanded. Now we maintain a pool of mutexes (currently
32) to be shared by all plexes. This is still a lot better than the
splhigh() method used in other architectures.
update_volume_config: Remove redundant diskconfig parameter.
Approved by: re (jhb)
Change config format slightly to save plex preferences correctly.
vinum_scandisk: reinitialise volatile pointer after function call.
This is the "deafc0de" bug.
Approved by: re (scottl)
This fixes net/pppoa port for Alcatel Speedtouch devices.
Submitted by: Jay Cornwall <jay@evilrealms.net>
Tested by: Francois Rogler <francois@rogler.org>
Approved by: re (scottl)
on if_fxp cards. When flow control is enabled, if the operating system
doesn't acknowledge the packet buffer filling, the card will begin to
generate ethernet quench packets, but appears to get into a feedback
loop of some sort, hosing local switches. This is a temporary workaround
for 5.1: the ability to configure flow control should probably be
exposed by some or another management interface on ethernet link layer
devices.
Approved by: re (bmah)
Reviewed by: mux
all of the Optio series have the same problems. It might be a better
approach eventually to add wildcard support to USB quirks.
PR: kern/50271, kern/46369
Approved by: re (rwatson)
- Fix compilation without GEM_DEBUG.
- Do not #define GEM_DEBUG by default; it adds overhead (due to bzero()ing
RX space) and is not needed any more, since the driver is quite stable
now.
- Fix watchdog timeouts when failing to load TX packets.
- Do not forcibly limit the number of descriptors used for a packet to
GEM_NTXSEGS, by passing this number to bus_dma_tag_create(). There is
no requirement for a limit any lower than the total number of
available descriptors, and the present limit caused network problems
due to mbuf chains requiring more descriptors.
GEM_NTXSEGS is still used to estimate the interrupt window size, for
which we just need an estimate.
Approved by: re (rwatson)
The submitter of PR 32118 told me that this patch also fixes autoselecting
for znyx 4 port cards (10baseT, 100baseTX did work already).
PR: 32118
Reviewed by: imp
Approved by: rwatson (re)
has already been registered with ATAPI/CAM (else there is nothing
to do). atapi_cam_reinit_bus may be called before the bus is
registered if an ATAPI command times out during the boot sequence.
PR: i386/51421
Reviewed by: roberto
Approved by: re (rwatson)
MFC after: 1 week
by using a __packed keyword for the fxp_rfa structure. The Intel
guys who designed this structure with unaligned fields deserve
to be shot.
Tested by: kris
Approved by: re@ (jhb)
bus_dma MD code for AMD64. (And a trivial ifdef update in dev/kbd because
of this). More updates are needed here to take advantage of the 64 bit
instructions.
Approved by: re (blanket amd64/*)
- Simplify and correct the bus manager election process.
- Check link_active when choosing cycle master.
- Fix location of the cmr bit.
Approved by: re (scottl)
series. This driver was generously developed and released by David
Jeffreys and Adaptec. I've updated it to work with 5.x and fixed a
few bugs.
MFC After: 1 week
ASIC revision is really the major number of the CHIPID. Also store
the chipid, asic rev and chip revision in the softc for later use.
- The write twice to send producer index workaround only applies to
the 5700_BX chips, so only do it there.
Requested by: jdp
- Do not initalize the LED's to 0x00. The default configuration
the chip comes up in should yeild proper operation of the LED's.
Confirmed by: John Cagle <john.cagle@hp.com>
Approved by: re (blanket)
ILMI daemons. Factor out common softc fields for all ATM interfaces that
need to be externally visible into an ifatm structure and make the midway
driver using this structure and fill the MIB.
Maintain sector sizes for all objects, not just for drives. Some of
this could do with improvement: in particular, we get an error if the
components of an object have different sector sizes.
Clean up some comments.
the -v option, though it's not clear that it won't bite us elsewhere.
Forgotten by: phk
Implement setreadpol() function for the VINUM_READPOL ioctl.
Submitted by: Allan Saddi <allan@saddi.com>
with it.
Finally implement read policies. The previous "implementation" didn't
work because it referred to plexes which were almost invariably when
referred to. Instead, deprecate the "prefer" keyword for volumes
(though it's still there for the moment) and add a keyword "preferred"
to the plex definition. The relationship is like this:
Old:
vol foo ... prefer foo.p3
New:
plex foo.p3 volume foo preferred
print_config: Print "preferred" where appropriate.
No longer print "prefer" on volume config entries.
work because it referred to plexes which were almost invariably when
referred to. Instead, deprecate the "prefer" keyword for volumes
(though it's still there for the moment) and add a keyword "preferred"
to the plex definition. The relationship is like this:
Old:
vol foo ... prefer foo.p3
New:
plex foo.p3 volume foo preferred
give_plex_to_volume: set preferred plex if specified on plex
definition entry. This involves adding a parameter to the function to
specify the preferred plex.
config_plex: Implement preferred keyword.
Add ioctl VINUM_READCONFIG which implements both the "read" and
"start" commands in vinum(8). Aim for marginally better error
messages when something goes wrong.
Switch to handling bad SCSI status as a sequencer interrupt
instead of having the kernel proccess these failures via
the completion queue. This is done because:
o The old scheme required us to pause the sequencer and clear
critical sections for each SCB. It seems that these pause
actions, if coincident with a sequencer FIFO interrupt, would
result in a FIFO interrupt getting lost or directing to the
wrong FIFO. This caused hangs when the driver was stressed
under high "queue full" loads.
o The completion code assumed that it was always called with
the sequencer running. This may not be the case in timeout
processing where completions occur manually via
ahd_pause_and_flushwork().
o With this scheme, the extra expense of clearing critical
sections is avoided since the sequencer will only self pause
once all pending selections have cleared and it is not in
a critical section.
aic79xx.c
Add code to handle the new BAD_SCB_STATUS sequencer
interrupt code. This just redirects the SCB through
the already existing ahd_complete_scb() code path.
Remove code in ahd_handle_scsi_status() that paused
the sequencer, made sure that no selections where
pending, and cleared critical sections. Bad
status SCBs are now only processed when all of these
conditions are true.
aic79xx.reg:
Add the BAD_SCB_STATUS sequencer interrupt code.
aic79xx.seq:
When completing an SCB upload to the host, if
we are doing this because the SCB contains non-zero
SCSI status, defer completing the SCB until there
are no pending selection events. When completing
these SCBs, use the new BAD_SCB_STATUS sequencer
interrupt. For all other uploaded SCBs (currently
only for underruns), the SCB is completed via the
normal done queue. Additionally, keep the SCB that
is currently being uploaded on the COMPLETE_DMA_SCB
list until the dma is completed, not just until the
DMA is started. This ensures that the DMA is restarted
properly should the host disable the DMA transfer for
some reason.
In our RevA workaround for Maxtor drives, guard against
the host pausing us while trying to pause I/O until the
first data-valid REQ by clearing the current snapshot
so that we can tell if the transfer has completed prior
to us noticing the REQINIT status.
In cfg4data_intr, shave off an instruction before getting
the data path running by adding an entrypoint to the
overrun handler to also increment the FIFO use count.
In the overrun handler, be sure to clear our LONGJMP
address in both exit paths.
Perform a few sequencer optimizations.
aic79xx.c:
Print the full path from the SCB when a packetized
status overrun occurs.
Remove references to LONGJMP_SCB which is being
removed from firmware usage.
Print the new SCB_FIFO_USE_COUNT field in the
per-SCB section of ahd_dump_card_state(). The
SCB_TAG field is now re-used by the sequencer,
so it no longer makes sense to reference this
field in the kernel driver.
aic79xx.h:
Re-arrange fields in the hardware SCB from largest
size type to smallest. This makes it easier to
move fields without changing field alignment.
The hardware scb tag field is now down near the
"spare" portion of the SCB to facilitate reuse
by the sequencer.
aic79xx.reg:
Remove LONGJMP_ADDR.
Rearrange SCB fields to match aic79xx.h.
Add SCB_FIFO_USE_COUNT as the first byte
of the SCB_TAG field.
aic79xx.seq:
Add a per-SCB "Fifos in use count" field and use
it to determine when it is safe (all data posted)
to deliver status back to the host. The old method
involved polling one or both FIFOs to verify that
the current task did not have pending data. This
makes running down the GSFIFO very cheap, so we
will empty the GSFIFO in one idle loop pass in
all cases.
Use this simplification of the completion process
to prune down the data FIFO teardown sequencer for
packetized transfers. Much more code is now shared
between the data residual and transfer complete cases.
Correct some issues in the packetized status handler.
It used to be possible to CLRCHN our FIFO before status
had fully transferred to the host. We also failed to
handle NONPACKREQ phases that could occur should a CRC
error occur during transmission of the status data packet.
Correct a few big endian issues:
aic79xx.c:
aic79xx_inline.h:
aic79xx_pci.c:
aic79xx_osm.c:
o Always get the SCB's tag via the SCB_GET_TAG acccessor
o Add missing use of byte swapping macros when touching
hscb fields.
o Don't double swap SEEPROM data when it is printed.
Correct a big-endian bug. We cannot assign a
o When assigning a 32bit LE variable to a 64bit LE
variable, we must be explict about how the words
of the 64bit LE variable are initialized. Cast to
(uint32_t*) to do this.
aic79xx.c:
In ahd_clear_critical_section(), hit CRLSCSIINT
after restoring the interrupt masks to avoid what
appears to be a glitch on SCSIINT. Any real SCSIINT
status will be persistent and will immidiately
reset SCSIINT. This clear should only get rid of
spurious SCSIINTs.
This glitch was the cause of the "Unexpected PKT busfree"
status that occurred under high queue full loads
Call ahd_fini_scbdata() after shutdown so that
any ahd_chip_init() routine that might access
SCB data will not access free'd memory.
Reset the bus on an IOERR since the chip doesn't
seem to reset to the new voltage level without
this.
Change offset calculation for scatter gather maps
so that the calculation is correct if an integral
multiple of sg lists does not fit in the allocation
size.
Adjust bus dma tag for data buffers based on 39BIT
addressing flag in our softc.
Use the QFREEZE count to simplify ahd_pause_and_flushworkd().
We can thus rely on the sequencer eventually clearing ENSELO.
In ahd_abort_scbs(), fix a bug that could potentially
corrupt sequencer state. The saved SCB was being
restored in the SCSI mode instead of the saved mode.
It turns out that the SCB did not need to be saved at all
as the scbptr is already restored by all subroutines
called during this function that modify that register.
aic79xx.c:
aic79xx.h:
aic79xx_pci.c:
Add support for parsing the seeprom vital product
data. The VPD data are currently unused.
aic79xx.h:
aic79xx.seq:
aic79xx_pci.c:
Add a firmware workaround to make the LED blink
brighter during packetized operations on the H2A.
aic79xx_inline.h:
The host does not use timer interrupts, so don't
gate our decision on whether or not to unpause
the sequencer on whether or not a timer interrupt
is pending.
aic7xxx.h:
Split out core chip initialization into ahc_chip_init().
This will allow us to reset the chip correctly at times
other than initial chip setup.
aic7770.c
aic7xxx_pci.c:
Flesh out bus chip init methods for our two
bus attachments and use these, in addition to
bus suspend/resume hooks to get the core in
better shape for handling these events.
When disabling PCI parity error checking, use FAILDIS.
Although the chip docs indicate that clearing PERRESPEN
should also work, it does not.
Auto-disable pci parity error checking after informing
the user of AHC_PCI_TARGET_PERR_THRESH number of parity
errors observed as a target.
aic7xxx.h:
aic7xxx_pci.c
aic7770.c
aic7xxx.c
Add the instruction_ram_size softc field.
Remove the now unused stack_size softc field.
Modify ahc_loadseq to return a failure code
and to actually check the downloaded instruction
count against the limit set in our softc.
Modify callers of ahc_loadseq to handle load
failures as appropriate.
Set instruction RAM sizes for each chip type.
aic7xxx_pci.c:
Add some delay in the aic785X termination
control code. This may fix problems with
the 2930.
Be consistent in how we access config space
registers. 16bit registers are accessed using
16bit ops.
aic7xxx.c:
Correct spelling errors.
Have ahc_force_renegotiation() take a devinfo as is done
in the U320 driver. Use this argument to correct a bug
in the selection timeout handler where we forced a renegotiation
with the last device that had set SAVED_SCSIID. SAVED_SCSIID
is only updated once a selection is *sucessfull* and so is
stale for any selection timeout.
Cleanup the setup of the devinfo for busfree events. We
now use this devinfo for a call to ahc_force_renegotiation()
at the bottom of the routine, so it must be initialized in
all cases.
In ahc_pause_and_flushwork(), adjust the loop so that it
will exit in the hot-eject case even if the INT_PEND mask
is something other than 0xFF (as it is in this driver).
Correct a wrapping string constant.
Call ahc_fini_scbdata() after shutdown so that
any ahc_chip_init() routine that might access
SCB data will not access free'd memory.
Correctly setup our buffer tag to indicate that 39bit
addressing is available if in 39bit addressing mode.
Rearrange some variable declarations based on
type size.
aic7xxx.c
aic7xxx.h:
aic7xxx.reg:
Consistently use MAX_OFFSET for the user max syncrate
set from non-volatile storage. This ensures that the
offset does not conflict with AHC_OFFSET_UNKNOWN.
Change AHC_OFFSET_UNKNOWN to 0xFF. This is
a value that the curr->offset can never be,
unlike '0' which we previously used. This
fixes code that only checks for a non-zero
offset to determine if a sync negotiation
is required since it will fire in the unknown
case even if the goal is async.
Change MAX_OFFSET to 0x7f which is the max
offset U160 aic7xxx controllers can negotiate.
This ensures that curr->offset will not
match AHC_OFFSET_UNKNOWN.
aic7xxx_inline.h:
Have our inline interrupt handler return with a value
indicating whether we serviced a real interrupt. This
is required for Linux support.
Return earlier if the interrupt is not for us.
patch workarounds for each phy revision.
Obtained from: NetBSD & Broadcom Linux driver
- Disable AUTOPOLL when accessing the PHY as it may cause PCI errors.
Obtained from: NetBSD
- Check the UPDATED bit in the status block so the driver knows
that the status block as indeed changed since the last access.
Broadcom documentation states drivers should unset the UPDATED/CHANGED
bits after reading them.
- When changing media types, first loop the phy then set the media.
Broadcom documentation and Linux drivers do this and I observed
much better handling of link after this change.
- Broadcom documentation states that for 1000BaseT operation,
autonegotiation must be enabled. Fix hard coding of media so that
the driver only advertises 1000BaseT as the supported media type
and enable autonegotition.
- Only set Master/Slave on the 5701.
Obtained from Broadcom Linux driver.
- Use htole* macros where appropriate so that the driver could work on non-x86 architectures
- Use m_getcl() instead of MGETHDR/MCLGET macros
Submitted by: sam (Sam Leffler)
Note: this might print failure messages on some systems, unfortunatly
the info from the device, stating if flushing is supported, cannot be trusted
so the operation is always issued on all devices, just in case...
just return it. Don't try to reinitialize it. This should fix a
number of inconsistencies that some people encountered with "vinum
start".
PR: 30588
PR: 43475
of <machine/pc/bios.h> specific to i386 and added a conditional define
for BIOS_PADDRTOVADDR that depends on ISA_HOLE_START. The latter is
undefined on alpha and ia64. Since the former is defined the same on
both alpha and ia64, assume the ISA_HOLE_START dependent definition
is specific to amd64 and use the identity-mapping in all other cases.
This of course is getting uglier every day...
project by providing documentation (under NDA) and hardware for
testing. This commit is the first result of the cooperation, and
adds support for several of their new controllers that we didn't
support before (and probably newer would have without this arrangement).
Add support for the Promise SATA150 TX2/TX4 and the Promise TX4000
controllers. This also adds support for various motherboard fitted
Promise SATA/ATA chips.
Note that this code uses memory mapped registers to minimize overhead.
I belive FreeBSD has made another first in the Open Source world
by being able to release support for this :)
object: subdisks, plexes and volumes. The encoding for plexes and
subdisks no longer reflects the object to which they belong. The
super devices are high-order volume numbers. This gives vastly more
potential volumes (4 million instead of 256).
