Commit Graph

523 Commits

Author SHA1 Message Date
Roger Pau Monné
d4ed36cde2 pci: fix write order when sizing BARs
According to the PCI Local Specification rev. 3.0 in case of a 64-bit
BAR both the low and the high parts of the register should be set to
~0 before attempting to read back the size.

So far I have found no single device that has problems with the
previous approach, but I think it's better to stay on the safe size.

This commit should not introduce any functional change.

MFC after:		3 weeks
Sponsored by:		Citrix Systems R&D
Reviewed by:		jhb
Differential revision:	https://reviews.freebsd.org/D11750
2017-08-01 10:47:44 +00:00
Sepherosa Ziehau
1536a1b843 alc: Add Killer E2500 support
Reviewed by:	jhb, yongari
MFC after:	1 week
Sponsored by:	Microsoft
Differential Revision:	https://reviews.freebsd.org/D9058
2017-01-16 03:03:47 +00:00
Conrad Meyer
db4fcadf52 "Buses" is the preferred plural of "bus"
Replace archaic "busses" with modern form "buses."

Intentionally excluded:
* Old/random drivers I didn't recognize
  * Old hardware in general
* Use of "busses" in code as identifiers

No functional change.

http://grammarist.com/spelling/buses-busses/

PR:		216099
Reported by:	bltsrc at mail.ru
Sponsored by:	Dell EMC Isilon
2017-01-15 17:54:01 +00:00
Hans Petter Selasky
fafbaf7977 Add MSIX rewrite table quirk for use with VMs.
This patch solves IRQ generation problems using the mlx5en(4) driver
with xenserver v6.5.0 in SRIOV and PCI-passthrough modes.

Until further the hw.pci.msix_rewrite_table quirk must be set manually
in /boot/loader.conf .

Reviewed by:		jhb @
Sponsored by:           Mellanox Technologies
MFC after:		2 weeks
2016-12-30 08:37:30 +00:00
Alexander Motin
a7a560be79 Add names for some DASP devices.
Submitted by:	Dmitry Luhtionov <dmitryluhtionov@gmail.com>
MFC after:	1 week
2016-10-21 15:23:54 +00:00
Sepherosa Ziehau
4d6e19e457 pci: Clear the MEM/PORT_EN bit when updating PCI BAR
It's unsafe to update the BAR when the related EN bit is set.

Submitted by:	Dexuan Cui <decui microsoft com>
Reviewed by:	jhb
MFC after:	1 week
Sponsored by:	Microsoft
Differential Revision:	https://reviews.freebsd.org/D7914
2016-09-27 06:00:10 +00:00
John Baldwin
bd71669277 Fix invalid vendor ID constant (typo).
During a bus rescan the check for an invalid vendor ID of a subfunction
used the wrong constant.

Submitted by:	Dexuan Cui <decui@microsoft.com>
MFC after:	3 days
2016-09-21 16:51:56 +00:00
John Baldwin
da0fc9250c Reset PCI pass through devices via PCI-e FLR during VM start and end.
Add routines to trigger a function level reset (FLR) of a PCI-express
device via the PCI-express device control register.  This also includes
support routines to wait for pending transactions to complete as well
as calculating the maximum completion timeout permitted by a device.

Change the ppt(4) driver to reset pass through devices before attaching
to a VM during startup and before detaching from a VM during shutdown.

Reviewed by:	imp, wblock (earlier version)
MFC after:	1 month
Sponsored by:	Chelsio Communications
Differential Revision:	https://reviews.freebsd.org/D7751
2016-09-06 21:15:35 +00:00
John Baldwin
64414cc00f Update the I/O MMU in bhyve when PCI devices are added and removed.
When the I/O MMU is active in bhyve, all PCI devices need valid entries
in the DMAR context tables. The I/O MMU code does a single enumeration
of the available PCI devices during initialization to add all existing
devices to a domain representing the host. The ppt(4) driver then moves
pass through devices in and out of domains for virtual machines as needed.
However, when new PCI devices were added at runtime either via SR-IOV or
HotPlug, the I/O MMU tables were not updated.

This change adds a new set of EVENTHANDLERS that are invoked when PCI
devices are added and deleted. The I/O MMU driver in bhyve installs
handlers for these events which it uses to add and remove devices to
the "host" domain.

Reviewed by:	imp
Sponsored by:	Chelsio Communications
Differential Revision:	https://reviews.freebsd.org/D7667
2016-09-06 20:17:54 +00:00
Pyun YongHyeon
477cba21d2 Add Killer E2400 Gigabit Ethernet support.
It seems Killer E2200/E2400 has a BIOS misconfiguration or silicon
bug which triggers DMA write errors when driver uses advertised
maximum payload size.  Force the maximum payload size to 128 bytes
in DMA configuration.
This change should fix occasional DMA write errors reported on
Killer E2200.

Tested by:	<psy0nic@sys-tek.org>
2016-08-22 01:19:05 +00:00
John Baldwin
2ab0398d94 Add pci_get_max_payload() to fetch the PCI-express maximum payload size.
Approved by:	re (gjb)
MFC after:	2 weeks
Sponsored by:	Chelsio Communications
Differential Revision:	https://reviews.freebsd.org/D6951
2016-06-24 17:26:42 +00:00
Andrew Turner
d7be980dbe Re-commit r299467 having fixed the build:
Add a new get_id interface to pci and pcib. This will allow us to both
detect failures, and get different PCI IDs.

For the former the interface returns an int to signal an error. The ID is
returned at a uintptr_t * argument.

For the latter there is a type argument that allows selecting the ID type.
This only specifies a single type, however a MSI type will be added
to handle the need to find the ID the hardware passes to the ARM GICv3
interrupt controller.

A follow up commit will be made to remove pci_get_rid.

Reviewed by:    jhb, rstone (previous version)
Obtained from:  ABT Systems Ltd
Sponsored by:   The FreeBSD Foundation
Differential Revision:  https://reviews.freebsd.org/D6239
2016-05-16 09:15:50 +00:00
Conrad Meyer
f41be0f076 Revert r299467 to fix the kernel build.
$ svn merge -c -299467 .

Approved by:	build being broken for six hours
2016-05-11 23:00:12 +00:00
Andrew Turner
9a36a337ff Add a new get_id interface to pci and pcib. This will allow us to both
detect failures, and get different PCI IDs.

For the former the interface returns an int to signal an error. The ID is
returned at a uintptr_t * argument.

For the latter there is a type argument that allows selecting the ID type.
This only specifies a single type, however a MSI type will be added
to handle the need to find the ID the hardware passes to the ARM GICv3
interrupt controller.

A follow up commit will be made to remove pci_get_rid.

Reviewed by:	jhb, rstone
Obtained from:	ABT Systems Ltd
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D6239
2016-05-11 17:07:29 +00:00
John Baldwin
1963070cd3 Restore name=value format of PCI location strings.
When devctl was added, the location string for PCI devices was changed to
use the PCI "selector" that pciconf and devctl accept.  However, devd
assumes that location strings are formatted as a list of name=value pairs.
As a result, devd is no longer parsing any of the values out of PCI
device events.  Restore the previous format of the PCI location strings
to restore the location and slot keywords in case any devd scripts are
using this.  Add the "selector" as a new 'dbsf' location variable.

Reviewed by:	imp
MFC after:	3 days
Differential Revision:	https://reviews.freebsd.org/D6253
2016-05-06 23:46:35 +00:00
Jung-uk Kim
12b204a61b Fix build without "options PCI_IOV". 2016-05-04 06:22:41 +00:00
John Baldwin
e402d55c84 Save and restore SRIOV-related config registers.
Save the value of the IOV control and page size registers and restore
them (along with the VF count) in pci_cfg_save/pci_cfg_restore.  This
ensures ARI remains enabled if a PF driver resets itself during the
PCI_IOV_INIT callback.  This might also properly restore SRIOV state
across suspend/resume.

Reviewed by:	rstone, vangyzen
Differential Revision:	https://reviews.freebsd.org/D6192
2016-05-03 19:45:24 +00:00
Pedro F. Giffuni
453130d9bf sys/dev: minor spelling fixes.
Most affect comments, very few have user-visible effects.
2016-05-03 03:41:25 +00:00
John Baldwin
a38f0dafb5 Fix an off by one error when remapping MSI-X vectors.
pci_remap_msix() can be used to alter the mapping of allocated
MSI-X vectors to the MSI-X table.  The code had an off by one error
when adding the IRQ resources after performing a remap.  This was
fatal for any vectors in the table that used the "last" valid IRQ as
those vectors were assigned a garbage IRQ value.

MFC after:	3 days
2016-05-03 00:35:11 +00:00
John Baldwin
5e45663658 Fix build for systems without PCI_RES_BUS.
Submitted by:	vangyzen
2016-04-27 19:54:56 +00:00
John Baldwin
c91991a2d8 Fix PCI bus detach to delete child devices.
Differential Revision:	https://reviews.freebsd.org/D6020
2016-04-27 16:34:29 +00:00
John Baldwin
3d0338a092 Implement a PCI bus rescan method.
Rescanning a PCI bus uses the following steps:
- Fetch the current set of child devices and save it in the 'devlist'
  array.
- Allocate a parallel array 'unchanged' initalized with NULL pointers.
- Scan the bus checking each slot (and each function on slots with a
  multifunction device).
- If a valid function is found, look for a matching device in the 'devlist'
  array.  If a device is found, save the pointer in the 'unchanged' array.
  If a device is not found, add a new device.
- After the scan has finished, walk the 'devlist' array deleting any
  devices that do not have a matching pointer in the 'unchanged' array.
- Finally, fetch an updated set of child devices and explicitly attach any
  devices that are not present in the 'unchanged' array.

This builds on the previous changes to move subclass data management into
pci_alloc_devinfo(), pci_child_added(), and bus_child_deleted().

Subclasses of the PCI bus use custom rescan logic explicitly override the
rescan method to disable rescans.

Differential Revision:	https://reviews.freebsd.org/D6018
2016-04-27 16:31:12 +00:00
Conrad Meyer
517960dc84 PCI Enhanced Allocation: Annotate an intentional switch fallthrough
This is a trivial follow-up to r296308.  Annotate the intentional fallthrough
to make it clear for future readers and linters.

Reported by:	Coverity
CID:		1352716
Discussed with:	jhb
Sponsored by:	EMC / Isilon Storage Division
2016-04-26 20:06:35 +00:00
John Baldwin
6cd99ae86d Add a new PCI bus interface method to alloc the ivars (dinfo) for a device.
The ACPI and OFW PCI bus drivers as well as CardBus override this to
allocate the larger ivars to hold additional info beyond the stock PCI ivars.

This removes the need to pass the size to functions like pci_add_iov_child()
and pci_read_device() simplifying IOV and bus rescanning implementations.

As a result of this and earlier changes, the ACPI PCI bus driver no longer
needs its own device_attach and pci_create_iov_child methods but can use
the methods in the stock PCI bus driver instead.

Differential Revision:	https://reviews.freebsd.org/D5891
2016-04-15 03:42:12 +00:00
John Baldwin
496dfa89a6 Convert pci_delete_child() to a bus_child_deleted() method.
Instead of providing a wrapper around device_delete_child() that the PCI
bus and child bus drivers must call explicitly, move the bulk of the logic
from pci_delete_child() into a bus_child_deleted() method
(pci_child_deleted()).  This allows PCI devices to be safely deleted via
device_delete_child().
- Add a bus_child_deleted method to the ACPI PCI bus which clears the
  device_t associated with the corresponding ACPI handle in addition to
  the normal PCI bus cleanup.
- Change cardbus_detach_card to call device_delete_children() and move
  CardBus-specific delete logic into a new cardbus_child_deleted() method.
- Use device_delete_child() instead of pci_delete_child() in the SRIOV code.
- Add a bus_child_deleted method to the OpenFirmware PCI bus drivers which
  frees the OpenFirmware device info for each PCI device.

Reviewed by:	imp
Tested on:	amd64 (CardBus and PCI-e hotplug)
Differential Revision:	https://reviews.freebsd.org/D5831
2016-04-06 04:10:22 +00:00
Justin Hibbits
da1b038af9 Use uintmax_t (typedef'd to rman_res_t type) for rman ranges.
On some architectures, u_long isn't large enough for resource definitions.
Particularly, powerpc and arm allow 36-bit (or larger) physical addresses, but
type `long' is only 32-bit.  This extends rman's resources to uintmax_t.  With
this change, any resource can feasibly be placed anywhere in physical memory
(within the constraints of the driver).

Why uintmax_t and not something machine dependent, or uint64_t?  Though it's
possible for uintmax_t to grow, it's highly unlikely it will become 128-bit on
32-bit architectures.  64-bit architectures should have plenty of RAM to absorb
the increase on resource sizes if and when this occurs, and the number of
resources on memory-constrained systems should be sufficiently small as to not
pose a drastic overhead.  That being said, uintmax_t was chosen for source
clarity.  If it's specified as uint64_t, all printf()-like calls would either
need casts to uintmax_t, or be littered with PRI*64 macros.  Casts to uintmax_t
aren't horrible, but it would also bake into the API for
resource_list_print_type() either a hidden assumption that entries get cast to
uintmax_t for printing, or these calls would need the PRI*64 macros.  Since
source code is meant to be read more often than written, I chose the clearest
path of simply using uintmax_t.

Tested on a PowerPC p5020-based board, which places all device resources in
0xfxxxxxxxx, and has 8GB RAM.
Regression tested on qemu-system-i386
Regression tested on qemu-system-mips (malta profile)

Tested PAE and devinfo on virtualbox (live CD)

Special thanks to bz for his testing on ARM.

Reviewed By: bz, jhb (previous)
Relnotes:	Yes
Sponsored by:	Alex Perez/Inertial Computing
Differential Revision: https://reviews.freebsd.org/D4544
2016-03-18 01:28:41 +00:00
Justin Hibbits
534ccd7bbf Replace all resource occurrences of '0UL/~0UL' with '0/~0'.
Summary:
The idea behind this is '~0ul' is well-defined, and casting to uintmax_t, on a
32-bit platform, will leave the upper 32 bits as 0.  The maximum range of a
resource is 0xFFF.... (all bits of the full type set).  By dropping the 'ul'
suffix, C type promotion rules apply, and the sign extension of ~0 on 32 bit
platforms gets it to a type-independent 'unsigned max'.

Reviewed By: cem
Sponsored by:	Alex Perez/Inertial Computing
Differential Revision: https://reviews.freebsd.org/D5255
2016-03-03 05:07:35 +00:00
Wojciech Macek
4d185754cf Support for Enhanced Allocation in PCI
On some platforms, BAR entries are hardcoded and must not be accessed
    using standard method. Add functionality to identify this situation
    and configure the bus based on Enhanced Allocation structure.

Obtained from:         Semihalf
Sponsored by:          Cavium
Approved by:           cognet (mentor)
Reviewed by:           jhb
Differential revision: https://reviews.freebsd.org/D5242
2016-03-02 09:54:58 +00:00
Justin Hibbits
2dd1bdf183 Convert rman to use rman_res_t instead of u_long
Summary:
Migrate to using the semi-opaque type rman_res_t to specify rman resources.  For
now, this is still compatible with u_long.

This is step one in migrating rman to use uintmax_t for resources instead of
u_long.

Going forward, this could feasibly be used to specify architecture-specific
definitions of resource ranges, rather than baking a specific integer type into
the API.

This change has been broken out to facilitate MFC'ing drivers back to 10 without
breaking ABI.

Reviewed By: jhb
Sponsored by:	Alex Perez/Inertial Computing
Differential Revision: https://reviews.freebsd.org/D5075
2016-01-27 02:23:54 +00:00
John Baldwin
ce204e1bd8 Add accessor methods to fetch the BAR holding the MSI-X table and PBA.
While here, explicitly note the requirement that the BAR(s) must be
allocated prior to calling pci_alloc_msix().

Reviewed by:	andrew, emaste
MFC after:	1 week
Differential Revision:	https://reviews.freebsd.org/D4688
2015-12-23 21:51:10 +00:00
John Baldwin
87dd2f95d2 Add a new helper function for PCI devices to locate the upstream
PCI-express root port of a given PCI device.

Reviewed by:	kib, imp
MFC after:	1 week
Sponsored by:	Chelsio
Differential Revision:	https://reviews.freebsd.org/D4089
2015-11-05 21:27:25 +00:00
John Baldwin
ec603c7297 Add helper routines for PCI device drivers to read, write, and modify
PCI-Express capability registers (that is, PCI config registers in the
standard PCI config space belonging to the PCI-Express capability
register set).

Note that all of the current PCI-e registers are either 16 or 32-bits,
so only widths of 2 or 4 bytes are supported.

Reviewed by:	imp
MFC after:	1 week
Sponsored by:	Chelsio
Differential Revision:	https://reviews.freebsd.org/D4088
2015-11-05 21:26:06 +00:00
John-Mark Gurney
bee4a63bb7 drop a bunch of white space at end of lines and end of files...
-x -wb apparently doesn't hide end of file white space changes..

This is to reduce the amount of diff for my PCIe HP changes..
2015-10-18 08:13:51 +00:00
Konstantin Belousov
69baeadc31 Remove several write-only variables, all reported by the gcc 4.9
buildkernel run.

Some of them were write-only under some kernel options, e.g. variables
keeping values only used by CTR() macros.  It costs nothing to the
code readability and correctness to eliminate the warnings in those
cases too by removing the local cached values used only for
single-access.

Review:	https://reviews.freebsd.org/D2665
Reviewed by:	rodrigc
Looked at by:	bjk
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
2015-05-29 13:24:17 +00:00
John Baldwin
ad6f36f845 Update the pci_cfg_save/restore routines to operate on bridge devices
(type 1 and type 2) as well as leaf devices (type 0).  In particular,
this allows the existing PCI bus logic to save and restore capability
registers such as MSI and PCI-express work for bridge devices rather than
requiring that code to be duplicated in bridge drivers.  It also means
that bridge drivers no longer need to save and restore basic registers
such as the PCI command register or BARs nor manage powerstates for the
bridge device.

While here, pci_setup_secbus() has been changed to initialize the 'sec'
and 'sub' fields in the 'secbus' structure instead of requiring the pcib
and pccbb drivers to do this in the NEW_PCIB + PCI_RES_BUS case.

Differential Revision:	https://reviews.freebsd.org/D2240
Reviewed by:	imp, jmg
MFC after:	2 weeks
2015-04-22 22:02:27 +00:00
John Baldwin
65c7c1b424 The minimim grant and maximum latency PCI config registers are only valid
for type 0 devices, not type 1 or 2 bridges.  Don't read them for bridge
devices during bus scans and return an error when attempting to read them
as ivars for bridge devices.
2015-04-22 21:41:59 +00:00
Warner Losh
be2c6c0dbd Don't leak 'used' in a few error cases.
Reported by: Maxime Villard
2015-03-01 21:41:35 +00:00
Ryan Stone
e9309eac19 Allocate PCI I/O memory spaces for VFs
When creating VFs, we must size each SR-IOV BAR on the PF and
allocate a configuous I/O memory window large enough for every VF.
However, the window only needs to be aligned to a boundary equal
to the size of the window for a single VF.

When a VF attempts to allocate an I/O memory resource, we must
intercept the request in the pci driver and pass it off to the
SR-IOV code, which will allocate the correct window from the
pre-allocated memory space for the PF.

Inform the pci driver about the size and address of the BARs on
the VF when the VF is created.  This is required by pciconf -b and
bhyve.

Differential Revision:	https://reviews.freebsd.org/D78
Reviewed by:		jhb
MFC after: 		1 month
Sponsored by:		Sandvine Inc.
2015-03-01 00:40:26 +00:00
Ryan Stone
5060ec97d4 Emulate the Device ID and Vendor ID registers for VFs
The SR-IOV standard requires VFs to read all-ones when the VID
and DID registers are read.  The VMM (hypervisor) is required to
emulate them instead.  Make pci_read_config() do this emulation.

Change pci_user.c to use pci_read_config() to read config space
registers instead of going directly to the pcib so that the
emulated VID/DID registers work correctly on VFs.  This is
required both for pciconf and bhyve PCI passthrough.

Differential Revision:	https://reviews.freebsd.org/D77
Reviewed by:		jhb
MFC after: 		1 month
Sponsored by:		Sandvine Inc.
2015-03-01 00:40:19 +00:00
Ryan Stone
9bfb1e36d9 Implement interface to create SR-IOV Virtual Functions
Implement the interace to create SR-IOV Virtual Functions (VFs).
When a driver registers that they support SR-IOV by calling
pci_setup_iov(), the SR-IOV code creates a new node in /dev/iov
for that device.  An ioctl can be invoked on that device to
create VFs and have the driver initialize them.

At this point, allocating memory I/O windows (BARs) is not
supported.

Differential Revision:	https://reviews.freebsd.org/D76
Reviewed by:		jhb
MFC after: 		1 month
Sponsored by:		Sandvine Inc.
2015-03-01 00:40:09 +00:00
Ryan Stone
5ce88dc6da Refactor PCI resource allocation
Refactor PCI resource allocation code to allow a request for a
memory-mapped I/O window that is a multiple of a requested size.
This is needed by the SR-IOV code because the VF BARs are all
allocated contiguously.  We can't just allocate a resource that is
a multiple of a single VF BAR because the size of an allocation
implies its alignment requirement.

Differential Revision:	https://reviews.freebsd.org/D71
Reviewed by:		jhb
MFC after: 		1 month
Sponsored by:		Sandvine Inc.
2015-03-01 00:39:33 +00:00
Ryan Stone
2f5055a9b0 Refactor PCI device creation
Refactor creation of PCI devices into helper methods that can be
used by the VF creation code.

Differential Revision:	https://reviews.freebsd.org/D67
Reviewed by:		jhb
MFC after: 		1 month
Sponsored by:		Sandvine Inc.
2015-03-01 00:39:26 +00:00
John-Mark Gurney
69d4c287d3 remove NULL check as M_WAITOK will not return NULL
Reviewed by:	jhb
Sponsored by:	FreeBSD Foundation
2015-02-16 18:43:52 +00:00
John Baldwin
64de80195b Add a new device control utility for new-bus devices called devctl. This
allows the user to request administrative changes to individual devices
such as attach or detaching drivers or disabling and re-enabling devices.
- Add a new /dev/devctl2 character device which uses ioctls for device
  requests.  The ioctls use a common 'struct devreq' which is somewhat
  similar to 'struct ifreq'.
- The ioctls identify the device to operate on via a string.  This
  string can either by the device's name, or it can be a bus-specific
  address.  (For unattached devices, a bus address is the only way to
  locate a device.)  Bus drivers register an eventhandler to claim
  unrecognized device names that the driver recognizes as a valid address.
  Two buses currently support addresses: ACPI recognizes any device
  in the ACPI namespace via its full path starting with "\" and
  the PCI bus driver recognizes an address specification of
  'pci[<domain>:]<bus>:<slot>:<func>' (identical to the PCI selector
  strings supported by pciconf).
- To make it easier to cut and paste, change the PnP location string
  in the PCI bus driver to output a full PCI selector string rather
  than 'slot=<slot> function=<func>'.
- Add a devctl(3) interface in libdevctl which provides a wrapper around
  the ioctls and is the preferred interface for other userland code.
- Add a devctl(8) program which is a simple wrapper around the requests
  supported by devctl(3).
- Add a device_is_suspended() function to check DF_SUSPENDED.
- Add a resource_unset_value() function that can be used to remove a
  hint from the kernel environment.  This is used to clear a
  hint.<driver>.<unit>.disabled hint when re-enabling a boot-time
  disabled device.

Reviewed by:	imp (parts)
Requested by:	imp (changing PCI location string)
Relnotes:	yes
2015-02-06 16:09:01 +00:00
Marius Strobl
40438c4761 - Make PCI_QUIRK_MSI_INTX_BUG work by using the ID of the actual PCI device
for the lookup.
- For devices affected by PCI_QUIRK_MSI_INTX_BUG, ensure PCIM_CMD_INTxDIS
  is cleared when using MSI/MSI-X.
- Employ PCI_QUIRK_MSI_INTX_BUG for BCM5714(S)/BCM5715(S)/BCM5780(S) rather
  than clearing PCIM_CMD_INTxDIS unconditionally for all devices in bge(4).

MFC after:	3 days
2014-12-27 14:26:18 +00:00
Dmitry Chagin
34b3339810 Revert r274635 as it's completely wrong.
The parent of a pci dev device is a pciX device which do not
implement the PCIB_POWER_FOR_SLEEP method from pcib_if.m.
2014-11-19 11:05:45 +00:00
Dmitry Chagin
91bd62caf5 Use the correct device as the power_for_sleep() method
always pass request up to parent bridge.

Reviewed by:	jhb
MFC after:	1 week
xMFC:		r274386,r274397
2014-11-17 20:25:21 +00:00
Adrian Chadd
2da2ade021 Use the correct device (child) when asking the bus layer about which power
state said device should go into.

This was a snafu introduced in the ACPI/PCI awareness separation.

When putting a device into a power state, the bus (and thus firmware,
eg ACPI) should be asked before hand to check whether the device
can indeed go into that power state.

There's a set of nodes in ACPI under each device - the _SxD nodes - which
state which ACPI power state to put the device into when the system is
going into power save state 'x'.  So when going into S3, the existence
of an _S3D node would override whatever the system was trying to do.

By default the PCI code wants to put devices into D3 before suspending.

I have a laptop here (Asus Zenbook - check the PR) whose EHCI controller
really wants to be in D2 during suspend, not D3.  So if we put it into
D3 and then try to enter S3, everything hangs.  The device itself
can go into D3 - it just can't be there when the call to ACPI to enter
S3 occurs.  The PCI patch fixes this.

jkim@ noticed that the same is needed for the ACPI child device
enumeration.

Thankyou to Matt Dillon (the programmer, not the actor) for buying me
this particular laptop so I could debug the issues with the Atheros
AR9485 that is in it.  It's his fault that I ended up with this
laptop and was sufficiently annoyed by the lack of USB suspend
to go down this rabbit hole.

Tested:

* Thinkpad T400
* Thinkpad X230
* Thinkpad T42
* Thinkpad T60
* Asus Zenbook (see PR)
* Asus EEEPC 701
* Asus EEEPC 1001PX

TODO:

* Figure out what we should do about devices we unload drivers for
  that want to be in a specific state when entering S3 / S4 -
  the "put devices into D3 if they're not bound to a driver" option
  may also mess with things.

PR:		kern/194884
Reviewed by:	jhb, jkim
MFC after:	1 week
Relnotes:	yes
Sponsored by:	Matt Dillon <dillon@apollo.backplane.com> (hardware)
2014-11-11 17:14:11 +00:00
Davide Italiano
2be111bf7d Follow up to r225617. In order to maximize the re-usability of kernel code
in userland rename in-kernel getenv()/setenv() to kern_setenv()/kern_getenv().
This fixes a namespace collision with libc symbols.

Submitted by:   kmacy
Tested by:      make universe
2014-10-16 18:04:43 +00:00
Adrian Chadd
ffcf962dab Add a bus method to fetch the VM domain for the given device/bus.
* Add a bus_if.m method - get_domain() - returning the VM domain or
  ENOENT if the device isn't in a VM domain;
* Add bus methods to print out the domain of the device if appropriate;
* Add code in srat.c to save the PXM -> VM domain mapping that's done and
  expose a function to translate VM domain -> PXM;
* Add ACPI and ACPI PCI methods to check if the bus has a _PXM attribute
  and if so map it to the VM domain;
* (.. yes, this works recursively.)
* Have the pci bus glue print out the device VM domain if present.

Note: this is just the plumbing to start enumerating information -
it doesn't at all modify behaviour.

Differential Revision:	D906
Reviewed by:	jhb
Sponsored by:	Norse Corp
2014-10-09 05:33:25 +00:00