Commit Graph

7 Commits

Author SHA1 Message Date
Adrian Chadd
07e5ae88f0 Update the AR933x SoC support to include a few new knobs:
* Initialise the MDIO clock to default to the reference clock;
* Add some code to allow the hints mechanism to allow setup of the GMAC
  config block.
* Document how the switch is wired up internally.

Tested:

* AR9331 SoC (Carambola 2)
2013-10-15 03:23:08 +00:00
Adrian Chadd
ad5b574375 Fix the AR933x CPU UART support by using the correct clock when calculating
the UART frequency.

Tested:

* AR933x (carambola 2 board), UART now works again

Approved by:	re
2013-09-21 19:42:37 +00:00
Adrian Chadd
6dbf63db67 Initialise the watchdog and UART frequencies.
For all pre-AR933x chips, the frequency is just the APB frequency.
For the AR933x, the UART frequency is different but we just hacked around
it.

For the AR934x, there's a different PLL setting for these, so they have
to be broken out.
2013-07-21 03:52:52 +00:00
Adrian Chadd
57735bb975 Implement USB device reset and poweron.
Tested:

* Atheros AP131, AR9331 SoC
2013-04-05 02:02:37 +00:00
Adrian Chadd
a4c9f7fdbd Implement the AR933x ethernet support.
Obtained from:	OpenWRT
2013-04-05 01:35:59 +00:00
Adrian Chadd
09ac4e68f3 Fix the AR933x platform device start/stop code.
This was ported from the AR724x code and I think that also doesn't
quite work.  I'll investigate that soon.

With this in place the system reset path works, so 'reset' from kdb
actually resets the SoC.

Tested:

* AP121 test board
2013-03-28 05:43:03 +00:00
Adrian Chadd
601a83560e Commit initial (unfinished!) support for the AR933x series of embedded
CPUs.

The AR933x is a mips24k based SoC with an AR9380 series SoC on board,
two gigabit ethernet interfaces and an internal 10/100mbit ethernet
switch.  There's also the normal interfaces (USB, ethernet, uart, GPIO.)

The downside? There's a non-ns8250 UART device.

With a very basic UART driver (not in this commit) the SoC is initialised
and boots up.  I'll commit the UART code soon and then link it into the
general setup path.

This code is a re-implementation based from the Linux kernel / openwrt
AR933x support.

TODO:

* UART (obviously)
* All of the ethernet, USB and wifi SoC glue, including ethernet PLL
  programming.
2013-03-27 03:38:58 +00:00