timer. Previously, the various divisors were fixed which meant that while
it gave somewhat reasonable stathz, etc. at hz=1000, it went off the rails
with any other hz value. With these changes, we now pick a lapic timer hz
based on the value of hz. If hz is >= 1500, then the lapic timer runs at
hz. If 1500 hz >= 750, we run the lapic timer at hz * 2. If hz < 750, we
run at hz * 4. We compute a divider at runtime to make stathz run as close
to 128 as we can since stathz really wants to be run at something close to
that frequency. Profiling just runs on every clock tick. So some examples:
With hz = 100, the lapic timer now runs at 400 instead of 2000. stathz
will be 133, and profhz = 400. With hz = 1000 (default), the lapic timer
is still at 2000 (as it is now), stathz is at 133 (as it is now), and
profhz will be 2000 (previously 666).
MFC after: 2 weeks
only in low memory situations, so the error fork of these fixes is
lightly tested, but they should do the least-wrong thing...
Submitted by: Hans Petter Selasky
set the MNT_FORCE flag, but do not persist "force"
in the options list, since it is a command, not a persistent property
of a mount.
Similarly, when we see "reload", set MNT_RELOAD,
but delete "reload" from the options list.
MFC after: 1 week
- According to POSIX, tcsetattr() must not fail when any of the bits in
the structure are unsupported, but it must leave the unsupported flags
alone.
- The CIGNORE flag (set by TCSASOFT, extension) was not cleared from
c_cflag, which means using it would cause it to be applied during its
entire lifespan. Eventually make sure we clear the flag.
I don't really like CIGNORE, but I think we must keep it alive right
now. With our new TTY layer, we don't actually need this mechanism,
because if you leave c_cflag, c_ispeed and c_ospeed alone, we won't make
a call into the device driver anyway.
Reported by: naddy
Tested by: naddy
thread_unsuspend_one() needs to optionally wakeup the swapper. Since we
hold the thread lock for that entire function, however, we have to push
that requirement up into the caller.
Found by: rwatson
Unlike pre-MPSAFE TTY, the pts(4) driver always returned ENXIO when a
read() or write() was performed on a pseudo-terminal master device when
the slave device was not opened. The old implementation had different
semantics:
- When the slave device had not been opened yet, read() and write() just
blocked.
- When the slave device had been closed, a read() call would return 0
bytes length.
- When the slave device had been closed, a write() call would return
EIO.
Change the new implementation to return 0 and EIO as well. We don't
implement the first rule, but I suspect this is not needed, because
routines like openpty() also open the slave device node. posix_openpt()
users also do similar things.
Reported by: rink
Tested by: rink
counters for Rx/Tx statistics. Various counters in ifnet is also
updated with these hardware counters.
Tested by: kib, Gleb Kurtsou gleb.kurtsou at gmail dot com
Ulrich Spoerlein uspoerlein at gmail dot com
It turned out we transmitted VSTART after each successful read on a TTY
when software flow control was turned on. This was because of a very
evil bug where we tested the TF_HIWAT_IN flag the other way around.
Reported by: Christian Weisgerber <naddy mips inka de>
interrupt mask register again. This saves one register access per
each interrupt.
Also don't try to process frames when driver is not running.
Tested by: kib, Gleb Kurtsou gleb.kurtsou at gmail dot com
Ulrich Spoerlein uspoerlein at gmail dot com
- Rename pciereg_cfgopen() to pcie_cfgregopen() and expose it to the
rest of the kernel. It now also accepts parameters via function
arguments rather than global variables.
- Add a notion of minimum and maximum bus numbers and reject requests for
an out of range bus.
- Add more range checks on slot/func/reg/bytes parameters to the cfg reg
read/write routines. Don't panic on any invalid parameters, just fail
the request (writes do nothing, reads return -1). This matches the
behavior of the other cfg mechanisms.
- Port the memory mapped configuration space access to amd64. On amd64
we simply use the direct map (via pmap_mapdev()) for the memory mapped
window.
- During acpi_attach() just after loading the ACPI tables, check for a
MCFG table. If it exists, call pciereg_cfgopen() on each subtable
(memory mapped window). For now we only support windows for domain 0
that start with bus 0. This removes the need for more chipset-specific
quirks in the MD code.
- Remove the chipset-specific quirks for the Intel 5000P/V/Z chipsets
since these machines should all have MCFG tables via ACPI.
- Updated pci_cfgregopen() to DTRT if ACPI had invoked pcie_cfgregopen()
earlier.
MFC after: 2 weeks
link state and detach request.
While I'm here make sure established link is IFM_10_T or
IFM_100_TX as bfe(4) just supports 10/100Mbps media.
Tested by: kib, Gleb Kurtsou gleb.kurtsou at gmail dot com
Ulrich Spoerlein uspoerlein at gmail dot com
the IP multicast input code from the output path; we don't allow
reentrance of the input path from the IP output path, it must use the
netisr due to potential lock recursion.
MFC after: 3 days
During the import of the MPSAFE TTY layer (r181905), I changed
acct_process() to lock proctree_lock instead of SESS_LOCK, because
s_ttyp is now locked using proctree_lock. One of the things I forgot,
was to lock it before we PROC_LOCK.
Commit this patch, written by kib@. To ensure we hold proctree_lock as
short as possible, obtaining `ac_tty' has now been made the first step
of filling `acct'.
Reported by: Kevin <kevinxlinuz 163 com>
Solved by: kib
o Removed unneeded header files.
o bus_dma(9) fix:
- created parent tag with 1GB dma address limit with no
alignment restrictions.
- set 4096 alignment limit for Tx/Rx descriptor rings.
- separate Rx buffer tag from Tx buffer tag such that Tx tag
allows up-to 16 segments while Rx buffer tag only allows
single segment.
- it seems the controller has no alignment restrictions on Tx/Rx
buffers. Remove ETHER_ALIGN alignment restriction in Tx/Rx
buffers.
- created a spare Rx dma map which would be used to cope with
failure of loading a dma map.
- make sure to load full Tx/Rx descriptor size for Tx/Rx
descriptor dma maps, previously bfe(4) used to load single
descriptor size for each descriptor rings. I have no idea how
it could be run without problems.
- don't blindly cast bus_addr_t type to 32bits in bfe_dma_map().
- created bfe_dma_free() to free allocated dma memory/tags.
- make sure to invoke bus_dmamap_sync(9) before/after processing
descriptor rings/buffers. Because the hardware has severe dma
address space limitation, bounce-buffers would be always used
on systems with more than 1GB memory during
descriptors/buffers access.
- added Tx descriptor ring initialization function,
bfe_list_tx_init().
- moved producer/consumer index initialization to
bfe_list_tx_init() and bfe_list_rx_init() from
bfe_chip_reset().
- added bfe_discard_buf() which will update loaded descriptors
without unloading/reloading the dma map to speed up error
recovery.
- implemented Tx side bus_dmamap_load_mbuf_sg(9). The number of
segments allowed was chosen to be 16 which should be enough for
non-TSO capable hardwares. Setting SOF bit of Tx descriptor is
done in the last to avoid potential race.
- don't give up sending frames in bfe_start() until the hardware
lacks free descriptors.
- added XXX comment to second kick command and possible workaround.
- implemented Rx side bus_dmamap_load_mbuf_sg(9).
- removed bfe_dma_map_desc() as it's not needed anymore after
the conversion to bus_dmamap_load_mbuf_sg(9).
- added endianness support. With this change bfe(4) should work
on any architectures that can create bounce buffers within 1GB
address range.
- add missing bus_dmamap_sync() in bfe_tx_eof()/bfe_rx_eof().
o Use PCI_BAR instead of hardcoded value to set BARs.
Simplified register access with bus_write_4(9)/bus_read_4(9) and
removed bfe_btag, bfe_bhandle, bfe_vhandle in softc as it's not
used anymore.
o Reorder device detach logic such that bfe_detach() is also used
for handling driver attach failure case.
o Remove unnecessary KASSERT in bfe_detach().
o Remove bfe_rx_cnt, bfe_up, bfe_vpd_prodname, bfe_vpd_readonly in
softc. It's not used at all.
o Remove BFE_RX_RING_SIZE/BFE_RX_RING_SIZE/BFE_LINK_DOWN.
Tested by: kib, Gleb Kurtsou gleb.kurtsou at gmail dot com
Ulrich Spoerlein uspoerlein at gmail dot com
memory area's base and limit are optional. The low 4-bits of the "low"
prefetchable registers indicates whether or not a 32-bit or 64-bit
region is supported. The PCI-PCI driver had been assuming that all bridges
supported a 64-bit region (and thus the two upper 32-bit registers). Fix
the driver to only use those registers if the low 4-bits of the "low"
registers indicate that a 64-bit region is supported. The PCI-PCI bridge
in the XBox happens to be a bridge that only supports a 32-bit region.
Reported by: rink
MFC after: 1 week
and 5000P/V/Z chipsets.
- If the base address of the config space BAR is above 4GB for some reason
and this isn't a PAE kernel, then warn about this (under bootverbose)
and don't use the BAR.
PR: kern/126525
Submitted by: Arthur Hartwig @ Nokia
MFC after: 2 weeks
We used to have a single wait channel inside the kernel which could be
used by threads that just wanted to sleep for some time (the next
second). The old TTY layer was the only piece of code that still used
lbolt, because I already removed the use of lbolt from the NFS clients
and the VFS syncer.
Approved by: philip
