Commit Graph

7 Commits

Author SHA1 Message Date
Brandon Bergren
8415f755f1 [PowerPC] Fix booke64 qemu infinite loop in L2 cache enable
Since qemu does not implement the L2 cache, we get stuck forever waiting
for a bit to be set when trying to invalidate it.

To prevent that, we should bail out if the L2 cache is missing.
One easy way to check this is L2CFG0 == 0 (since L2CSIZE always has at
least one bit set in a valid implementation)

(tested on qemu, rb800, and x5000)

Reviewed by:	jhibbits
Sponsored by:	Tag1 Consulting, Inc.
Differential Revision:	https://reviews.freebsd.org/D25225
2020-06-19 18:40:39 +00:00
Justin Hibbits
81962477fc powerpc: Add a CPU-custom machine check handler
Summary:
Some machine checks are process-recoverable, others are not.  Let a
CPU-specific handler decide what to do.

This works around a machine check error hit while building www/firefox
and mail/thunderbird, which would otherwise cause the build to fail.

More work is needed to handle all possible machine check conditions, but
this is sufficient to unblock some ports building.

Differential Revision: https://reviews.freebsd.org/D23731
2020-05-10 19:00:57 +00:00
Justin Hibbits
889d304bb4 powerpc: Axe PPC4xx support.
Summary:
The support was added almost a decade ago, and never completed.  Just axe
it.  It was also inadvertently broken 5 years ago, and nobody noticed.

Reviewed by:	bdragon
Differential Revision:	https://reviews.freebsd.org/D23753
2020-03-18 01:09:43 +00:00
Pedro F. Giffuni
71e3c3083b sys/powerpc: further adoption of SPDX licensing ID tags.
Mainly focus on files that use BSD 2-Clause license, however the tool I
was using misidentified many licenses so this was mostly a manual - error
prone - task.

The Software Package Data Exchange (SPDX) group provides a specification
to make it easier for automated tools to detect and summarize well known
opensource licenses. We are gradually adopting the specification, noting
that the tags are considered only advisory and do not, in any way,
superceed or replace the license texts.
2017-11-27 15:09:59 +00:00
Justin Hibbits
3f068cbf5c Add platform support for QorIQ SoCs.
This includes the following changes:
* SMP kickoff for QorIQ (tested on P5020)
* Errata fixes for some silicon revisions
* Enables L2 (and L3 if available) caches
Obtained from:	Semihalf
Sponsored by:	Alex Perez/Inertial Computing
2015-12-30 03:43:25 +00:00
Nathan Whitehorn
33724f17d2 Interrelated improvements to early boot mappings:
- Remove explicit requirement that the SOC registers be found except as an
  optimization (although the MPC85XX LAW drivers still require they be found
  externally, which should change).
- Remove magic CCSRBAR_VA value.
- Allow bus_machdep.c's early-boot code to handle non 1:1 mappings and
  systems not in real-mode or global 1:1 maps in early boot.
- Allow pmap_mapdev() on Book-E to reissue previous addresses if the
  area is already mapped. Additionally have it check all mappings, not
  just the CCSR area.

This allows the console on e500 systems to actually work on systems where
the boot loader was not kind enough to set up a 1:1 mapping before starting
the kernel.
2013-10-26 18:18:14 +00:00
Rafal Jaworowski
aa6bc7dc29 Extract vendor specific Book-E pieces into separate files and have a common
skeleton (maybe we should kobj-tize this one day).

Note the PPC4xx bit is not connected to the build yet.

Obtained from:	AppliedMicro, Semihalf.
2012-05-30 17:34:40 +00:00