Commit Graph

39 Commits

Author SHA1 Message Date
John Baldwin
8088699f79 - Overhaul the software interrupt code to use interrupt threads for each
type of software interrupt.  Roughly, what used to be a bit in spending
  now maps to a swi thread.  Each thread can have multiple handlers, just
  like a hardware interrupt thread.
- Instead of using a bitmask of pending interrupts, we schedule the specific
  software interrupt thread to run, so spending, NSWI, and the shandlers
  array are no longer needed.  We can now have an arbitrary number of
  software interrupt threads.  When you register a software interrupt
  thread via sinthand_add(), you get back a struct intrhand that you pass
  to sched_swi() when you wish to schedule your swi thread to run.
- Convert the name of 'struct intrec' to 'struct intrhand' as it is a bit
  more intuitive.  Also, prefix all the members of struct intrhand with
  'ih_'.
- Make swi_net() a MI function since there is now no point in it being
  MD.

Submitted by:	cp
2000-10-25 05:19:40 +00:00
John Baldwin
1931cf940a - Heavyweight interrupt threads on the alpha for device I/O interrupts.
- Make softinterrupts (SWI's) almost completely MI, and divorce them
  completely from the x86 hardware interrupt code.
  - The ihandlers array is now gone.  Instead, there is a MI shandlers array
    that just contains SWI handlers.
  - Most of the former machine/ipl.h files have moved to a new sys/ipl.h.
- Stub out all the spl*() functions on all architectures.

Submitted by:	dfr
2000-10-05 23:09:57 +00:00
Bruce Evans
21144e2fde Brought back schedsofttty() (SMPng casualty). Didn't bring back the
other schedsoft*() functions since they have never been used.

Removed confused comment about not needing these functions.  The
functions delay scheduling of SWIs until the next hardclock tick.
For devices that only deliver a few characters per interrupt, this
reduces the number of calls to the scheduler by a large factor (about
115 for each sio port at 115200 bps).
2000-09-17 16:37:30 +00:00
Jason Evans
0384fff8c5 Major update to the way synchronization is done in the kernel. Highlights
include:

* Mutual exclusion is used instead of spl*().  See mutex(9).  (Note: The
  alpha port is still in transition and currently uses both.)

* Per-CPU idle processes.

* Interrupts are run in their own separate kernel threads and can be
  preempted (i386 only).

Partially contributed by:	BSDi (BSD/OS)
Submissions by (at least):	cp, dfr, dillon, grog, jake, jhb, sheldonh
2000-09-07 01:33:02 +00:00
Doug Rabson
ca2e05343b Add taskqueue system for easy-to-use SWIs among other things.
Reviewed by: arch
2000-05-28 15:45:30 +00:00
Matthew Dillon
36e9f877df Commit major SMP cleanups and move the BGL (big giant lock) in the
syscall path inward.  A system call may select whether it needs the MP
    lock or not (the default being that it does need it).

    A great deal of conditional SMP code for various deadended experiments
    has been removed.  'cil' and 'cml' have been removed entirely, and the
    locking around the cpl has been removed.  The conditional
    separately-locked fast-interrupt code has been removed, meaning that
    interrupts must hold the CPL now (but they pretty much had to anyway).
    Another reason for doing this is that the original separate-lock for
    interrupts just doesn't apply to the interrupt thread mechanism being
    contemplated.

    Modifications to the cpl may now ONLY occur while holding the MP
    lock.  For example, if an otherwise MP safe syscall needs to mess with
    the cpl, it must hold the MP lock for the duration and must (as usual)
    save/restore the cpl in a nested fashion.

    This is precursor work for the real meat coming later: avoiding having
    to hold the MP lock for common syscalls and I/O's and interrupt threads.
    It is expected that the spl mechanisms and new interrupt threading
    mechanisms will be able to run in tandem, allowing a slow piecemeal
    transition to occur.

    This patch should result in a moderate performance improvement due to
    the considerable amount of code that has been removed from the critical
    path, especially the simplification of the spl*() calls.  The real
    performance gains will come later.

Approved by: jkh
Reviewed by: current, bde (exception.s)
Some work taken from: luoqi's patch
2000-03-28 07:16:37 +00:00
Paul Saab
891c64630d Make SPLASSERT sysctl and boot time tunable with kern.splassertmode.
The following values are understood:  0 (ignore), 1 (log), and 2
(panic).

The default value is 1.

Reviewed by:	peter
2000-03-19 14:55:42 +00:00
Bruce Evans
90bb57afd9 Don't include <machine/ipl.h> in <sys/systm.h> in the i386 case. This
fixes some namespace pollution in general and breakage of modules that
aren't in the sys tree in particular (<machine/ipl.h> includes further
headers that aren't installed under /usr/include).

Reimplemented SPLASSERT() so that it is more machine independent and
less bloated and doesn't require the <machine/ipl.h> include spam.
In particular, don't assume that `cpl' can be printed using %08x
format.  The alpha arch doesn't even have `cpl'.  SPLASSERT() was
harmless on alphas because it isn't actually used.
2000-02-17 18:37:45 +00:00
Peter Wemm
e463cfe7b6 Fix is_splxxx() warnings when not compiled with INVARIANT_SUPPORT.
Approved by:	jkh
2000-02-14 06:11:53 +00:00
Jonathan M. Bresler
f6a3d83f00 Add SPLASSERT() macro. SPLASSERT() compiles to a no-op
unless both "option INVARIANTS" and "options INVARIANT_SUPPORT"
        are defined in the kernel's config(8) file.

        SPLASSERT(expression, msg) used KASSERT to check that the
        expression is true, panic()ing the kernel otherwise.

Approved by: jkh
Reviewed by: jdp, dfr, phk, eivind and green
2000-01-16 02:10:21 +00:00
Peter Wemm
c3aac50f28 $Id$ -> $FreeBSD$ 1999-08-28 01:08:13 +00:00
Alan Cox
03e3bc8e62 atomic.h:
Change "void *" to "volatile TYPE *", improving type safety
	and eliminating some warnings (e.g., mp_machdep.c rev 1.106).

cpufunc.h:
	Eliminate setbits.  As defined, it's not precisely correct;
	and it's redundant.  (Use atomic_set_int instead.)

ipl_funcs.c:
	Use atomic_set_int instead of setbits.

systm.h:
	Include atomic.h.

Reviewed by:	bde
1999-07-23 23:45:50 +00:00
Alan Cox
700a02558c An SMP-specific change: Eliminate an unnecessary lock acquire and release
in setdelayed.

Submitted by:	luoqi and bde
1999-07-20 06:09:53 +00:00
Alan Cox
1ce1a8bf67 An SMP-specific change: eliminate another check on bsp_apic_ready.
(See rev 1.23.)
1999-07-17 18:34:32 +00:00
Poul-Henning Kamp
2477292d68 remove a set_cpl which survived last change.
Noticed by:	mjacob
1999-07-12 07:22:08 +00:00
Poul-Henning Kamp
e9f6117acc We may have three ways to generate the SPL functions, but one table
for specifying their actions is plenty.
1999-07-11 19:24:41 +00:00
Alan Cox
a521cdcb0c An SMP-specific change: eliminate a check on bsp_apic_ready
that hasn't been necessary since i386/i386/simplelock.s
revision 1.9.

Submitted by:	dillon and tegge (simultaneously)
1999-07-10 21:57:52 +00:00
Bruce Evans
eec2e836e9 Go back to the old (icu.s rev.1.7 1993) way of keeping the AST-pending
bit separate from ipending, since this is simpler and/or necessary for
SMP and may even be better for UP.

Reviewed by:	alc, luoqi, tegge
1999-07-10 15:28:01 +00:00
Alan Cox
f155afbeb2 An SMP-specific change: Remove unnecessary lock acquires and releases
surrounding critical sections that consist of (1) a single read or
(2) a single locked RMW operation.

(Thanks to thomma@slip.net (Tamiji Homma) for helping to test
these changes.)
1999-06-30 03:39:29 +00:00
Peter Wemm
6ed87d5e8b Un-duplicate DO_SETBITS() (it was identical for both SMP and !SMP).. 1999-05-09 23:40:29 +00:00
Peter Wemm
0264a0ebd1 loadandclear() uses an atomic instruction (even on SMP, where it's an
implicitly LOCK'ed instruction), so there shouldn't be any harm in making
it volatile pointer compatable for one of the users of it.  It seems to
generate the same code regardless.
1999-05-09 23:30:01 +00:00
Peter Wemm
ea861c7968 Pull in prototype for splq(). 1999-05-06 22:13:53 +00:00
Luoqi Chen
5206bca10a Enable vmspace sharing on SMP. Major changes are,
- %fs register is added to trapframe and saved/restored upon kernel entry/exit.
- Per-cpu pages are no longer mapped at the same virtual address.
- Each cpu now has a separate gdt selector table. A new segment selector
  is added to point to per-cpu pages, per-cpu global variables are now
  accessed through this new selector (%fs). The selectors in gdt table are
  rearranged for cache line optimization.
- fask_vfork is now on as default for both UP and SMP.
- Some aio code cleanup.

Reviewed by:	Alan Cox	<alc@cs.rice.edu>
		John Dyson	<dyson@iquest.net>
		Julian Elischer	<julian@whistel.com>
		Bruce Evans	<bde@zeta.org.au>
		David Greenman	<dg@root.com>
1999-04-28 01:04:33 +00:00
Peter Wemm
54a8c69347 Stage 1 of a cleanup of the i386 interrupt registration mechanism.
Interrupts under the new scheme are managed by the i386 nexus with the
awareness of the resource manager.  There is further room for optimizing
the interfaces still.  All the users of register_intr()/intr_create()
should be gone, with the exception of pcic and i386/isa/clock.c.
1999-04-21 07:26:30 +00:00
Justin T. Gibbs
c07760c6a4 Block cam hardware interrupts at splvm(). Controller drivers may
perform malloc(NO_WAIT) and free operations that could touch the
page queues.

Noticed by:	Tor Egge <tegge@FreeBSd.org>
1999-03-05 23:39:02 +00:00
Archie Cobbs
f1d19042b0 The "easy" fixes for compiling the kernel -Wunused: remove unreferenced static
and local variables, goto labels, and functions declared but not defined.
1998-12-07 21:58:50 +00:00
Bruce Evans
f0791ddea7 Fixed disordering of *cam* and splsoftvm. 1998-02-01 22:04:58 +00:00
Justin T. Gibbs
99117bb6ec Addition of splsoftvm and a VM SWI to handle bus dma related callbacks.
This SWI may be useful for other, defered, VM tasks.
1998-01-15 07:34:01 +00:00
Steve Passe
c2d4a15648 Added a couple short-term debugs and a fix to the SPIN_MAX variable.
Debugs are an attempt to ferret out the PUSHDOWN_LEVEL_3 deadlock.
1997-09-28 19:34:48 +00:00
Steve Passe
39a3d94ba8 Added a missing comma for the INTR_SPL case. 1997-09-27 20:07:58 +00:00
Justin T. Gibbs
02a199102d aha1542.c aic6360.c cy.c fd.c ft.c
if_ie.c if_wl.c if_zp.c isa.c isa_device.h
labpc.c mcd.c ncr5380.c scd.c seagate.c si.c
sio.c tw.c ultra14f.c wcd.c wd.c:

	Update for changes in the callout interface.

apic_vector.s icu_vector.s ipl.s ipl_funcs.c:

	Add CAM software/hardware interrupt support.
1997-09-21 21:41:49 +00:00
Steve Passe
20233f27f4 General cleanup of the lock pushdown code. They are grouped and enabled
from machine/smptests.h:

#define PUSHDOWN_LEVEL_1
#define PUSHDOWN_LEVEL_2
#define PUSHDOWN_LEVEL_3
#define PUSHDOWN_LEVEL_4_NOT
1997-09-07 22:04:09 +00:00
Bruce Evans
0ec3217356 Removed unused #includes. 1997-09-01 02:08:42 +00:00
Steve Passe
34162fc615 Support for the new FAST_HI algorithm, enabled.
Preliminary support for the INTR_SIMPLELOCK algorithm, disabled.
Note that this code is NOT ready.
1997-08-29 18:45:23 +00:00
Steve Passe
8ee0110a44 A clean fix for the spl "deadlock before smp_active" problem.
Added a new variable, 'bsp_apic_ready', which is set as soon as the bootstrap
CPU has initialized its local APIC.  Conditionalize the GENSPLR functions
to call ss_lock ONLY after bsp_apic_ready is TRUE;  This should prevent
any problems with races between the time the 1st AP becomes ready and the
time smp_active is set.
1997-08-24 20:33:32 +00:00
Steve Passe
e49f6a7c8d Fix a deadlock caused by one of the spl functions being called before
ss_lock() can run.

Noticed by:	dave adkins <adkin003@gold.tc.umn.edu>
1997-08-24 17:26:37 +00:00
Steve Passe
886e789627 The last of the encapsolation of cpl/spl/ipending things into a critical
region protected by the simplelock 'cpl_lock'.

Notes:

 - this code is currently controlled on a section by section basis with
   defines in machine/param.h.  All sections are currently enabled.

 - this code is not as clean as I would like, but that can wait till later.

 - the "giant lock" still surrounds most instances of this "cpl region".
   I still have to do the code that arbitrates setting cpl between the
   top and bottom halves of the kernel.

 - the possibility of deadlock exists, I am committing the code at this
   point so as to exercise it and detect any such cases B4 the "giant lock"
   is removed.
1997-08-24 00:05:37 +00:00
Steve Passe
7b185ef809 Preperation for moving cpl into critical region access.
Several new fine-grained locks.
New FAST_INTR() methods:
 - separate simplelock for FAST_INTR, no more giant lock.
 - FAST_INTR()s no longer checks ipending on way out of ISR.
sio made MP-safe (I hope).
1997-08-20 05:25:48 +00:00
Peter Wemm
a24514dfdf Bruce's original implementation of the splxxx() routines, but as C code
rather than inlines.  These are compiled with -fomit-frame-pointer and
work out pretty close to the original routines, but it might be a fraction
slower.  The reason for doing this is to prevent the SWI_* and HWI_* values
from being compiled into drivers and lkms etc which is one of the things
that prevents the same lkm from being used on both SMP and UP kernels.

This gives us a lot more scope for experimenting with the splxxx
implementaton for SMP parallelism etc.

Reviewed by: bde
1997-05-31 08:57:05 +00:00