Commit Graph

16 Commits

Author SHA1 Message Date
Marius Strobl
42be1191a0 - When iterating over the register resources of the children don't use
the iteration variable as the RID when adding the respective resource
  to the child via bus_set_resource(). In case a device has both I/O
  and memory resources this generates gaps in the newbus resources of
  the child, e.g. its first memory resource might end up as RID 1.
  To solve this mimic resource_list_add_next() via resource_list_find()
  and bus_set_resource(); we can't just use resource_list_add_next()
  here as this would circumvent the limit checks in isa_set_resource()
  of the common ISA code.
  This however is more or less a theoretical problem so far as all known
  ISA devices on sparc64 soley use I/O space.
- Just use bus_generic_rl_release_resource() for isa_release_resource()
  instead of re-implementing the former.
- Improve some comments to better reflect reality, minor clean-up and
  simplifications, return NULL instead of 0 were appropriate.
2005-05-19 15:47:37 +00:00
Warner Losh
993fd0c509 PNP BIOS devices are fundamentally different than ISA PNP devices.
These devices should be probed first because they are at fixed
locations and cannot be turned off.  ISA PNP devices, on the other
hand, can be turned off and often can be flexible in the resources
they use.  Probe them last, as always.
2004-12-07 05:30:02 +00:00
Marius Strobl
8ff995cc5f o sparc64/isa/isa.c:
- The claim in the commit log of rev. 1.11 of dev/uart/uart_cpu_sparc64.c
    etc. that UARTs are the only relevant ISA devices on sparc64 turned out
    to be false. While there are sparc64 models where UARTs are the only
    devices on the ISA bus there are in fact also low-cost models where all
    devices traditionally found on the EBus are hooked up to the ISA bus.
    There are also models that use a mix between EBus and ISA devices with
    things like an AT keyboard controller and other rather interesting
    devices that we might want to support in the futute hook up to the ISA
    bus.
    In order to not need to add sparc64 specific device_identify methods to
    all of the respective ISA drivers and also not add OFW specific code to
    the common ISA code make the sparc64 ISA bus code fake up PnP devices so
    most ISA drivers probe their devices without further changes.
    Unfortunately Sun doesn't adhere to the ISA bindings defined in IEEE
    1275-1994 for the properties of most of the ISA devices which would
    allow to obtain the vendor and logical IDs from their properties. So we
    we just use a simple table which maps the name properties to PnP IDs.
    This could be done in a more sophisticated way but I courrently don't
    see the need for this. [1]
  - Add the children with fully mapped and specified resources (in the OFW
    sense) similar to what is done in the EBus code for the IRQ resources
    of the children as adjusting the resources and the resource list entries
    respectively in isa_alloc_resource() as done perviously causes trouble
    with drivers which use rman_get_start(), pass-through or allocate and
    release resources multiple times, etc.
    Adjusting the resources might be better off in a bus_activate_resource
    method but the common ISA code currently doesn't allow for an
    isa_activate_resource(). [2]
    With this change:
    - ppbus(4) and lpt(4) attach and work (modulo ECP mode, which requires
      real ISADMA code but it currently only consists of stubs on sparc64).
    - atkbdc(4) and atkbdc(4) attach, no further testing done.
    - fdc(4) itself attaches but causes a hang while attaching fd0 also
      when is DMA disabled, further work in fdc(4) is required here as e.g.
      fd0 uses the address of fd1 on sparc64 (not sure if sparc64 supports
      more than one floppy drive at all).
    All of these drivers previously caused panics in the sparc64 ISA code.
  - Minor changes, e.g. use __FBSDID, remove a dupe word in a comment and
    declare one global variable which isn't used outside of isa.c static.
o dev/uart/uart_cpu_sparc64.c and modules/uart/Makefile:
  - Remove the code for registering the UARTs on the ISA bus from the
    sparc64 uart_cpu_identify() again and rely on probing them via PnP.

Original idea by:	tmm [1]
No objections by:	tmm [1], [2]
2004-11-17 14:44:10 +00:00
Marius Strobl
26280d88d7 - Introduce an ofw_bus kobj-interface for retrieving the OFW node and a
subset ("compatible", "device_type", "model" and "name") of the standard
  properties in drivers for devices on Open Firmware supported busses. The
  standard properties "reg", "interrupts" und "address" are not covered by
  this interface because they are only of interest in the respective bridge
  code. There's a remaining standard property "status" which is unclear how
  to support properly but which also isn't used in FreeBSD at present.
  This ofw_bus kobj-interface allows to replace the various (ebus_get_node(),
  ofw_pci_get_node(), etc.) and partially inconsistent (central_get_type()
  vs. sbus_get_device_type(), etc.) existing IVAR ones with a common one.
  This in turn allows to simplify and remove code-duplication in drivers for
  devices that can hang off of more than one OFW supported bus.
- Convert the sparc64 Central, EBus, FHC, PCI and SBus bus drivers and the
  drivers for their children to use the ofw_bus kobj-interface. The IVAR-
  interfaces of the Central, EBus and FHC are entirely replaced by this. The
  PCI bus driver used its own kobj-interface and now also uses the ofw_bus
  one. The IVARs special to the SBus, e.g. for retrieving the burst size,
  remain.
  Beware: this causes an ABI-breakage for modules of drivers which used the
  IVAR-interfaces, i.e. esp(4), hme(4), isp(4) and uart(4), which need to be
  recompiled.
  The style-inconsistencies introduced in some of the bus drivers will be
  fixed by tmm@ in a generic clean-up of the respective drivers later (he
  requested to add the changes in the "new" style).
- Convert the powerpc MacIO bus driver and the drivers for its children to
  use the ofw_bus kobj-interface. This invloves removing the IVARs related
  to the "reg" property which were unused and a leftover from the NetBSD
  origini of the code. There's no ABI-breakage caused by this because none
  of these driver are currently built as modules.
  There are other powerpc bus drivers which can be converted to the ofw_bus
  kobj-interface, e.g. the PCI bus driver, which should be done together
  with converting powerpc to use the OFW PCI code from sparc64.
- Make the SBus and FHC front-end of zs(4) and the sparc64 eeprom(4) take
  advantage of the ofw_bus kobj-interface and simplify them a bit.

Reviewed by:	grehan, tmm
Approved by:	re (scottl)
Discussed with:	tmm
Tested with:	Sun AX1105, AXe, Ultra 2, Ultra 60; PPC cross-build on i386
2004-08-12 17:41:33 +00:00
Marius Strobl
66a79ac95d - Remove the old sparc64 OFW PCI code (as opposed to the former
"options OFW_NEWPCI").
  This is a bit overdue, the new sparc64 OFW PCI code which is
  meant to replace the old one is in place for 10 months and
  enabled by default in GENERIC for 8 months. FreeBSD 5.2 and
  5.2.1 also shipped with the new code enabled by default.
- Some minor clean-up, e.g. remove functions that encapsulated
  the #ifdefs for OFW_NEWPCI, remove unused resp. no longer
  required includes, etc.

Approved by:	tmm, no objections on freebsd-sparc64
2004-05-08 13:53:47 +00:00
John-Mark Gurney
4de27366d1 sync comment with i386's isa.c.. This removes a comment that is YEARS
old...
2004-03-17 21:45:55 +00:00
Warner Losh
3d11ce04c6 s=include <ofw/=include <dev/ofw/= to reflect removal of -I$S/dev 2003-08-23 00:11:16 +00:00
Warner Losh
d2c5276d96 Prefer new location of pci include files (which have only been in the
tree for two or more years now), except in a few places where there's
code to be compatible with older versions of FreeBSD.
2003-08-22 07:39:05 +00:00
Thomas Moestl
1d80cb1b37 Add the new sparc64 OFW PCI framework, conditional on options OFW_NEWPCI
for now. It introduces a OFW PCI bus driver and a generic OFW PCI-PCI
bridge driver. By utilizing these, the PCI handling is much more elegant
now.

The advantages of the new approach are:
- Device enumeration should hopefully be more like on Solaris now,
  so unit numbers should match what's printed on the box more
  closely.
- Real interrupt routing is implemented now, so cardbus bridges
  etc. have at least a chance to work.
- The quirk tables are gone and have been replaced by (hopefully
  sufficient) heuristics.
- Much cleaner code.

There was also a report that previously bogus interrupt assignments
are fixed now, which can be attributed to the new heuristics.

A pitfall, and the reason why this is not the default yet, is that
it changes device enumeration, as mentioned above, which can make
it necessary to change the system configuration if more than one
unit of a device type is present (on a system with two hme cars,
for example, it is possible that hme0 becomes hme1 and vice versa
after enabling the option). Systems with multiple disk controllers
may need to be booted into single user (and require manual specification
of the root file system on boot) to adjust the fstab.
Nevertheless, I would like to encourage users to use this option,
so that it can be made the default soon.

In detail, the changes are:
- Introduce an OFW PCI bus driver; it inherits most methods from the
  generic PCI bus driver, but uses the firmware for enumeration,
  performs additional initialization for devices and firmware-specific
  interrupt routing. It also implements an OFW-specific method to allow
  child devices to get their firmware nodes.
- Introduce an OFW PCI-PCI bridge driver; again, it inherits most
  of the generic PCI-PCI bridge driver; it has it's own method for
  interrupt routing, as well as some sparc64-specific methods (one to
  get the node again, and one to adjust the bridge bus range, since
  we need to reenumerate all PCI buses).
- Convert the apb driver to the new way of handling things.
- Provide a common framework for OFW bridge drivers, used be the two
  drivers above.
- Provide a small common framework for interrupt routing (for all
  bridge types).
- Convert the psycho driver to the new framework; this gets rid of a
  bunch of old kludges in pci_read_config(), and the whole
  preinitialization  (ofw_pci_init()).
- Convert the ISA MD part and the EBus driver to the new way
  interrupts and nodes are handled.
- Introduce types for firmware interrupt properties.
- Rename the old sparcbus_if to ofw_pci_if by repo copy (it is only
  required for PCI), and move it to a more correct location (new
  support methodsx were also added, and an old one was deprecated).
- Fix a bunch of minor bugs, perform some cleanups.

In some cases, I introduced some minor code duplication to keep the
new code clean, in hopes that the old code will be unifdef'ed soon.

Reviewed in part by:	imp
Tested by:	jake, Marius Strobl <marius@alchemy.franken.de>,
		Sergey Mokryshev <mokr@mokr.net>,
		Chris Jackman <cjackNOSPAM@klatsch.org>
Info on u30 firmware provided by:	kris
2003-07-01 14:52:47 +00:00
John-Mark Gurney
ad0c7dea8c fix misspelling of ORIR_NOTFOUND 2003-06-16 19:06:36 +00:00
Thomas Moestl
c944338750 Fix interrupt assignment for non-builtin PCI devices on e450s.
This machine uses a non-standard scheme to specify the interrupts to
be assigned for devices in PCI slots; instead of giving the INO
or full interrupt number (which is done for the other devices in this
box), the firmware interrupt properties contain intpin numbers, which
have to be swizzled as usual on PCI-PCI bridges; however, the PCI host
bridge nodes have no interrupt map, so we need to guess the
correct INO by slot number of the device or the closest PCI-PCI
bridge leading to it, and the intpin.

To do this, this fix makes the following changes:
- Add a newbus method for sparc64 PCI host bridges to guess
  the INO, and glue code in ofw_pci_orb_callback() to invoke it based
  on a new quirk entry. The guessing is only done for interrupt numbers
  too low to contain any IGN found on e450s.
- Create another new quirk entry was created to prevent mapping of EBus
  interrupts  at PCI level; the e450 has full INOs in the interrupt
  properties of EBus devices, so trying to remap them could cause
  problems.
- Set both quirk entries for e450s; remove the no-swizzle entry.
- Determine the psycho half (bus A or B) a driver instance manages
  in psycho_attach()
- Implement the new guessing method for psycho, using the slot number,
  psycho half and property value (intpin).

Thanks go to the testers, especially Brian Denehy, who tested many kernels
for me until I had found the right workaround.

Tested by:	Brian Denehy <B.Denehy@90east.com>, jake, fenner,
		Marius Strobl <marius@alchemy.franken.de>,
		Marian Dobre <mari@onix.ro>
Approved by:	re (scottl)
2003-05-30 20:48:05 +00:00
Thomas Moestl
8c8a1169df Add two new workaround for firmware anomalies:
1. At least some Netra t1 models have PCI buses with no associated
   interrupt map, but obviously expect the PCI swizzle to be done with
   the interrupt number from the higher level as intpin. In this case,
   the mapping also needs to continue at parent bus nodes.
   To handle that, add a quirk table based on the "name" property of
   the root node to avoid breaking other boxen. This property is now
   retrieved and printed at boot.
2. On SPARCengine Ultra AX machines, interrupt numbers are not mapped
   at all, and full interrupt numbers (not just INOs) are given in
   the interrupt properties. This is more or less cosmetical; the
   PCI interrupt numbers would be wrong, but the psycho resource
   allocation method would pass the right numbers on anyway.

Tested by:	mux (1), Maxim Mazurok <maxim@km.ua> (2)
2002-11-07 16:07:46 +00:00
Thomas Moestl
3d6d9df323 Remove a debugging panic that was triggered when a resource that was out
of range was tried to be allocated; just return failure instead.
2002-04-02 17:23:45 +00:00
Thomas Moestl
464ae30ee6 Make the OpenFirmware interrupt mapping code more generic, to reduce
the bus-dependent code and to be able to support more systems. The core
of the new code is mostly obtained from NetBSD.
Kluge the interrupt routing methods of the psycho and apb drivers so
that an intline of 0 can be handled for now; real routing is still not
possible (all intline registers are preinitialized instead); this will
require a sparc64-specific adaption of the driver for generic PCI-PCI
bridges with a custom routing method to work right.
2002-03-24 02:11:06 +00:00
Thomas Moestl
f4a4c79dc0 Fix typos in a comment. 2002-02-13 15:43:42 +00:00
Thomas Moestl
ebaf8798e9 Add ISA support code for sparc64. 2001-11-09 20:21:21 +00:00