Commit Graph

27 Commits

Author SHA1 Message Date
Warner Losh
60727d8b86 /* -> /*- for license, minor formatting changes 2005-01-07 02:29:27 +00:00
Warner Losh
9f977fb187 Add support for writing to mapping high memory for pccard memory
windows.  Right now we only support pci chips that are memory mapped.
These are the most common bridges in use today and will help a large
majority of the users.

I/O mapped PCI chips support this functionality in a different way, as
do some of the ISA bridges (but only when mounted on a motherboard).
These chips are not supported by this change.
2002-07-20 22:29:23 +00:00
Warner Losh
7cf44afd1a <jkh> "Hey Rocky, watch me eject this pccard outta my laptop!" "What,
again?  That NEVER works!"  "This time for sure!"

Minor overhaul of how we do interrupts for the pci interrupt routing
case to cope with card ejection better (read: make it not hand on so
many cards):
	o Reintroduce func_intr and func_arg and use the to store the
	  interrupt handler to call.
	o Create a pcic_pci_func_intr to call the real interrupt handler
	  iff the card hasn't been ejected.
	o Remove some checks in pcic_setup_intr now that it is used
	  exclusively for isa routed interrupts.
	o Defer the eject event until later too, but make sure we can't
	  do any client driver ISR calling in the interrum.
	o Add some simple code to make sure that we don't attach more
	  than one child.  This should fix pccardd starting twice
	  problem (ala single user -> multi-user when you started pccardd
	  by hand in SU).

MFC: after jkh thinks I've put the crack pipe away.
2001-09-13 08:26:55 +00:00
Warner Losh
592823383b Move to using a chip function + function pointers to deal with the
function and csc interrupt routing path (eg, ISA or PCI) so that we
can more easily switch between the two.

When we don't have a card ISR, put the function interrupt into ISA
mode.  This effectively masks the interrupt since it happens once, and
not again until we have an ISR.  This should help hangs, and might
help people that unwisely update the kernel w/o updating pccardd.
This is done at mapirq time.

Force CL-PD6729/30 to use ISA interrupt routing and maybe even detect
the number of pccard slots properly (this is still WIP).  We aren't
going to support PCI interrupts for this release.  A future release
should support them, however.  Shibata-san's 3.3V fixes are not
included.

Add a hack which should, in i386, rewrite IRQ 0 cardbus bridges to be
IRQ 255, which should cause interrupts to be routed.  This is mostly
untested since my one tester disappeared after reporting nothing
changed.

Implement, but do not use, a power method called cardbus.  It looked
like a great way to get around the 3.3V problem, but it seems that you
can only use it to power cardbus cards (I get no CIS when I enable it,
so maybe we're programming things bogusly).

GC the intr and argp stuff from the slot database.

Improve the ToPIC support with the power hacks that Nakagawa-san
published in FreeBSD Press and that Hiroyuki Aizu-san ported to
-stable.  The ToPIC hacks were for 3.3V support in ToPIC 100, but it
looks like the '97 also has identical registers, so use them too.

Add some #defines for the cardbus power stuff.

Finally implement making CSC on the Ricoh chips ISA or PCI.  This will
allow polling mode to work on vaios, I think.

Add some minor debugging.  This should likely be cleaned up or put
behing a bootverbose.

Some of this work, and earlier work, was influanced by Chiharu
Shibata-san's power handing patches posted to bsd-nomads:15866.

MFC: Soon, if possible.
2001-09-04 04:47:58 +00:00
Warner Losh
0f102020db Rearrange how we do interrupt routing tweaking. We now have
hw.pcic.intr_path	{1,2}	1 == ISA, 2 == PCI
	hw.pcic.init_route	Force TI chipset initializations in edge case.
2001-08-21 20:04:42 +00:00
Warner Losh
6ac061b532 Improve interlocking for card removal. We now can remove the card in
the ISR.  We keep track of the card state and don't call the IRS when
the card isn't inserted.  This helps quite a bit with card ejection
problems that Ian was seeing.

Submitted by: Ian Dowse
MFC upon: re approvel.
2001-08-19 05:01:18 +00:00
Warner Losh
dc2e861bdb Merge from stable (which seems to have been spammed at some point in current):
#ifdef the deltap pcic_set_memory_offset argument so that raylink
driver works.
2001-08-14 23:34:09 +00:00
Warner Losh
043b27b450 Move ISA interrupt ISR and timeout routines to pcic from pcic_isa so
that we can use them in the pci code when we have to fall back to ISA
interrupt routing.
2001-08-10 06:07:20 +00:00
Warner Losh
e4db871961 Type sanity: use uintptr_t * for read_ivar and u_int8_t instead of u_char 2001-08-10 06:00:44 +00:00
Warner Losh
f470b3bb56 Rearrange the pcic_irq_type enum (and specifically tag the first one
as being 1) in anticipation of documentation.
2001-08-10 05:42:08 +00:00
Warner Losh
6d5c3c4c96 bsh and bst are unused in softc, except for setting them. We do use the
bsh and bst in the pcic_slot structures.
2001-07-31 15:53:17 +00:00
Warner Losh
4ee0b26518 Move pcic_override_irq from pcic_isa, to pcic. 2001-07-31 06:32:02 +00:00
Warner Losh
c1c1a23f53 Attempt to fix and document interactions between suspend/resume and pccardc
power x 0.

pccardc power x 0 used to disable the slot.  But a suspend/resume
would reactivate the pccard.  It no longer does that.  Now the
disabling of the slot is sticy until it is reset with power x 1 or the
card is ejected.  This seems closer to correct behavior to me.

o Process all card state changes the same using pccard_do_stat_change().
o Cleanup disabling the card so that we can preserve the state after
  the change.  Basically, don't set it to empty as often as we do.
o On suspend, the new state is "empty" and the laststate is "suspend"
o Document state machine with a diagram of states and edges.  The
  edges are labeld to tell the reader what event causes the external
  state changes.
o "machdep.pccard.pcic_resume_reset" may be obsolete now.  We always
  call the bridge driver's resume method on resume now.  Otherwise cards
  won't automatically show up.  If it needs to stay, I'll add it back.
2001-07-27 07:21:42 +00:00
Warner Losh
554a9d4aa3 Some interrelated interrupt changes.
Frist, for pci slots, make the setup intr save the requested interrupt
vector and arg and return rather than passing it up to our parent.  On
interrupts, we call this vector iff there's a card in the slot.  This
should eliminate some of the hangs or "weird" messages that people see
when ejecting cards and also help close the race window somewhat.
Reading the pci bus one more time for this information is judged to be
an acceptible tradeoff since it is very very fast.

Cleanup a little how we detect unsupported cards.  Only detect
unsupported cards (eg cardbus cards) on card insertion (or more
pedantically when a card is actually present).  This should allow us
to change the message in the future to "cardbus card not supported
with OLDCARD" :-).

Note:
	We may also consider this for the ISA bus case, but there the
	reads are much more expensive and the location of the CD pin
	status lines appears to be less standardized.  Also, the ISA
	management interrupt isn't shared with the card's interrupt.
	The mutliplex the CSC and function interrupts bit also appears
	to be non-standard (or at least not imlemented on all
	bridges).
2001-07-01 23:41:43 +00:00
Warner Losh
94b197e96d Move the pcic interrupt from pcic.c to pcic_isa.c. The ISA handling
for card change interrupts is different than the pci stuff that's
coming soon.  Set the management irq in different ways.  If
pci_parallel interrutp routing, then use the PCI way of getting
interrupts.  Move polling mode into pcic_isa since when we're routing
via pci polling doesn't work because many bridges (systems hang solid).

If we're routing interrupts via pci, they can be shared, so flag them
as such.

Note, this doesn't actually change anything since the pci attachment
isn't quite ready to be committed.
2001-06-04 03:29:06 +00:00
Warner Losh
f83a4e8171 Turns out that one bit isn't enough. Introduce two new fields
csc_route and func_route to hold the way that each interrupt is
routed.  csc is Card Status Change in the datasheets and standard, but
is called "Management Interrupt" in FreeBSDese.  There are three types
of interrupt routing:  ISA parallel, PCI parallel and ISA serial (some
chipsets support other types as well, but I don't plan on supporting
them).

When we try to allocate an interrupt, and the type for that interrupt
is pci_parallel, allow it to be shared by oring in RF_SHAREABLE to the
flags argument.  Introduce pcic_alloc_resource to allow this to
happen.
2001-05-28 02:53:02 +00:00
Warner Losh
92d08a4dcf Allow a shareable interrupts. Note, the bridge must set this flag or
the irq will be unshareable, as things are now.

More work likely is needed, but this is a good checkpoint.

# pcic_pci.c is getting closer :-)
2001-05-27 05:53:37 +00:00
Warner Losh
995823e999 Migrate from unit based to dev base. Don't save unit number, but do save
dev.  Convert all uses of unit to dev as appropriate.  Minor comment fixes
to pcic_softc definition.
2001-05-25 18:28:49 +00:00
Warner Losh
f7d83eb183 Add intrack field to each slot. This can be used to acknowledge
interrupts on other buses.  Right now it isn't used, but will be for
the pci attachment.

# Add copyright by me for this year since I've changed so much.
2001-05-25 05:25:43 +00:00
Warner Losh
8cad38176d Use bus_space functions rather than inb/outb.
Add defines for PCIC_INDEX and PCIC_DATA offsets.
Change PCIC_INDEX_0 to PCIC_PORT_0
Add define for PCIC_NPORT.
Document why the vadem probe works.
2001-05-24 06:54:48 +00:00
Warner Losh
99efcc2bb9 Move getb1 and putb1 from pcic_isa.c to pcic.c. Rename them to
pcic_{get,put}b_io.  There are some pci bridges (the CL-PD6729 and
maybe others) that do not have memory mapped registers, so we'll need
these in both places.  Declare them in pcicvar.h.
2001-05-24 04:03:28 +00:00
Warner Losh
a8ed536b94 Add better support for the Ricoh 5C296 and 5C396 chips. These chips
have a slightly different 3.3V support than the other clones, so
compensate as best we can.  Note: 3.3V support is untested since I do
not have any 3.3V cards that I know of to test it with.
2001-05-23 05:06:04 +00:00
Warner Losh
13ab4e6dc1 Move allocation of ExCA registers from the base driver into the bus
attachment code.
2001-05-21 07:32:46 +00:00
Warner Losh
57462c010c Next step on the road to pci: power taming.
Work through the various power commands and convert them from a "is
this a foo controller or a foo' controller or a foo''' controller" to
a cabability based scheme.  We have bits in the softc that tell us
what kind of power control scheme the controller uses, rather than
relying on being able to enumerate them all.  Cardbus bridges are
numerous, but nearly all implement the i82365sl-DF scheme (well, a few
implement cirrus CL-PD67xx, but those were made by Cirrus Logic!).

Add a pointer back to the softc in each pcic_slot so we can access
these flags.

Add comments that talk about the issues here.  Also note in passing
that there are two differ Vpp schemes in use and that we may need to
adjust the code to deal with both of them.  Note why it usually works
now.

We have 5 power management modes right now: KING, AB, DF, PD and VG.
AB is for the i82365 stpes A, B and C.  DF is for step DF.  PD is the
cirrus logic extensions for 3.3V while VG is the VADEM extensions for
3.3V.  KING is for the IBM KING controller found on some old cards.
# I'm looking for one of those old cards or a laptop that has the KING
# bridge in it.

We have to still cheat and treat the AB parts like the DF parts
because pci isn't here yet.  As far as I can tell, this is harmless
for actual old parts and necessary to work with 3.3V cards in some
laptops.

This almost eliminates all tests for controller in the code.  There
are still a few unrelated to power that need taming as well.
2001-05-21 04:44:14 +00:00
Warner Losh
e67316366d Next step towards pcic_pci: the ability to allocate mapped memory in attach.
o Introduce flags word to the softc.  This will be used to control various
  aspects of the driver.  Right now there are two bits defined, PCIC_IO_MAPPED
  and PCIC_MEM_MAPPED.  One for ISA cards that are I/O mapped, the other is
  for PCI cards that are memory mapped.  Only the ISA side is implemented
  with this commit.
o Introduce a pcic_dealloc which will cleanly dealloc resources used.  Right
  now it is only supported when called from probe/attach.
o Keep track of resources allocated in the pcic_softc.
o move pcictimeout_ch to the softc so we can support multiple devices
  in polling mode.
o In ISA probe, set PCIC_IO_MAPPED.
o Introduce and compute the slot mask.  This will be used later when
  we expand the number of slots on ISA from 2 to 4.  In such a case, we
  appear to have to use polling mode otherwise we get two different cards
  trying to drive the same interrupt line.  I don't have hardware to
  test this configuration, so I'll stop here.
2001-05-21 03:22:52 +00:00
Warner Losh
bc0f2245d1 Move ISA specific code into pcic_isa. This is the probe routine, the
get/setb1 routines.  Also expose clrb and setb as pcic_{clrb,setb} so
we can use it from the probe.  pcic_probe is no longer needed.
2001-05-19 05:21:23 +00:00
Warner Losh
5a695e4878 Separate out isa attachment to its own file. The pci attachment will
soon attach directly to pcic rather than the kludge pci-pcic device we
have now.

In some ways, this is similar to the work PAO3 did to try to support
cardbus bridges.  In some ways different.  This and future commits
will be taking from the spirit of many of those changes.  pcicvar.h is
completely different from the pcicvar.h that appeared in PAO3, but
similar in concept.
2001-05-16 07:32:04 +00:00