share devclass pointers, a mistake I've encouraged in the past) and
move the declaration of the pci_driver kobj class from cardbus.c to
pci_private.h so that other drivers can inherit from pci_driver.
allocating a resource that's in the card itself.
Remove more now-redundant resource_list_add, and now-redunant code
that lives in the pci layer.
# This fixes the atheros card that I have which had its CIS in one of
# the BARs. Don't know yet if this fixes the amd64 issues reported.
cardbus_cis.c to this file, some code was not merged and thus resource
list entries were invalid. They didn't have a resources attached to
them.
However, the problem was masked for some time later, because newer
resources list entries were added to the head of the list, and
resource_list_find() always returned the first matching resource list
entry. Usually the underlying driver allocated a valid resource and
added it to the head of the list, and invalid one wasn't used.
In rev. 1.174 of subr_bus.c the sorting of resource list entries was
reversed demasking the problem in cardbus_alloc_resources().
This commit fixes the problem returning back some code from
cardbus_cis.c, pre-1.49 revisions.
PR: kern/87114
PR: kern/90441
Hardware provided by: Vasily Olekhov <olekhov yandex.ru>
Reviewed by: imp
last in the list rather than first.
This makes the resouces print in the 4.x order rather than the 5.x order
(eg fdc0 at 0x3f0-0x3f5,0x3f7 is 4.x, but 0x3f7,0x3f0-0x3f5 is 5.x). This
also means that the pci code will once again print the resources in BAR
ascending order.
unknown (since my sony vaio didn't :-(.
Instead, fix the problem described by 1.49 in a different way: just
add the two calls I'd hoped I'd avoid in 1.49 by doing the (wrong)
gymnastics there. While 1.49 is a good direction to go in, each step
of the way should work :-(.
yet I only changed one of them. So when we loaded drivers, we'd fail
to allocate resources correct.
This pointed out that we were doing the wrong thing when we failed to
attach a child. We released all the resources and almost deleted the
child. Instead, we should keep the resources allocated so when/if a
driver is loaded, we can go w/o having to allocate them. We use
pci_cfg_save/restore to restore the BARs with these resources.
This seems to fix the problems that we were seeing that I thought
might have magically gone away in the last revision of cardbus.c (but
really didn't).
Noticed by: avatar (nicely done!)
They have nothing at all to do with CIS parsing.
Remove some unused funce parsing: nothing used the results.
Use more of pccard_cis.h's deifnitions for the cardbus specific cis
parsing we do. More work is needed in this area.
This reduces the size of the cardbus module by 380 bytes or so...
The hack for setting the bus has been moved down into the cbb driver.
I've been running without this hack in my tree for so long I had
forgotten that I'd removed it :-). Please let me know if this causes
difficulty for your laptop.
o minor optimization of cardbus_cis processing. Remove a bunch of generic
entries that are handled by generic.
o no longer need the card_get_type stuff.
interrupt to be used for a device. This is intended solely for internal
use of PCI bus implementations, and exists so that PCI bus drivers
implementing special interrupt assignment methods which require
additional work at the bus level to work right can be easily derived
from the generic driver (or any other one) without resorting to hacks.
It will be used in the sparc64 ofw_pcibus driver, which will be
committed shortly.
Make use of this method in the generic implementation, and add it to
the method table of bus drivers derived from the PCI one.
Reviewed by: imp, -hackers
set on realtek cards, but they work without it (and don't work with
it). The standard seems to imply that this is just a hint anyway, so
this should be harmless. It doesn't appear to be set on any other
cardbus cards that I have (or have seen).
This should make the rl based CardBus cards work again. I've been
running it for about a month now.
Approved by: re@ (jhb)
Minor CIS resource allocation code cleanup
Remove some fairly useless debug writes.
This finishes the work to move as much cardbus code as possible into
pci. We wind up removing 800-odd lines from cardbus.c: we go from
1285 to 400 lines.
Reviewed by: mdodd
is encoded in the PCI BAR. The latter is more reliable.
This allows the sio/modem function of the Xircom RealPort ethernet+modem
card to work. Note that there still seem to be issues with sio_pci not
releasing resources on detach.
pci busses implement this.
Also minor comment smithing in cardbus. Fix copyright to this year
with my name on it since I've been doing a lot to this file.
Reviewed by: jhb
o Use the common pci_* routines in preference to the copied and hacked
routines from an ancient pci.c.
This saves 509 lines in cardbus.c. More savings to follow when I
convert the resource code over. In the past when I've done this the
resource code conversion breaks cardbus in subtle ways so I'm doing a
1/2 way checkpoint this time. cardbus still works for me the same as
it did before.
It also looks like cardbus devices now show up as pci bus devices to
pciconf -l, but maybe that was happening before.
Inspired by a patch from Justin Gibbs many moons ago. When he
finishes his kobj multiple inheritance work, we can transition the
finished version of this work to that fairly easily.
Kill the slightly bogus #define for DECODE_PROTOTYPE
Be less verbose. Hide most (all I hope) of the CIS
parsing behind cardbus_debug_cis (which is set with
hw.cardbus.debug_cis=1).
This doesn't fix problems with parsing, but should make cardbus
less chatty. There appears to be some issues still with the
parsing of the CIS, but this won't fix them.
Prompted by: scottl
Second part of the kldload patches for cardbus. This makes
kldload of a driver for a device that's inserted now appears
to work. To make it work, we only do a power cycle of the card
if there's no children drivers attached.
This likely is papering over bogosities in the power system. The
power sequence needs to be re-written, so I'll not worry about
the papering over until the re-write.
unconditionally. kldloading a cardbus driver was shooting down other
attached devices because most drivers assume that one cannot
power-cycle cards w/o the driver knowning about it.
Submitted by: simokawa-san
sometimes, so return it when requested and it does. Also a little
more infrastructure for a few other things.
Submitted by: sam
Approved by: re (blanket for NEWCARD)
bit in the PCI command register for the device. Otherwise, device drivers
that look at this register to see which types of BARs are usable will think
that none of them are.
This allows my Adaptec 1480A cardbus card to finally work.
Reviewed by: imp
- Fix some especially bad style in the CIS BAR tuple parsing code.
- activate Option ROMS correctly.
- de-obfuscate the Option ROM image selection code.
- Fix mis-interpretation of the PCI spec that prevented Option ROMs whose
CIS section wasn't in the first image from working.
- Fix mis-interpretation of the PCI spec that prevented CIS's mapped into
MEMIO space from working at all.
- Reject invalid CIS pointers.
Reviewed by: imp
o Always release the resources on device detach.
o Attach resources the same with driver added as we do we do in the insert
case (maybe this should be a routine).
o signal the wakeup of the thread on resume instead of trying to force an
interrupt.
o Minor debug hacks.
o use 0xffffffff instead of -1 for uint32_t items.
o Don't complain when we're asked to detach no cards. This is normal.
o Eliminate the now worthless second parameter to card_detach_card.
o minor style(9)isms
Some of these patches may be from: iwasaki-san, jhb, iadowse
Note, we return the PCI pnp info, but in fact that's wrong to do
since that data is not defined for CardBus cards. CardBus says that
these registers are undefined and one should use the CIS to do
device matching. To date, all CardBus cards have had these
registered defined, no doubt because they are using common silicon
to produce both the PCI cards and the CardBus cards. However, it isn't
any worse than the rest of the system, so just note it in passing and
move on.
o Also sort prototypes while I'm here.
code into cardbus and s/pci/cardbus. This exposes a few pci_*
functions that are now static.
This work is similar to work Justin posted to the mobile list about a
year or two ago, which I have neglected since then.
This is a subset of his current work with the multiple inheritance
newbus architecutre. When completed, that will eliminate the need for
pci/pci_private.h.
Similar work is needed for the cardbus_cis and pccard_cis code as well.
Briefly, the significant changes include:
* Way better resource management in pccbb, pccard and cardbus.
* pccard hot-removal now appears to work.
* support pre-fetchable memory in cardbus.
* update cardbus to support new pci bus interface functions.
* Fix CIS reading to no longer use rman_get_virtual().
What's not there, but in the works:
* pccard needs to do interrupt properly and not read the ISR on single
function cards.
* real resource management for pccard
* a complete implementation of CIS parsing
* need to look into how to correctly use mutex in pccbb
This is the first part of a two-part update to NEWCARD. Changes in this
commit are non-functional, and includes the following:
* indentation and other changes to meet style(9).
* other minor style consistancy changes
* addition of comments
* renaming of device_t variables to be consistant across all of NEWCARD.
(note that not all style violations are fixed in this commit -- those that
aren't will be clobbered by the next commit.)
- pccbb no longer needs to remember whether a card is inserted.
- pccbb reissues insertion on load of cardbus/pccard modules.
- got rid of unnecessary delays in power functions.
- Cardbus children are no longer deleted if probe/attach fails.
- non-attached child devices are reprobed at driver_added.
* CARD interface to read CIS
- added card_cis_read/card_cis_free interface to read arbitrary CIS
data. This currently is only implemented in cardbus.
* pccard begins to work
- pccard can now use higher memory space (and uses it by default).
- set_memory_offset interface changed.
- fixed ccr access, which was broken at multiple locations.
- implement an interrupt handler - pccard can now share interrupts.
- resource alloc/release/activate/deactivate functions gutted: some
resources are allocated by the bridge before the child device is
probed or attached. Thus the resource "belongs" to the bridge, and
the pccard_*_resource functions need to fudge the owner/rid.
- changed some error conditions to panics to speed debugging.
* Mutex fix - Giant is entered at the beginning of thread
- Remove redundant header-type-specific support in the cardbus pcibus
clone. The bridges don't need this anymore.
- Use pcib_get_bus instead of the deprecated pci_get_secondarybus.
- Implement read/write ivar support for the pccbb, and teach it how
to report its secondary bus number. Save the subsidiary bus number
as well, although we don't use it yet.
4) The cardbus CIS code treats the CIS_PTR as a mapping register if
it is mentioned in the CIS. I don't have a spec handy to understand
why the CIS_PTR is mentioned in the CIS, but allocating a memory range
for it is certainly bogus. My patch ignores bar #6 to prevent the
mapping.
[The pccard spec says that BAR 0 and 7 (-1 and 6 in thic case since we
did a minus one) is "reserved". The off by 1 error has been fixed.
also bar=5 is invalid for IO maps, so we check it.]
5) The CIS code allocated duplicate resources to those already found
by cardbus_add_resources(). The fix is to pass in the bar computed
from the CIS instead of the particular resource ID for that bar,
so bus_generic_alloc_resource succeeds in finding the old resource.
[fixed, also removed superfluous (and incorrect) writing back to the
PCI config space.]
7) The CIS code seems to use the wrong bit to determine rather a particular
register mapping is for I/O or memory space. From looking at the
two cards I have, it seems TPL_BAR_REG_AS should be 0x10 instead
of 0x08. Otherwise, all registers that should be I/O mapped gain
a second mapping in memory space.
[Oops, the spec does say 0x10..., fixed]
Submitted by: Justin Gibbs
io or memory space access enabled. This patch defers the setting
of these bits until after all of the mapping registers are probed.
It might be even better to defer this until a particular mapping
is activated and to disable that type of access when a new
register is activated.
2) The PCI spec is very explicit about how mapping registers and
the expansion ROM mapping register should be probed. This patch
makes cardbus_add_map() follow the spec.
3) The PCI spec allows a device to use the same address decoder for
expansion ROM access as is used for memory mapped register access.
This patch carefully enables and disables ROM access along with
resource (de)activiation.
This doesn't include the prefetching detection stuff (maybe later when code is written to actually turn on prefetching). It also does not use the PCI definitions (yet, I'll try to put this in all at once later)
Submitted by: Justin T. Gibbs
