Commit Graph

9 Commits

Author SHA1 Message Date
Andrew Thompson
cefd33c787 Hook up the five gpio pins on the Avila board to the gpio framework. There are
actually 16 I/O lines but the other ones are used for system devices and
interrupts.

The IXP4XX platform can set interrupts on these pins for
high/low/rising/falling/transitional but this is not implemented yet.

The Cambria has the same interface but as all the pins are assigned to system
functions the gpio header is toggled via a PLD on the i2c bus and is not
supported by this commit.
2010-11-07 20:33:39 +00:00
Sam Leffler
55ca456dcd map the optional GPS and RS485 uart's on the Gateworks Cambria board
(may want to make these conditional)
2009-06-22 20:41:02 +00:00
Sam Leffler
0ad2baa062 add IXP4XX_FLASH_SIZE config knob that can be used to override the default
flash size; this is necessary at the moment because we map all of flash at
boot, eventually we'll do this on the fly
2009-03-10 21:49:22 +00:00
Sam Leffler
a3ae8e385c Cleanup virtual device mapping some more:
o improves understandability by replacing numerous relative address
  calculations with fixed addresses; everything should now match up
  more easily with the vm layout shown at the top of the file
o move the expansion bus chip select regions to be contiguous with
  the expansion bus configuration area; this is not exploited right
  now but allows map consolidation in the future
o leave a gap between the expansion bus regions and the pci config
  space in case we want to map more exp bus cs regions

Reviewed by:	imp, thompsa
2009-03-06 23:32:45 +00:00
Sam Leffler
c3b85cf91f Add support for the StrataFlash on 2348 boards:
o add bus shim for cfi driver
o add static mapping for CS0 (we map all 16M as the cfi driver doesn't
  support demand mapping)

Note this needs some tweaking to work for 2358 boards which is why the
CAMBRIA config is not touched.
2009-02-03 19:16:04 +00:00
Sam Leffler
d463fa5387 Fill in feature control support:
o add definitions for more bits, for masking out IXP465-specific bits,
  and %b format string
o add ixp4xx_read_feature_bits to retrieve the mask of valid features
  (aka fuse bits)
o add cpu_is_ixp42x() macro
o print feature bits at boot
2008-12-23 04:48:27 +00:00
Sam Leffler
d212022417 Merge WIP from p4:
o recognize ixp435 cpu
o change memory layout for for ixp4xx to not assume memory is aliases
  to 0x10000000 (Cambria/ixp435 memory starts at zero)
o handle 64 irqs for ixp435
o dual EHCI USB 2.0 controller integral to ixp435
o overhaul NPE code for ixp435 and better MAC+MII naming
o updated NPE firmware (including NPE-A image for ixp435/ixp465)
o Gateworks Cambria board support:
  - IDE compact flash
  - MCU
  - front panel LED on i2c bus
  - Octal LED latch

Sanity-tested with NFS-root on Avila and Cambria boards.  Requires
pending boot2 mods for CF-boot on Cambria.
2008-12-13 01:21:37 +00:00
John Hay
142f4ed4b1 Map the second CS of the compact flash too. This allow us access to
the alternate status and the control registers. Remove the local
version of ata_reset.

Add support for the ADI Pronghorn Metro boards. They use CS3 and CS4
instead of Avila's CS1 and CS2.
2007-03-14 19:03:07 +00:00
Sam Leffler
e67f80fd20 Gateworks Avila board support:
o ixp425 support
o NPE network driver (requires Intel microcode)
o h/w qmgr support
o True IDE compact flash over expansion bus
o pci (ath and hifn795x parts tested)
o xscale watchdog timer
o ds1672 RTC on i2c bus
o ad7418 voltage + temp monitoring on i2c bus
o uart

Work done together with cognet, kevlo, and jmg.  Parts of
the ixp425 support obtaine/derived from netbsd.

Reviewed by:	cognet, imp
MFC after:	1 month
2006-11-19 23:55:23 +00:00