Background:
The coming ibcore update forces an update of mlx4ib(4) which in turn requires
an updated mlx4 core module. This also affects the mlx4en(4) module because
commonly used APIs are updated. This commit is a middle step updating the
mlx4 modules towards the new ibcore.
This change contains no major new features.
Changes in mlx4:
a) Improved error handling when mlx4 PCI devices are
detached inside VMs.
b) Major update of codebase towards Linux 4.9.
Changes in mlx4ib(4):
a) Minimal changes needed in order to compile using the
updated mlx4 core APIs.
Changes in mlx4en(4):
a) Update flow steering code in mlx4en to use new APIs for
registering MAC addresses and IP addresses.
b) Update all statistics counters to be 64-bit.
c) Minimal changes needed in order to compile using the
updated mlx4 core APIs.
Sponsored by: Mellanox Technologies
MFC after: 1 week
the coming ibcore and mlx5ib updates in order to support traffic redirection
to so-called raw ethernet QPs.
Remove unused E-switch related routines and files while at it.
Sponsored by: Mellanox Technologies
MFC after: 1 week
mbpool existed to support NICs with memory interfaces and all remaining
comsumers were removed earlier this year with NATM.
Reviewed by: jhb
Sponsored by: DARPA, AFRL
Differential Revision: https://reviews.freebsd.org/D10513
this is more friendly to the tree.
Tested this with loader.conf:if_igb_load="YES" and it does the right
thing.
Submitted by: Ian Lepore <ian@freebsd.org>
mapping. This uses the new common code shared with amd64.
The RTC should only be accessed via EFI. There is no locking around it as
the spec only has this as a requirement for the PC-AT CMOS device.
Reviewed by: kib, imp
Sponsored by: DARPA, AFRL
Differential Revision: https://reviews.freebsd.org/D12595
end up with non-standard DESTDIR information in its symlink. This
can happen very trivially if the release scripts are used.
Sponsored by: Limelight Networks
Changes since 1.16.26.0 for all three firmwares are listed below. This
list was obtained from the Release Notes of the Chelsio Unified Wire
v3.5.05 release for Linux.
T6 Firmware
++++++++++++
================================================================================
Version : 1.16.63.0
Date : 09/29/2017
================================================================================
Fixes
-----
BASE:
- Fixed a fw crash when configured traffic rate limit is less than 10kbps.
- Fixed traffic rate limiting for smaller traffic rate value.
ETH:
- Fixed 40G link failure when interface is toggled.
- Fixed adapter crash when interface is toggled during traffic.
- Fixed 25G link failure when PEER only supports consortium mode autoneg
for 25G.
- Fixed 100G optics link failure when cable is plugged in after bringing up
the interface.
- Enable RS FEC as default if speed is 100G.
- Fixed DCBX configuration refresh failure.
OFLD
- Fixed 0B iWARP ingress read failure.
- Fixed iWARP SRQ reuse failure.
FOiSCSI:
- Fixed vlan interface ping failure.
- Fixed target discovery failures.
- Fixed mutual chap login failure.
================================================================================
Version : 1.16.59.0
Date : 09/05/2017
================================================================================
FIXES
-----
BASE:
- Fixed fw crash caused by MC parity error in SO adapters.
- Generate Timer0Int interrupt if fw crashes due to unaligned access error. Host
driver must look into PCIE_FW register to see if any fw fatal error has
encountered. If PCIE_FW doesn't indicate any error then driver must ignore this
interrupt.
- Fixed receive buffer threshold settings which was resulting in error frames on
receive side.
ETH:
- Fixed an issue in connection traffic shaping when
FLOWC_WR->FW_FLOWC_MNEM_SCHEDCLASS is not received in first WR on the connection.
- Fixed link failure when speed is changed from 10G-1G-10G due to incorrect flag
check.
- Fixed improper LED behaviour for blink test and when traffic is running.
- Removed storage of previous fec settings from fw. Driver needs to pass the user
settings whenever a new module is plugged in as fw resets these when a module is
unplugged.
OFLD
- OVS offload: TP cache is flushed periodically to get the accuate filters stats
(hit count).
ENHANCEMENTS
------------
BASE:
- Ring backbone feature added. New FW_PARAMS_PARAM_DEV_RING_BACKBONE param type
added to query and enable ring backbone support.
- VNI support added for filtering. New entry_type FW_VI_MAC_TYPE_EXACTMAC_VNI
added to FW_VI_MAC_CMD.
- Added new API FW_PARAM_PARAM_DEV_MPSBGMAP to read the priority to buffer group
mapping for the ports.
- FW_PARAMS_PARAM_DEV_TPCHMAP API added to read the port to channel mapping.
- HMA (Host memory access) support added. New FW_HMA_CMD and
FW_PARAMS_PARAM_DEV_HMA_SIZE added to query and configure the HMA. It
enables the memfree support (256 connections) for iwarp.
- PTP support enabled.
ETH:
- Added consortium mode 50G support.
- Added the ability to allow only selected speeds to be advertised during auto
negotiation.
- Increased port capability from 16 to 32 bits to support more speeds.
FW_PARAMS_PARAM_PFVF_PORT_CAPS32 added to query whether fw supports 16 or 32
bit port capability.
OFLD:
- RDMA Write with immediate support added (iwarp 2.0 feature)
- FW_TLS_KEYCTX_TX_WR removed and security key management moved to driver.
- 256 offloaded connections support for iwarp on SO adapters.
iSCSI:
- New param FW_PARAMS_PARAM_DEV_PPOD_EDRAM added for iscsi ppod configuration
in EDRAM (performance improvement).
FOiSCSI:
- iSCSI Command offload target support added.
FOFCoE:
- FCoE support enabled.
================================================================================
Version : 1.16.43.0
Date : 05/05/2017
================================================================================
FIXES
-----
BASE:
- Fixed default DCB mode to AUTO.
- Fixed DCBX bugs when AUTO mode is configured in config file.
- Fixed an issue where even after removing PFC from switch, PFC wasn't getting
reset.
- Fixed DDR3/DDR4 ECC errors.
- Fixed an FLR issue where FLR completion was going to host before FLR
processing is finished in fw.
ETH:
- Fixed bug in writing multi-bytes using i2c interface.
- Fixed the link failure when optical cable is inserted into the QSA module
after loading the driver.
- Fixed false link up when peer interface was brought down.
- Enabling RS FEC by default for 100Gbase-SR4 according to 802.3BJ standard.
- Fixed bugs related to negotiated fec based local/peer fec ability and request.
- Fixed auto-neg failure with few switches.
- T6 Performance improvement fixes.
OFLD
- Fixed an extra credit issue if FW_RI_TYPE_FINI is delayed in fw due to
backpressure.
- Added a new queue type FW_IQ_TYPE_VF_CQ to handle the FW_PARAMS_PARAM_DMAQ*
commands. queue type will be part of the FW_PARAMS_PARAM_DMAQ_IQ_INTIDX
value. Used in guest RDMA (RDMA from VM/VF) usecase.
- T6 Crypto Coprocessor mode bug fixes.
- T6 Crypto TLS-inline mode bug fixes.
ENHANCEMENTS
------------
BASE:
- Added new API FW_PARAM_PARAM_DEV_MPSBGMAP to read the priority to buffer
group mapping for the ports.
ETH:
- Added broadcom consortium next page support for 25G CR.
This can be enabled using flags=an_brcm option in the t6-config.txt file.
- Added spider mode support.
- Added support for 10G-BaseT converter sfp+ module.
- Added support for additional 25G/100G cables.
- Added support to enable/disable auto-neg using ethtool.
================================================================================
Version : 1.16.33.0
Date : 02/24/2017
================================================================================
Fixes
-----
BASE:
- Fixed DDR4 uncorrectable errors.
ETH:
- Enabled link auto negotiation (AN) by default in config file.
- Added AN and FEC control api. Host driver and application can enable/disable
AN and FEC.
ENHANCEMENTS
------------
BASE:
- Enabled High priorty filter.
- Added T6425 adapter support.
ETH:
- Added new workrequest ETH_TX_PKTS2_WR (see fw api document for more details).
================================================================================
Version : 1.16.29.0
Date : 01/27/2017
================================================================================
FIXES
-----
BASE:
- Set multiple fec values only if AN is enabled in config file and when module
is connected.
- Fixed intermittent DDR3/4 ECC errors.
- max number of ethctrl queue in VF set to 2 (reverted the last change
because it causes problem in VF drivers).
ETH:
- Made devlog more verbose by printing cable information in redable form.
- Updated AN settings to work with more 25G/100G switches.
- Added support for more SFP28/QSFP28 cables.
- Fixed an issue of link going down after few hours of idle time.
OFLD:
- Fixed an issue in TLS which was causing fw crash on running TLS traffic.
FOiSCSI:
- Fixed the failure of PXE boot OS install on an iscsi lun.
ENHANCEMENTS
------------
OFLD:
- Added filtering support for NAT. New WR FW_FILTER2_WR and
FW_PARAMS_PARAM_DEV_FILTER2_WR added for the same.
- Added RDMA guest mode (mode 3 or RDMA from VF) support.
================================================================================
T5 Firmware
++++++++++++
================================================================================
Version : 1.16.63.0
Date : 09/29/2017
================================================================================
Fixes
-----
BASE:
- Fixed offload memory overcommit in case of SO adapter.
ETH:
- Fixed DCBX configuration refresh failure.
OFLD
- Fixed 0B iWARP ingress read failure.
FOiSCSI:
- Fixed vlan interface ping failure.
================================================================================
Version : 1.16.59.0
Date : 09/05/2017
================================================================================
FIXES
-----
BASE:
- Fixed an FLR issue which was causing error when VF attached VM was powered on.
ETH:
- Fixed an issue in connection traffic shaping when
FLOWC_WR->FW_FLOWC_MNEM_SCHEDCLASS is not received in first WR on the connection.
- Fixed link failure when speed is changed from 10G-1G-10G due to incorrect flag
check.
- Fixed T580 link failure with few switches which take more time for
establishing link.
ENHANCEMENTS
------------
BASE:
- Ring backbone feature added. New FW_PARAMS_PARAM_DEV_RING_BACKBONE param type
added to query and enable ring backbone support.
- Added new API FW_PARAM_PARAM_DEV_MPSBGMAP to read the priority to buffer group
mapping for the ports.
- FW_PARAMS_PARAM_DEV_TPCHMAP API added to read the port to channel mapping.
FOiSCSI:
- iSCSI Command offload target support added.
================================================================================
Version : 1.16.43.0
Date : 05/05/2017
================================================================================
FIXES
-----
BASE:
- Fixed default DCB mode to AUTO.
- Fixed DCBX bugs when AUTO mode is configured in config file.
- Fixed an issue where even after removing PFC from switch, PFC wasn't getting
reset.
ETH:
- Fixed bug in writing multi-bytes using i2c interface.
- Fixed the link failure when optical cable is inserted into the QSA module
after loading the driver.
OFLD
- Fixed an extra credit issue if FW_RI_TYPE_FINI is delayed in fw due to
backpressure.
- Added a new queue type FW_IQ_TYPE_VF_CQ to handle the FW_PARAMS_PARAM_DMAQ*
commands. queue type will be part of the FW_PARAMS_PARAM_DMAQ_IQ_INTIDX
value. Used in guest RDMA (RDMA from VM/VF) usecase.
ENHANCEMENTS
------------
BASE:
- Added new API FW_PARAM_PARAM_DEV_MPSBGMAP to read the priority to buffer
group mapping for the ports.
================================================================================
Version : 1.16.33.0
Date : 02/24/2017
================================================================================
ENHANCEMENTS
------------
ETH:
- Added new workrequest ETH_TX_PKTS2_WR (see fw api document for more details).
================================================================================
Version : 1.16.29.0
Date : 01/27/2017
================================================================================
FIXES
-----
BASE:
- max number of ethctrl queue in VF set to 2 (reverted the last change
because it causes problem in VF drivers).
FOiSCSI:
- Fixed the failure of PXE boot OS install on an iscsi lun.
ENHANCEMENTS
------------
OFLD:
- Added filtering support for NAT. New WR FW_FILTER2_WR and
FW_PARAMS_PARAM_DEV_FILTER2_WR added for the same.
- Added RDMA guest mode (mode 3 or RDMA from VF) support.
================================================================================
T4 Firmware
+++++++++++
================================================================================
Version : 1.16.63.0
Date : 09/29/2017
================================================================================
Fixes
-----
ETH:
- Fixed DCBX configuration refresh failure.
FOiSCSI:
- Fixed vlan interface ping failure.
================================================================================
Version : 1.16.59.0
Date : 09/05/2017
================================================================================
FIXES
-----
ETH:
- Fixed an issue in connection traffic shaping when
FLOWC_WR->FW_FLOWC_MNEM_SCHEDCLASS is not received in first WR on the connection.
ENHANCEMENTS
------------
BASE:
- FW_PARAMS_PARAM_DEV_TPCHMAP API added to read the port to channel mapping.
================================================================================
Version : 1.16.43.0
Date : 05/05/2017
================================================================================
FIXES
-----
BASE:
- Fixed default DCB mode to AUTO.
- Fixed DCBX bugs when AUTO mode is configured in config file.
- Fixed an issue where even after removing PFC from switch, PFC wasn't getting
reset.
ETH:
- Fixed bug in writing multi-bytes using i2c interface.
OFLD
- Fixed an extra credit issue if FW_RI_TYPE_FINI is delayed in fw due to
backpressure.
- Added a new queue type FW_IQ_TYPE_VF_CQ to handle the FW_PARAMS_PARAM_DMAQ*
commands. queue type will be part of the FW_PARAMS_PARAM_DMAQ_IQ_INTIDX
value. Used in guest RDMA (RDMA from VM/VF) usecase.
ENHANCEMENTS
------------
BASE:
- Added new API FW_PARAM_PARAM_DEV_MPSBGMAP to read the priority to buffer
group mapping for the ports.
Obtained from: Chelsio Communications
MFC after: 2 weeks
Sponsored by: Chelsio Communications
Make armv7 as a new MACHINE_ARCH.
Copy all the places we do armv6 and add armv7 as basically an
alias. clang appears to generate code for armv7 by default. armv7 hard
float isn't supported by the the in-tree gcc, so it hasn't been
updated to have a new default.
Support armv7 as a new valid MACHINE_ARCH (and by extension
TARGET_ARCH).
Add armv7 to the universe build.
Differential Revision: https://reviews.freebsd.org/D12010
machine independent parts of the existing code to a new file that can be
shared between amd64 and arm64.
Reviewed by: kib (previous version), imp
Sponsored by: DARPA, AFRL
Differential Revision: https://reviews.freebsd.org/D12434
7431 ZFS Channel Programs
illumos/illumos-gate@dfc115332cdfc115332chttps://www.illumos.org/issues/7431
ZFS channel programs (ZCP) adds support for performing compound ZFS
administrative actions via Lua scripts in a sandboxed environment (with time
and memory limits).
This initial commit includes both base support for running ZCP scripts, and a
small initial library of API calls which support getting properties and
listing, destroying, and promoting datasets.
Testing: in addition to the included unit tests, channel programs have been in
use at Delphix for several months for batch destroying filesystems. The
dsl_destroy_snaps_nvl() call has also been replaced with
Reviewed by: Matthew Ahrens <mahrens@delphix.com>
Reviewed by: George Wilson <george.wilson@delphix.com>
Reviewed by: John Kennedy <john.kennedy@delphix.com>
Reviewed by: Dan Kimmel <dan.kimmel@delphix.com>
Approved by: Garrett D'Amore <garrett@damore.org>
Author: Chris Williamson <chris.williamson@delphix.com>
8552 ZFS LUA code uses floating point math
illumos/illumos-gate@916c8d8811916c8d8811https://www.illumos.org/issues/8552
In the LUA interpreter used by "zfs program", the lua format() function
accidentally includes support for '%f' and friends, which can cause compilation
problems when building on platforms that don't support floating-point math in
the kernel (e.g. sparc). Support for '%f' friends (%f %e %E %g %G) should be
removed, since there's no way to supply a floating-point value anyway (all
numbers in ZFS LUA are int64_t's).
Reviewed by: Yuri Pankov <yuripv@gmx.com>
Reviewed by: Igor Kozhukhov <igor@dilos.org>
Approved by: Dan McDonald <danmcd@joyent.com>
Author: Matthew Ahrens <mahrens@delphix.com>
8590 memory leak in dsl_destroy_snapshots_nvl()
illumos/illumos-gate@e6ab4525d1e6ab4525d1https://www.illumos.org/issues/8590
In dsl_destroy_snapshots_nvl(), "snaps_normalized" is not freed after it is
added to "arg".
Reviewed by: Pavel Zakharov <pavel.zakharov@delphix.com>
Reviewed by: Steve Gonczi <steve.gonczi@delphix.com>
Reviewed by: George Wilson <george.wilson@delphix.com>
Approved by: Dan McDonald <danmcd@joyent.com>
Author: Matthew Ahrens <mahrens@delphix.com>
FreeBSD notes:
- zfs-program.8 manual page is taken almost as is from the vendor repository,
no FreeBSD-ification done
- fixed multiple instances of NULL being used where an integer is expected
- replaced ETIME and ECHRNG with ETIMEDOUT and EDOM respectively
This commit adds a modified version of Lua 5.2.4 under
sys/cddl/contrib/opensolaris/uts/common/fs/zfs/lua, mirroring the
upstream. See README.zfs in that directory for the description of Lua
customizations.
See zfs-program.8 on how to use the new feature.
MFC after: 5 weeks
Relnotes: yes
Differential Revision: https://reviews.freebsd.org/D12528
parser.
This allows us to use the EROM parser API in cases where the standard bus
space I/O APIs are unsuitable. In particular, this will allow us to parse
the device enumeration table directly from bhndb(4) drivers, prior to
full attach and configuration of the bridge.
Approved by: adrian (mentor)
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D12510
Some x86 class CPUs have accelerated intrinsics for SHA1 and SHA256.
Provide this functionality on CPUs that support it.
This implements CRYPTO_SHA1, CRYPTO_SHA1_HMAC, and CRYPTO_SHA2_256_HMAC.
Correctness: The cryptotest.py suite in tests/sys/opencrypto has been
enhanced to verify SHA1 and SHA256 HMAC using standard NIST test vectors.
The test passes on this driver. Additionally, jhb's cryptocheck tool has
been used to compare various random inputs against OpenSSL. This test also
passes.
Rough performance averages on AMD Ryzen 1950X (4kB buffer):
aesni: SHA1: ~8300 Mb/s SHA256: ~8000 Mb/s
cryptosoft: ~1800 Mb/s SHA256: ~1800 Mb/s
So ~4.4-4.6x speedup depending on algorithm choice. This is consistent with
the results the Linux folks saw for 4kB buffers.
The driver borrows SHA update code from sys/crypto sha1 and sha256. The
intrinsic step function comes from Intel under a 3-clause BSDL.[0] The
intel_sha_extensions_sha<foo>_intrinsic.c files were renamed and lightly
modified (added const, resolved a warning or two; included the sha_sse
header to declare the functions).
[0]: https://software.intel.com/en-us/articles/intel-sha-extensions-implementations
Reviewed by: jhb
Sponsored by: Dell EMC Isilon
Differential Revision: https://reviews.freebsd.org/D12452
other kernel infrastructure changes.
Note that this doesn't affect the base cxgb(4) NIC driver for T3 at all.
MFC after: No MFC.
Sponsored by: Chelsio Communications
This module is specific to a single Marvel board that we currently
only support in 64-bit mode. Remove it from the build otherwise. It
likely should be completely removed, but this unbreaks x86 building.
Noticed by: sbruno@
This patch adds support for UART in Armada 3700 family.
It exposes both low-level UART interface, as well as
standard driver methods.
Submitted by: Patryk Duda <pdk@semihalf.com>
Obtained from: Semihalf
Sponsored by: Semihalf
Differential Revision: https://reviews.freebsd.org/D12250
Turn on the required options in the ERL config file, and ensure
that the fbt module is listed as a dependency for mips in
the modules/dtrace/dtraceall/dtraceall.c file.
PR: 220346
Reviewed by: gnn, markj
MFC after: 2 weeks
Differential Revision: https://reviews.freebsd.org/D12227
AMD Family 17h CPUs have an internal network used to communicate between
the host CPU and the PSP and SMU coprocessors. It exposes a simple
32-bit register space.
Reviewed by: avg (no +1), mjoras, truckman
Sponsored by: Dell EMC Isilon
Differential Revision: https://reviews.freebsd.org/D12217
This driver supports both NTB-to-NTB and NTB-to-Root Port modes (though
the second with predictable complications on hot-plug and reboot events).
I tested it with PEX 8717 and PEX 8733 chips, but expect it should work
with many other compatible ones too. It supports up to two NT bridges
per chip, each of which can have up to 2 64-bit or 4 32-bit memory windows,
6 or 12 scratchpad registers and 16 doorbells. There are also 4 DMA engines
in those chips, but they are not yet supported.
While there, rename Intel NTB driver from generic ntb_hw(4) to more specific
ntb_hw_intel(4), so now it is on par with this new ntb_hw_plx(4) driver and
alike to Linux naming.
MFC after: 2 weeks
Sponsored by: iXsystems, Inc.
These firmwares come from a pre-release snapshot. The final firmwares
in this Chelsio release cycle will likely be .61.0 or later and those
will be the next "long lived" firmwares in FreeBSD head and stable
branches. .59 is being provided in head (only) for wider test exposure.
Obtained from: Chelsio Communications
Sponsored by: Chelsio Communications
Remote DMA over Converged Ethernet, RoCE, for the ConnectX-4 series of
PCI express network cards.
There is currently no user-space support and this driver only supports
kernel side non-routable RoCE V1. The krping kernel module can be used
to test this driver. Full user-space support including RoCE V2 will be
added as part of the ongoing upgrade to ibcore from Linux 4.9. Otherwise
this driver is feature equivalent to mlx4ib(4). The mlx5ib(4) kernel
module will only be built when WITH_OFED=YES is specified.
MFC after: 2 weeks
Sponsored by: Mellanox Technologies
sysctls to display stats, stats polled every 2 seconds
Modify QLA_LOCK()/QLA_UNLOCK() to not sleep after acquiring mtx_lock
Add support to turn OFF/ON error recovery following heartbeat failure for
debug purposes.
Set default max values to 32 Tx/Rx/SDS rings
MFC after:5 days
Using latest U-Boot for RPI 1 or 2 the DTB loaded by the firmware is discarded.
The DTB was previously patched by the firmware to contain the DMA channel mask.
DTB provided by the rpi firmware or DTS in the Linux tree contain the raw value
directly. Do the same for our DTS as we cannot switch to the upstream ones yet.
Not having the DMA channel mask setup properly cause mmc not to be detected
(and probably other problems on driver using DMA).
Also, add links for rpi dtb to the name used by u-boot. This way the dtb can be
loaded by ubldr using the U-Boot env variable fdtfile.
Tested On: RPI B Rev2, RPI Zero, RPI 2 v1.1 RPI 2 v1.2
Thanks to Sylvain Garrigues <sylvain@sylvaingarrigues.com> for the help.
PR: 218344
Intel SGX allows to manage isolated compartments "Enclaves" in user VA
space. Enclaves memory is part of processor reserved memory (PRM) and
always encrypted. This allows to protect user application code and data
from upper privilege levels including OS kernel.
This includes SGX driver and optional linux ioctl compatibility layer.
Intel SGX SDK for FreeBSD is also available.
Note this requires support from hardware (available since late Intel
Skylake CPUs).
Many thanks to Robert Watson for support and Konstantin Belousov
for code review.
Project wiki: https://wiki.freebsd.org/Intel_SGX.
Reviewed by: kib
Relnotes: yes
Sponsored by: DARPA, AFRL
Differential Revision: https://reviews.freebsd.org/D11113
- Add FDT probe code.
- Do i2c transfers with exclusive bus ownership.
- Use config_intrhook_oneshot() to defer chip setup because some i2c
busses can't do transfers without interrupts.
- Add a detach() routine.
- Add to module build.
This driver supports only basic timekeeping functionality. It completely
replaces the ds133x driver. It can also replace the ds1374 driver, but that
will take a few other changes in MIPS code and config, and will be committed
separately. It does NOT replace the existing ds1307 driver, which provides
access to some of the extended features on the 1307 chip, such as controlling
the square wave output signal. If both ds1307 and ds13rtc drivers are
present, the ds1307 driver will outbid and win control of the device.
This driver can be configured with FDT data, or by using hints on non-FDT
systems. In addition to the standard hints for i2c devices, it requires
a "chiptype" string of the form "dallas,ds13xx" where 'xx' is the chip id
(i.e., the same format as FDT compat strings).
TCP connections (order of tens of thousands), with predominantly Transmits.
Choice to perform receive operations either in IThread or Taskqueue Thread.
Submitted by:Vaishali.Kulkarni@cavium.com
MFC after:5 days
o Replace __riscv64 with (__riscv && __riscv_xlen == 64)
This is required to support new GCC 7.1 compiler.
This is compatible with current GCC 6.1 compiler.
RISC-V is extensible ISA and the idea here is to have built-in define
per each extension, so together with __riscv we will have some subset
of these as well (depending on -march string passed to compiler):
__riscv_compressed
__riscv_atomic
__riscv_mul
__riscv_div
__riscv_muldiv
__riscv_fdiv
__riscv_fsqrt
__riscv_float_abi_soft
__riscv_float_abi_single
__riscv_float_abi_double
__riscv_cmodel_medlow
__riscv_cmodel_medany
__riscv_cmodel_pic
__riscv_xlen
Reviewed by: ngie
Sponsored by: DARPA, AFRL
Differential Revision: https://reviews.freebsd.org/D11901
debug (cudbg) code, hooked up to the main driver via an ioctl.
The ioctl can be used to collect the chip's internal state in a
compressed dump file. These dumps can be decoded with the "view"
component of cudbg.
Obtained from: Chelsio Communications
MFC after: 2 months
Sponsored by: Chelsio Communications
