the lock instead of queueing it to a task.
- Do not invoke jme_rxintr() to reclaim any unprocessed but received
packets when shutting down the interface. Instead, just drop these
packets to match the behavior of other drivers.
- Hold the driver lock in the interrupt handler to avoid races with
ioctl requests to down the interface.
Reviewed by: yongari
controller with Card Read Host Controller. These controllers are
multi-function devices and have the same ethernet core of
JMC250/JMC260. Starting from REVFM 5(chip full mask revision)
controllers have the following features.
o eFuse support
o PCD(Packet Completion Deferring)
o More advanced PHY power saving
Because these controllers started to use eFuse, station address
modified by driver is permanent as if it was written to EEPROM. If
you have to change station address please save your controller
default address to safe place before reprogramming it. There is no
way to restore factory default station address.
Many thanks to JMicron for continuing to support FreeBSD.
HW donated by: JMicron
support multi-queue but the hardware limitation made it hard to
implement supporting multi-queue. Allocating more than necessary
vectors is resource waste and it can be added back when we
implement multi-queue support.
number of retry to be performed whenever controller found RX
descriptor was empty. RX empty interrupt is generated only when the
retry counter is over. Experimentation shows retrying RX descriptor
loading increased number of dropped frames under flow-control
enabled environments so disable it and have controller generate RX
empty interrupt as fast as it can.
While I'm here fix RXCSR_DESC_RT_CNT macro.
the NIC drivers as well as the PHY drivers to take advantage of the
mii_attach() introduced in r213878 to get rid of certain hacks. For
the most part these were:
- Artificially limiting miibus_{read,write}reg methods to certain PHY
addresses; we now let mii_attach() only probe the PHY at the desired
address(es) instead.
- PHY drivers setting MIIF_* flags based on the NIC driver they hang
off from, partly even based on grabbing and using the softc of the
parent; we now pass these flags down from the NIC to the PHY drivers
via mii_attach(). This got us rid of all such hacks except those of
brgphy() in combination with bce(4) and bge(4), which is way beyond
what can be expressed with simple flags.
While at it, I took the opportunity to change the NIC drivers to pass
up the error returned by mii_attach() (previously by mii_phy_probe())
and unify the error message used in this case where and as appropriate
as mii_attach() actually can fail for a number of reasons, not just
because of no PHY(s) being present at the expected address(es).
Reviewed by: jhb, yongari
header parser uses m_pullup(9) to get access to mbuf chain.
m_pullup(9) can allocate new mbuf chain and free old one if the
space left in the mbuf chain is not enough to hold requested
contiguous bytes. Previously drivers can use stale ip/tcp header
pointer if m_pullup(9) returned new mbuf chain.
Reported by: Andrew Boyer (aboyer <> averesystems dot com)
MFC after: 10 days
warning message and attach without setting the Ethernet address to a
random address. It is not believed that this code can actually be
executed, and if it does, we're better off printing an error message than
faking up an Ethernet address.
PR: kern/133239
Reviewed by: yongari (earlier version of patch)
Approved by: ed (mentor)
IF_ADDR_UNLOCK() across network device drivers when accessing the
per-interface multicast address list, if_multiaddrs. This will
allow us to change the locking strategy without affecting our driver
programming interface or binary interface.
For two wireless drivers, remove unnecessary locking, since they
don't actually access the multicast address list.
Approved by: re (kib)
MFC after: 6 weeks
o Chip full mask revision 2 or later controllers have to
set correct Tx MAC and Tx offload clock depending on negotiated
link speed.
o JMC260 chip full mask revision 2 has a silicon bug that can't
handle 64bit DMA addressing. Add workaround to the bug by
limiting DMA address space to be within 32bit.
o Valid FIFO space of receive control and status register was
changed on chip full mask revision 2 or later controllers. For
these controllers, use default 16QW as it's supposed to be the
safest value for maximum PCIe compatibility. JMicron confirmed
performance will not be reduced even if the FIFO space is set
to 16QW.
o When interface is put into suspend/shutdown state, remove Tx MAC
and Tx offload clock to save more power. We don't need Tx clock
at all in this state.
o Added new register definition for chip full mask revision 2 or
later controllers.
Thanks to JMicron for their continuous support of FreeBSD.
the last byte of the ethernet address was not read which in turn
resulted in getting 5 out of the 6 bytes of ethernet address and
always returned ENOENT. I did not notice the bug on FPGA version
because of additional configuration data in EEPROM.
Pointed out by: bouyer at NetBSD
device id is JMC260 family. Previously it just verified the deivce
is JMC260 Rev A0. This will make it easy for newer JMC2xx support.
Pointed out by: bouyer at NetBSD
when it runs on half-duplex media.
While I'm here add register definition for GPREG1. ATM the GPREG1
register is only valid for JMC250 A1/A2.
Submitted by: Ethan at JMicron
gigabit ethernet and JMC260 fast ethernet controllers. ATM jme(4)
supports all hardware features except RSS and multiple Tx/Rx queue.
In these days most ethernet controller vendors take a ply of
concealing hardware detailes from open source developers. As
contrasted with these vendors JMicron provided all necessary
information needed to write a stable driver during driver writing
and answered many questions I had. They even helped fixing driver
bugs with protocol analyzer. Many thanks to JMicron for their
support of FreeBSD.
H/W donated by: JMicron
