Commit Graph

614 Commits

Author SHA1 Message Date
Nathan Whitehorn
e3c2930d36 We don't need kcopy() in any of the remaining places it is used, so
remove it.

MFC after:	2 weeks
2012-04-11 22:23:50 +00:00
Nathan Whitehorn
629e40e45e Give the kernel pmap lock a different name than user pmap locks. It has
(slightly) different semantics and renaming it prevents a (harmless)
WITNESS warning during bootup for 32-bit kernels on 64-bit CPUs.

MFC after:	5 days
2012-04-06 16:00:37 +00:00
John Baldwin
1f22be4547 - Rename VM_MEMATTR_UNCACHED to VM_MEMATTR_WEAK_UNCACHEABLE on x86 to
be less ambiguous and more clearly identify what it means.  This
  attribute is what Intel refers to as UC-, and it's only difference
  relative to normal UC memory is that a WC MTRR will override a UC-
  PAT entry causing the memory to be treated as WC, whereas a UC PAT
  entry will always override the MTRR.
- Remove the VM_MEMATTR_UNCACHED alias from powerpc.
2012-03-29 16:51:22 +00:00
Nathan Whitehorn
13b5e92e01 Allow multiple inclusion of trap.h. This has always been broken, but
until recently never caused problems.
2012-03-29 02:02:14 +00:00
Fabien Thomas
f5f9340b98 Add software PMC support.
New kernel events can be added at various location for sampling or counting.
This will for example allow easy system profiling whatever the processor is
with known tools like pmcstat(8).

Simultaneous usage of software PMC and hardware PMC is possible, for example
looking at the lock acquire failure, page fault while sampling on
instructions.

Sponsored by: NETASQ
MFC after:	1 month
2012-03-28 20:58:30 +00:00
Dimitry Andric
63d094a7e2 Add casts to __uint16_t to the __bswap16() macros on all arches which
didn't already have them.  This is because the ternary expression will
return int, due to the Usual Arithmetic Conversions.  Such casts are not
needed for the 32 and 64 bit variants.

While here, add additional parentheses around the x86 variant, to
protect against unintended consequences.

MFC after:	2 weeks
2012-03-09 20:34:31 +00:00
Andreas Tobler
d59a23dc09 Restore proper dot symbol creation for assembly files in the kernel build case.
Without this patch we were not able to see the assembly function.
Only the function descriptor was visible.

- Distinguish between user-land and kernel when creating the ENTRY() point of
  assembly source.
- Make the ENTRY() macro more readable, replace the .align directive with the
  gas platform independant .p2align directive.
- Create an END()macro for later use to provide traceback tables on powerpc64.
2012-03-04 11:55:28 +00:00
Andreas Tobler
54558cdc0e Replace the assembler macro WEAK_ALIAS with a new macro WEAK_REFERENCE which
has the same API as __weak_reference(). Give 'x' in SYS.h a more meaningful
name.

Tested on 32- and 64-bit PowerMac.

Reviewed by:	bde
2012-02-05 20:04:43 +00:00
David Schultz
2ee7b1d4ae Add C11 macros describing subnormal numbers to float.h.
Reviewed by:	bde
2012-01-23 06:36:41 +00:00
Andreas Tobler
9eab2f146a This commit adds profiling support for powerpc64. Now we can do application
profiling and kernel profiling. To enable kernel profiling one has to build
kgmon(8). I will enable the build once I managed to build and test powerpc
(32-bit) kernels with profiling support.

- add a powerpc64 PROF_PROLOGUE for _mcount.
- add macros to avoid adding the PROF_PROLOGUE in certain assembly entries.
- apply these macros where needed.
- add size information to the MCOUNT function.

MFC after:	3 weeks, together with r230291
2012-01-20 22:34:19 +00:00
David Schultz
9fa03ecd01 Add parentheses where required. Without them, `sizeof LDBL_MAX'
is a syntax error and shouldn't be, while `1 FLT_ROUNDS' isn't a
syntax error and should be.  Thanks to bde for the examples.
2012-01-20 06:51:41 +00:00
David Schultz
cb659153f9 Fix the value of float_t to match what is implied by FLT_EVAL_METHOD. 2012-01-16 20:17:51 +00:00
David Schultz
b3088c8315 Change the definition of FLT_EVAL_METHOD from 1 to 0. A value of 1 implies
that the compiler promotes floats to double precision in computations, but
inspection of the output of a cross-compiler indicates that this isn't the
case on powerpc.
2012-01-16 20:17:29 +00:00
Nathan Whitehorn
ae09ab8f63 Rework SLB trap handling so that double-faults into an SLB trap handler are
possible, and double faults within an SLB trap handler are not. The result
is that it possible to take an SLB fault at any time, on any address, for
any reason, at any point in the kernel.

This lets us do two important things. First, it removes the (soft) 16 GB RAM
ceiling on PPC64 as well as any architectural limitations on KVA space.
Second, it lets the kernel tolerate poorly designed hypervisors that
have a tendency to fail to restore the SLB properly after a hypervisor
context switch.

MFC after:	6 weeks
2012-01-15 00:08:14 +00:00
Andreas Tobler
54c699c4cc Introduce internal macros for __U/INT64_C to define the U/INT64_MAX/MIN
values properly. The previous definition only worked if __STDC_LIMIT_MACROS
and __STDC_CONSTANT_MACROS were defined at the same time.
2012-01-04 16:02:52 +00:00
Justin Hibbits
7b25dcca76 Implement hwpmc counting PMC support for PowerPC G4+ (MPC745x/MPC744x).
Sampling is in progress.

Approved by:	nwhitehorn (mentor)
MFC after:	9.0-RELEASE
2011-12-24 19:34:52 +00:00
Ed Schouten
53627e400f Replace __signed by signed.
The signed keyword is an integral part of the C syntax. There's no need
to use __signed.
2011-12-13 13:38:03 +00:00
Nathan Whitehorn
9932a3fefc Increase the available virtual address space for user programs on PowerPC
AIM systems to 4 GB on 32-bit systems and 2^64 bytes on 64-bit systems.
VM_MAXUSER_ADDRESS remains at 2 GB on pending Book-E, pending review of
an increase to 3 GB by those more familiar with Book-E.
2011-12-11 17:23:03 +00:00
Nathan Whitehorn
598d99ddee Keep track of PVO entries in each pmap, which allows much faster
pmap_remove() for large sparse requests. This can prevent pmap_remove()
operations on 64-bit process destruction or swapout that would take
several hundred times the lifetime of the universe to complete. This
behavior is largely indistinguishable from a hang.
2011-12-11 17:19:48 +00:00
Nathan Whitehorn
a897298940 Use a global __pure2 function instead of a global register variable for
curthread, like on x86 and sparc64. This makes the kernel somewhat more
clang friendly, which doesn't support global register variables.
2011-11-17 15:49:42 +00:00
David Schultz
a50079b7ff People porting FreeBSD to new architectures ought not have to
implement a deprecated FPU control interface in addition to the
standard one.  To make this clearer, further deprecate ieeefp.h
by not declaring the function prototypes except on architectures
that implement them already.

Currently i386 and amd64 implement the ieeefp.h interface for
compatibility, and for fp[gs]etprec(), which doesn't exist on
most other hardware.  Powerpc, sparc64, and ia64 partially implement
it and probably shouldn't, and other architectures don't implement it
at all.
2011-10-21 06:41:46 +00:00
Konstantin Belousov
6bfe4c78c8 Remove unused define.
MFC after:	1 month
2011-10-07 16:09:44 +00:00
Konstantin Belousov
d98d0ce27a - Move the PG_UNMANAGED flag from m->flags to m->oflags, renaming the flag
to VPO_UNMANAGED (and also making the flag protected by the vm object
  lock, instead of vm page queue lock).
- Mark the fake pages with both PG_FICTITIOUS (as it is now) and
  VPO_UNMANAGED. As a consequence, pmap code now can use use just
  VPO_UNMANAGED to decide whether the page is unmanaged.

Reviewed by:	alc
Tested by:	pho (x86, previous version), marius (sparc64),
    marcel (arm, ia64, powerpc), ray (mips)
Sponsored by:	The FreeBSD Foundation
Approved by:	re (bz)
2011-08-09 21:01:36 +00:00
Attilio Rao
68b739cd6f Add the possibility to specify from kernel configs MAXCPU value.
This patch is going to help in cases like mips flavours where you
want a more granular support on MAXCPU.

No MFC is previewed for this patch.

Tested by:	pluknet
Approved by:	re (kib)
2011-07-19 00:37:24 +00:00
Nathan Whitehorn
e69dff491d Use the ABI-mandated thread pointer register (r2 for ppc32, r13 for ppc64)
instead of a PCPU field for curthread. This averts a race on SMP systems
with a high interrupt rate where the thread looking up the value of
curthread could be preempted and migrated between obtaining the PCPU
pointer and reading the value of pc_curthread, resulting in curthread being
observed to be the current thread on the thread's original CPU. This played
merry havoc with the system, in particular with mutexes. Many thanks to
jhb for helping me work this one out.

Note that Book-E is in principle susceptible to the same problem, but has
not been modified yet due to lack of Book-E hardware.

MFC after:	2 weeks
2011-06-23 22:21:28 +00:00
Attilio Rao
d7073a2b3b MFC 2011-06-03 17:09:15 +00:00
Nathan Whitehorn
17763042e4 The POWER7 has only 32 SLB slots instead of 64, like other supported
64-bit PowerPC CPUs. Add infrastructure to support variable numbers of
SLB slots and move the user slot from 63 to 0, so that it is always
available.
2011-06-02 14:25:52 +00:00
Nathan Whitehorn
1787909001 MFpseries:
Renovate and improve the AIM Open Firmware support:
- Add RTAS (Run-Time Abstraction Services) support, found on all IBM systems
  and some Apple ones
- Improve support for 32-bit real mode Open Firmware systems
- Pull some more OF bits over from the AIM directory
- Fix memory detection on IBM LPARs and systems with more than one /memory
  node (by andreast@)
2011-06-02 14:12:37 +00:00
Attilio Rao
c7df91af4b MFC 2011-05-29 00:59:38 +00:00
Marcel Moolenaar
5f94931e7d The P4080 has 8 cores. Bump MAXCPU to 8 to match. 2011-05-29 00:40:59 +00:00
Marcel Moolenaar
ebfbeb83f6 o Add system versions for the P4040(E) and P4080(E).
o   In bare_probe(), change the logic that determines the maximum
    number of processors/cores into a switch statement and take
    advantage of the fact that bit 3 of the SVR value indicates
    whether we're running on a security enabled version. Since we
    don't care about that here, mask the bit. All -E versions
    are taken care of automatically.
2011-05-29 00:27:42 +00:00
Attilio Rao
9cb46334ee MFC 2011-05-27 16:09:10 +00:00
Marcel Moolenaar
df697aa015 o Swap the SVR numbers for MPC8533 & MPC8533E
o   Add SVR defines for P1011(E), P1020(E), P2010(E) & P2020(E)
2011-05-27 05:58:10 +00:00
Attilio Rao
dc6dc1f573 Merge r221614,221696,221737,221840 from largeSMP project branch:
Rewrite atomic operations for powerpc in order to achieve the following:
- Produce a type-clean implementation (in terms of functions arguments
  and returned values) for the primitives.
- Fix errors with _long() atomics where they ended up with the wrong
  arguments to be accepted.
- Follow the sys/type.h specifics that define the numbered types starting
  from standard C types.
- Let _ptr() version to not auto-magically cast arguments, but leave
  the burden on callers, as _ptr() atomic is intended to be used
  relatively rarely.

Fix cfi in order to support the latest point.

In collabouration with:	bde
Tested by:		andreast, nwhitehorn, jceel
MFC after:		2 weeks
2011-05-22 20:55:54 +00:00
Attilio Rao
b2aa562e7b MFC 2011-05-13 20:58:48 +00:00
Matthew D Fleming
cfb00e5aa7 Move the ZERO_REGION_SIZE to a machine-dependent file, as on many
architectures (i386, for example) the virtual memory space may be
constrained enough that 2MB is a large chunk.  Use 64K for arches
other than amd64 and ia64, with special handling for sparc64 due to
differing hardware.

Also commit the comment changes to kmem_init_zero_region() that I
missed due to not saving the file.  (Darn the unfamiliar development
environment).

Arch maintainers, please feel free to adjust ZERO_REGION_SIZE as you
see fit.

Requested by:	alc
MFC after:	1 week
MFC with:	r221853
2011-05-13 19:35:01 +00:00
Attilio Rao
6f8ca31360 Remove strict-aliasing fixup where it is easy to avoid that as it leads to
a faster implementation.

Requested by:	bde
2011-05-10 13:59:33 +00:00
Attilio Rao
c47dd3db8c Add the powerpc support.
Note that there is a dirty hack for calling openpic_write(), but
nwhitehorn approved it.

Discussed with:	nwhitehorn
2011-05-09 16:16:15 +00:00
Attilio Rao
1fcdd308be - Introduce stubs for type-pun from long to int
- Don't auto-cast _ptr operations as initially they were intended to
  be used rarely and consumers had to cast on their own.

Reported by:	bde, andreast
2011-05-09 15:59:34 +00:00
Attilio Rao
9137d17cd9 All architectures define the size-bounded types (uint32_t, uint64_t, etc.)
starting from base C types (int, long, etc).
That is also reflected when building atomic operations, as the
size-bounded types are built from the base C types.

However, powerpc does the inverse thing, leading to a serie of nasty
bugs.
Cleanup the atomic implementation by defining as base the base C type
version and depending on them, appropriately.

Tested by:	jceel
2011-05-08 00:39:49 +00:00
Andreas Tobler
1706df7cfa Remove duplicate definition of FIRSTARG.
Approved by:	nwhitehorn (mentor)
2011-03-17 19:44:00 +00:00
Nathan Whitehorn
79c77d726e Turn off default generation of userland dot symbols on powerpc64 now that
we have a binutils that supports it. Kernel dot symbols remain on to assist
DDB.
2011-02-18 21:44:53 +00:00
Alan Cox
e6ffa21488 Remove pmap fields that are either unused or not fully implemented.
Discussed with:	kib
2011-02-17 15:36:29 +00:00
Marcel Moolenaar
607ebaaf0c Rename INTR_VEC to MAP_IRQ. From the OFW or FDT we obtain a
PIC handle with interrupt pin. This we map to the resource
called SYS_RES_IRQ.
2011-02-02 05:58:51 +00:00
Marcel Moolenaar
6d2d7b8c0d Fix the interrupt code, broken 7 months ago. The interrupt framework
already supported nested PICs, but was limited to having a nested
AT-PIC only. With G5 support the need for nested OpenPIC controllers
needed to be added. This was done the wrong way and broke the MPC8555
eval system in the process.

OFW, as well as FDT, describe the interrupt routing in terms of a
controller and an interrupt pin on it. This needs to be mapped to a
flat and global resource: the IRQ. The IRQ is the same as the PCI
intline and as such needs to be representable in 8 bits. Secondly,
ISA support pretty much dictates that IRQ 0-15 should be reserved
for ISA interrupts, because of the internal workins of south bridges.
Both were broken.

This change reverts revision 209298 for a big part and re-implements
it simpler. In particular:
o   The id() method of the PIC I/F is removed again. It's not needed.
o   The openpic_attach() function has been changed to take the OFW
    or FDT phandle of the controller as a second argument. All bus
    attachments that previously used openpic_attach() as the attach
    method of the device I/F now implement as bus-specific method
    and pass the phandle_t to the renamed openpic_attach().
o   Change powerpc_register_pic() to take a few more arguments. In
    particular:
    -   Pass the number of IPIs specificly. The number of IRQs carved
	out for a PIC is the sum of the number of int. pins and IPIs.
    -   Pass a flag indicating whether the PIC is an AT-PIC or not.
	This tells the interrupt framework whether to assign IRQ 0-15
	or some other range.
o   Until we implement proper multi-pass bus enumeration, we have to
    handle the case where we need to map from PIC+pin to IRQ *before*
    the PIC gets registered. This is done in a similar way as before,
    but rather than carving out 256 IRQs per PIC, we carve out 128
    IRQs (124 pins + 4 IPIs). This is supposed to handle the G5 case,
    but should really be fixed properly using multiple passes.
o   Have the interrupt framework set root_pic in most cases and not
    put that burden in PIC drivers (for the most part).
o   Remove powerpc_ign_lookup() and replace it with powerpc_get_irq().
    Remove IGN_SHIFT, INTR_INTLINE and INTR_IGN.

Related to the above, fix the Freescale PCI controller driver, broken
by the FDT code. Besides not attaching properly, bus numbers were
assigned improperly and enumeration was broken in general. This
prevented the AT PIC from being discovered and interrupt routing to
work properly. Consequently, the ata(4) controller stopped functioning.

Fix the driver, and FDT PCI support, enough to get the MPC8555CDS
going again. The FDT PCI code needs a whole lot more work.

No breakages are expected, but lackiong G5 hardware, it's possible
that there are unpleasant side-effects. At least MPC85xx support is
back to where it was 7 months ago -- it's amazing how badly support
can be broken in just 7 months...

Sponsored by: Juniper Networks
2011-01-29 20:58:38 +00:00
Marcel Moolenaar
2af3fc178e Introduce macro FDT_MAP_IRQ to map from an interrupt controller and
interrupt pin pair to a global IRQ number. When multiple PICs exist
on a board, the interrupt pin alone is not unique.
2011-01-29 20:25:20 +00:00
Jung-uk Kim
2fea643112 Add reader/writer lock around mem_range_attr_get() and mem_range_attr_set().
Compile sys/dev/mem/memutil.c for all supported platforms and remove now
unnecessary dev_mem_md_init().  Consistently define mem_range_softc from
mem.c for all platforms.  Add missing #include guards for machine/memdev.h
and sys/memrange.h.  Clean up some nearby style(9) nits.

MFC after:	1 month
2011-01-17 22:58:28 +00:00
Marcel Moolenaar
951f1334b6 Don't redefine MODINFOMD_BOOTINFO as MODINFOMD_DTBP. This
breaks support for older loaders. Add MODINFOMD_DTBP as
a new tag instead.
2011-01-15 20:18:08 +00:00
Konstantin Belousov
640c77e126 Enable shared page for the signal trampolines on PowerPC.
Reviewed and tested by:	nwhitehorn
2011-01-14 11:36:44 +00:00
Nathan Whitehorn
ff30eecffe Fix handling of NX pages on capable CPUs. Thanks to kib for prodding me
in the right direction.
2011-01-13 04:37:48 +00:00