On BHND MIPS SoCs, this replaces the use of hard-coded MIPS IRQ#s in the
common bhnd(4) core drivers; we now register an INTRNG child PIC that
handles routing of backplane interrupt vectors via the MIPS core.
On BHND PCI devices, backplane interrupt vectors are now routed to the
PCI/PCIe host bridge core when bus_setup_intr() is called, where they are
dispatched by the PCI core via a host interrupt (e.g. INTx/MSI).
The bhndb(4) bridge driver tracks registered interrupt handlers for the
bridged bhnd(4) devices and manages backplane interrupt routing, while
delegating actual bus interrupt setup/teardown to the parent bus on behalf
of the bridged cores.
Approved by: adrian (mentor, implicit)
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D12518
Add bhnd(4) API for explicitly registering BHND platform devices (ChipCommon,
PMU, NVRAM, etc) with the bus, rather than walking the newbus hierarchy to
discover platform devices. These devices are now also refcounted; attempting
to deregister an actively used platform device will return EBUSY.
This resolves a lock ordering incompatibility with bwn(4)'s firmware loading
threads; previously it was necessary to acquire Giant to protect newbus access
when locating and querying the NVRAM device.
Approved by: adrian (mentor)
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D12392
- Fix typo of PLL Type 4
- Don't panic of frequency getters
Submitted by: Hiroki Mori <yamori813@yahoo.co.jp>
Differential Revision: https://reviews.freebsd.org/D10967
This patch fixes typo which results in extra bits of PMU control register.
PR: 217782
Submitted by: Svyatoslav <razmyslov at viva64.com>
Found by: PVS-Studio
with geom_flashmap(4) and teach it about MMC for slicing enhanced
user data area partitions. The FDT slicer still is the default for
CFI, NAND and SPI flash on FDT-enabled platforms.
- In addition to a device_t, also pass the name of the GEOM provider
in question to the slicers as a single device may provide more than
provider.
- Build a geom_flashmap.ko.
- Use MODULE_VERSION() so other modules can depend on geom_flashmap(4).
- Remove redundant/superfluous GEOM routines that either do nothing
or provide/just call default GEOM (slice) functionality.
- Trim/adjust includes
Submitted by: jhibbits (RouterBoard bits)
Reviewed by: jhibbits
When detaching device trees parent devices must be detached prior to
detaching its children. This is because parent devices can have
pointers to the child devices in their softcs which are not
invalidated by device_delete_child(). This can cause use after free
issues and panic().
Device drivers implementing trees, must ensure its detach function
detaches or deletes all its children before returning.
While at it remove now redundant device_detach() calls before
device_delete_child() and device_delete_children(), mostly in
the USB controller drivers.
Tested by: Jan Henrik Sylvester <me@janh.de>
Reviewed by: jhb
Differential Revision: https://reviews.freebsd.org/D8070
MFC after: 2 weeks
- Added bhnd(4) bus APIs for per-core ioctl/iost register access.
- Updated reset/suspend bhnd(4) APIs for compatibility with ioctl/iost
changes.
- Implemented core reset/suspend support for both bcma(4) and siba(4).
- Implemented explicit release of all outstanding PMU requests at the bus
level when putting a core into reset.
Approved by: adrian (mentor, implicit)
Differential Revision: https://reviews.freebsd.org/D8009
In r304870, refcount handling was lifted out into a common OTP/SPROM code
path, but the refcount assertions in chipc_disable_sprom_pins() were not
updated accordingly; this triggered an assertion on BCM4331 devices when
releasing a SPROM pin reservation.
Approved by: adrian (mentor, implicit)
This adds bhnd(4) bus-level support for querying backplane interrupt vector
routing, and delegating machine/bridge-specific interrupt handling to the
concrete bhnd(4) driver implementation.
On bhndb(4) bridged PCI devices, we provide the PCI/MSI interrupt directly
to attached cores.
On MIPS devices, we report a backplane interrupt count of 0, effectively
disabling the bus-level interrupt assignment. This allows mips/broadcom
to temporarily continue using hard-coded MIPS IRQs until bhnd_mips PIC
support is implemented.
Reviewed by: mizhka
Approved by: adrian (mentor, implicit)
This patch adds driver implementation for BHND USB core. Driver has been
imported from ZRouter project with small adaptions for FreeBSD 11.
Also it's enabled for BroadCom MIPS74k boards by default. It's fully tested
on Asus boards (RT-N16: external USB, RT-N53: USB bus between SoC and WiFi
chips).
Reviewed by: adrian (mentor), ray
Approved by: adrian (mentor)
Obtained from: ZRouter
Differential Revision: https://reviews.freebsd.org/D7781
Adds support for probing and initializing bhndb(4) bridge state using
the bhnd_erom API, ensuring that full bridge configuration is available
*prior* to actually attaching and enumerating the bhnd(4) child device,
allowing us to safely allocate bus-level agent/device resources during
bhnd(4) bus enumeration.
- Add a bhnd_erom_probe() method usable by bhndb(4). This is an analogue
to the existing bhnd_erom_probe_static() method, and allows the bhndb
bridge to discover the best available erom parser class prior to newbus
probing of its children.
- Add support for supplying identification hints when probing erom
devices. This is required on early EXTIF-only chipsets, where chip
identification registers are not available.
- Migrate bhndb over to the new bhnd_erom API, using bhnd_core_info
records rather than bridged bhnd(4) device_t references to determine
the bridged chipsets' capability/bridge configuration.
- The bhndb parent (e.g. if_bwn) is now required to supply a hardware
priority table to the bridge. The default table is currently sufficient
for our supported devices.
- Drop the two-pass attach approach we used for compatibility with bhndb(4) in
the bhnd(4) bus drivers, and instead perform bus enumeration immediately,
and allocate bridged per-child bus-level resources during that enumeration.
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D7768
The purpose of BHND_PMU_{GET,SET}_BITS macro is to transform values from/into
register format. SET macro shifts value to left and applies filter mask.
GET macro applies filter mask and then shifts value to right.
Reviewed by: landonf, adrian (mentor)
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D7721
handling.
- Extended PWRCTL/PMU APIs to support querying clock frequency during very
early boot, prior to bus attach.
- Implement generic PMU-based calculation of UART rclk values.
- Replaced use of static frequency tables (bcm_socinfo) with
runtime-determined values.
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D7552
- Added bhnd_pmu driver implementations for PMU and PWRCTL chipsets,
derived from Broadcom's ISC-licensed HND code.
- Added bhnd bus-level support for routing per-core clock and resource
power requests to the PMU device.
- Lift ChipCommon support out into the bhnd module, dropping
bhnd_chipc.
Reviewed by: mizhka
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D7492
This adds support for performing platform_reset() on all supported
devices, using early boot enumeration of chipc capabilities and
available cores.
- Added Broadcom-specific MIPS CP0 register definitions used by
BCM4785-specific reset handling.
- Added a bcm_platform structure for tracking chipc/pmu/cfe platform
data.
- Extended the BCMA EROM API to support early boot lookup of core info
(including port/region mappings).
- Extended platform_reset() to support PMU, PMU+AOB, and non-PMU
devices.
Reviewed by: mizhka
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D7539
- Added a generic bhnd_nvram_parser API, with support for the TLV format
used on WGT634U devices, the standard BCM NVRAM format used on most
modern devices, and the "board text file" format used on some hardware
to supply external NVRAM data at runtime (e.g. via an EFI variable).
- Extended the bhnd_bus_if and bhnd_nvram_if interfaces to support both
string-based and primitive data type variable access, required for
common behavior across both SPROM and NVRAM data sources.
- Extended the existing SPROM implementation to support the new
string-based NVRAM APIs.
- Added an abstract bhnd_nvram driver, implementing the bhnd_nvram_if
atop the bhnd_nvram_parser API.
- Added a CFE-based bhnd_nvram driver to provide read-only access to
NVRAM data on MIPS SoCs, pending implementation of a flash-aware
bhnd_nvram driver.
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D7489
Replaces use of DEVICE_IDENTIFY with explicit enumeration of chipc
child devices using the chipc capability structure.
This is a precursor to PMU support, which requires more complex resource
assignment handling than achievable with the static device name-based
hints table.
Reviewed by: Michael Zhilin <mizkha@gmail.com> (Broadcom MIPS support)
Approved by: re (gjb), adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D6896
- Delete all chipc children on attachment failure.
- Added missing bhnd_nexus bhnd_bus_deactivate_resource implementation.
- Drop a CHIPC_UNLOCK() accidentally left behind after lifting
synchronization into the chipc region refcounting API.
- Fix re-allocation of chipc resources. Previously, the resource ID was
reset to -1 on release, preventing later re-allocation.
Approved by: re (gjb), adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D6849
Add support for fetching SPROM data from OTP on chipsets with an
IPX OTP controller (including the BCM43225).
This integrates the NVRAM data source into the chipc_caps capability
structure, and adds a sprom_offset field that can be used with OTP
to locate the SPROM image data (found within the general use
region, H/W subregion).
This also removes one of two duplicate parse error messages reported by
both the bhnd_sprom driver and the underlying SPROM parsing API.
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D6729
This adds support for serial (via SPI) and parallel (via CFI) flash
as found on BCM47xx/BCM53xx SoCs.
Submitted by: Michael Zhilin <mizhka@gmail.com>
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D6250
- Correct IRQ lines for UART (to fix IRQ lookup in future)
- Check device unit in resource assignment during chipc_add_child
- If chipc hint->size is RM_MAX_END, resource end should be same as window end
- Clear reference from resource list entry to resource in case of resource release
- Add CHIPC_GET_CAPS implementation
- Correct chipc flash constants (to be unshifted)
- Default implementation of get_attach_type should iterate over device tree
- Add default implementation for BHND_CHIPC_GET_CAPS usable by chipc grandchildren
Submitted by: Michael Zhilin <mizhka@gmail.com>
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D6584
This was triggering a panic on detach; the SPROM shadow is now
maintained by the bhnd_sprom_chipc driver, and should be removed
from chipc.
Submitted by: Landon Fuller <landonf@landonf.org>
Differential Revision: https://reviews.freebsd.org/D6548
This adds support for automatically configuring bhnd_chipc bus children
with associated resources, using an internal 'hints' table based directly
on Michael Zhilin's chipc resource mapping work.
The bhnd_sprom_chipc driver has been converted to use DEVICE_IDENTIFY()
with the new resource table.
This should be nearly drop-in compatible with the child device drivers
in D6250.
Submitted by: Landon Fuller <landonf@landonf.org>
Reviewed by: Michael Zhilin <mizhka@gmail.com>
Differential Revision: https://reviews.freebsd.org/D6525
This unifies handling of core, chip, and board-level device
matching, and adds support for matching device drivers
against the bus attach type (e.g. SoC vs WiFi adapter).
Core-level quirks on Broadcom's chipsets generally are specific
to some combination of chip model, core revision, chip
package (e.g. 12x9 SMT package), SROM revision, etc.
Unifying the match APIs for all three attribute types (core, chip,
board/srom) allows defining a single device quirk table that
matches across all of those attributes.
Submitted by: Landon Fuller <landonf@landonf.org>
Differential Revision: https://reviews.freebsd.org/D6515
This patchset adds support to bhnd_chipc for sharing SYS_RES_MEMORY
resources with its children, allowing us to hang devices off of
bhnd_chipc that rely on access to a subset of the device register space
that bhnd_chipc itself must also allocate.
We could avoid most of this heavy lifting if RF_SHAREABLE+SYS_RES_MEMORY
wasn't limited to use with allocations at the same size/offset.
As a work-around, I implemented something similar to vga_pci.c, which
implements similar reference counting of of PCI BAR resources for its
children.
With these changes, chipc will use reference counting of SYS_RES_MEMORY
allocation/activation requests, to decide when to allocate/activate/
deactivate/release resources from the parent bhnd(4) bus.
The requesting child device is allocated a new resource from chipc's
rman, pointing to (possibly a subregion of) the refcounted bhnd resources
allocated by chipc.
Other resource types are just passed directly to the parent bhnd bus;
RF_SHAREABLE works just fine with IRQs.
I also lifted the SPROM device code out into a common driver, since this
now allows me to hang simple subclasses off of a common driver off of both
bhndb_pci and bhnd_chipc.
Tested:
* (landonf) Tested against BCM4331 and BCM4312, confirmed that SPROM still
attaches and can be queried.
Submitted by: Landon Fuller <landonf@landonf.org>
Reviewed by: mizkha@gmail.com
Differential Revision: https://reviews.freebsd.org/D6471
Now that we've got access to SPROM and can access board identification,
this implements all known remaining hardware work-arounds for the bhnd(4)
PCI and PCIe-G1 cores operating endpoint mode.
Additionally, this adds an initial set of skeleton PCIe-G2 hostb and pcib
drivers, required by fullmac and newer softmac devices.
Submitted by: Landon Fuller <landonf@landonf.org>
Differential Revision: https://reviews.freebsd.org/D6377
Centralizes fetching of board information (vendor, type, revision, etc),
and adds support for matching quirks against board identification info.
* Adds a BHND_BUS_READ_BOARD_INFO(), allowing bhnd bus/bus parent(s) to
handle implementation-specific fetching of board info.
* Integrates board type constants from the latest Broadcom ISC-licensed
bcmdevs.h included in dd-wrt's Broadcom driver source drops.
* Adds support for matching on chip/board quirks to bhnd_device_quirks()/
bhnd_chip_quirks().
* Use the new board/chip quirk matching to match Apple devices that failed
to set BFL2_PCIEWAR_OVR in SROM.
Submitted by: Landon Fuller <landonf@landonf.org>
Differential Revision: https://reviews.freebsd.org/D6361
This adds support for the NVRAM handling and the basic SPROM
hardware used on siba(4) and bcma(4) devices, including:
* SPROM directly attached to the PCI core, accessible via PCI configuration
space.
* SPROM attached to later ChipCommon cores.
* SPROM variables vended from the parent SoC bus (e.g. via a directly-attached
flash device).
Additional improvements to the NVRAM/SPROM interface will
be required, but this changeset stands alone as working
checkpoint.
Submitted by: Landon Fuller <landonf@landonf.org>
Reviewed by: Michael Zhilin <mizkha@gmail.com> (Broadcom MIPS support)
Differential Revision: https://reviews.freebsd.org/D6196
ChipCommon probing uses mapping table "chipc_devices". It calls bhnd_device_lookup,
which iterate over mapping table with end condition:
entry->desc != NULL
So if mapping table contains row with description equals to NULL, it will
stop processing of mapping. I.e. description is mandatory field and should
be not NULL.
This patch corrects mapping table for ChipCommon.
Submitted by: Michael Zhilin <mizhka@gmail.com>
Differential Revision: https://reviews.freebsd.org/D6088
This extracts common code from bhndb_pci, bhnd_pcib, and bhnd_pci_hostb into a
simpler shared bhnd_pci base driver, and should enable SoC-side implementation
of bhnd_pcib root complex support.
Submitted by: Landon Fuller <landonf@landonf.org>
Differential Revision: https://reviews.freebsd.org/D5763
This add a bhnd device table mechanism that standardizes matching of
devices on the bhnd(4) bus, discovery of device quirk flags, and should
be pluggable into the new PNPINFO machinery.
Submitted by: Landon Fuller <landonf@landonf.org>
Differential Revision: https://reviews.freebsd.org/D5759
SoCs and various chips (including, famously, their wifi chips.)
This is "just" (all 20,000 lines of it) code to enumerate the various
versions of busses inside these devices, including the PCI bridge and
the direct SIBA bridge found in MIPS chips.
It also includes shared code for some bus operations (suspend, resume, etc);
EEPROM/SROM/etc parsing and other things that are shared between chips.
Eventually this'll replace the code that bwi/bwn uses for the internal
bus, as well as some apparently upcoming mips74k broadcom SoC support
which uses bwn!
Thanks to Landon Fuller <landonf@landonf.org> for all this work!
Obtained from: https://github.com/landonf/freebsd/compare/user/landonf/bcm4331-CURRENT
