Taking closer look on my ASM1062 I found that it has bunch of issues around
error recovery: reported wrong CCS, failed commands reported as completed,
READ LOG EXT times out after NCQ error. This patch workarounds first two
problems, that were making ATAPI devices close to unusable on these HBAs.
MFC after: 2 weeks
Changes introduced to AHCI code adding support for MSI-x
caused interrupt storm on Alpine boards.
This is unintended behaviour so added quirk to omit this functionality.
Reviewed by: mav
Submitted by: Marcin Mazurek <mma@semihalf.com>
Obtained from: Semihalf
Sponsored by: Annapurna Labs
Differential Revision: https://reviews.freebsd.org/D4301
- Allocate resources for MSI-X table and PBA if necessary
- Add function ahci_free_mem() to free all resources
Reviewed by: jhb, mav
Obtained from: Semihalf
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D3009
According to report, some recent unrelated changes in the driver triggered
timeouts when testing for absent port multiplier. Cause of this behavior
channge is unclear, but since these chips are old, rare and buggy, it is
easier to just disable port multiplier support, same as done in Linux.
Reported by: bar
MFC after: 3 days
Overview:
* implemented quirk for forcing SATA interface enable
* restore value to status register - this enables link autonegotiation
Modifications:
* devid:vendorid field
* quirk for forcing PI setting (BIOS is doing that on PC-like systems)
* write to capabilites field to enable phy link initialization
Submitted by: Wojciech Macek <wma@semihalf.com>
Reviewed by: imp, mav
Obtained from: Semihalf
In 10.1-RELEASE the default number of MSI vectors used was changed from one
to as many vectors as the HW supports.
This change resulted in an ahci timeouts regression when running on AMD
SB7x0/SB8x0/SB9x0 hardware, so its now limited to 1 MSI by default using
this new quirk.
MFC after: 2 weeks
Sponsored by: Multiplay
I gave up to update list of Marvell chips that require this quirk.
The final nail was growing number of PCIe/M.2 SSDs where Marvell chips
have PCI IDs of different vendors.
MFC after: 1 week
H/W donated by: I/O Switch
PCI IDs into quirks, which mostly fit (though you'd get no argument
from me that AHCI_Q_SATA1_UNIT0 is oddly specific). Set these quirks
in the PCI attachment. Make some shared functions public so that PCI
and possibly other bus attachments can use them.
The split isn't perfect yet, but it is functional. The split will be
perfected as other bus attachments for AHCI are written.
Sponsored by: Netflix
Reviewed by: kan, mav
Differential Revision: https://reviews.freebsd.org/D699
