Commit Graph

72 Commits

Author SHA1 Message Date
Warner Losh
1e818404a3 -mabi-calls and -msoft-float aren't needed either
Submitted by:	jmallet@
2010-03-02 07:44:38 +00:00
Warner Losh
ab6b8778d7 -mno-dsp hasn't been required for a while now. 2010-03-02 07:24:47 +00:00
Neel Natu
6f3c632700 Kernel module support for mips.
Reviewed by: gonzo

Tested by: Alexandr Rybalko (ray@dlink.ua)
2010-02-18 05:49:52 +00:00
Nathan Whitehorn
1c96bdd146 Add support for 64-bit PowerPC CPUs operating in the 64-bit bridge mode
provided, for example, on the PowerPC 970 (G5), as well as on related CPUs
like the POWER3 and POWER4.

This also adds support for various built-in hardware found on Apple G5
hardware (e.g. the IBM CPC925 northbridge).

Reviewed by:    grehan
2009-04-04 00:22:44 +00:00
Nathan Whitehorn
5b4975b180 Explicitly disable generation of Altivec instructions in the kernel on PowerPC,
and add support to allow users to set their CPUTYPE in make.conf.
2009-02-22 18:45:30 +00:00
Alex Dupre
172b9da045 Fix links to online gcc docs.
Reported by:	Andre Guibert de Bruet <andy@siliconlandmark.com>
MFC after:	1 day
2008-06-25 06:07:03 +00:00
Warner Losh
88f25023dc Add support for MACHINE_ARCH == mips, plus a few generic CPU types that
will be supported in the forth coming FreeBSD/mips port.
2008-03-19 12:20:44 +00:00
Rafal Jaworowski
321578e3d0 Connect MPC85XX to the PowerPC build.
The kernel config file is KERNCONF=MPC85XX, so the usual procedure applies:

1. make buildworld TARGET_ARCH=powerpc
2. make buildkernel TARGET_ARCH=powerpc TARGET_CPUTYPE=e500 KERNCONF=MPC85XX

This default config uses kernel-level FPU emulation. For the soft-float world
approach:

1. make buildworld TARGET_ARCH=powerpc TARGET_CPUTYPE=e500
2. disable FPU_EMU option in sys/powerpc/conf/MPC85XX
3. make buildkernel TARGET_ARCH=powerpc TARGET_CPUTYPE=e500 KERNCONF=MPC85XX

Approved by:	cognet (mentor)
MFp4:		e500
2008-03-03 20:40:20 +00:00
John Baldwin
10250ddd27 Add a 'c7' CPUTYPE for VIA C7 CPUs that is 'c3-2' with the addition of
i686, sse2, and sse3.

MFC after:	1 week
2008-02-29 19:20:05 +00:00
Olivier Houchard
4251babd0a Backout rev 1.62, and revert to use -march=armv5te -D__XSCALE__ instead
of -mcpu=xscale for XScale.
gcc still has issues with -mcpu=xscale, and now crashes while building
systat.

Reported by:	sam
MFC After:	3 days
2007-10-16 18:32:37 +00:00
Olivier Houchard
ecf7ac028b GCC doesn't segfault anymore while building world with -mcpu=xscale, so use it. 2007-05-21 08:39:44 +00:00
Dag-Erling Smørgrav
ba518d666a "If I only had a brain..."
MFC after:	 3 weeks
2007-01-17 14:54:53 +00:00
Dag-Erling Smørgrav
5e0d38b538 Correct errors in previous commit. I didn't realize that ${CPUTYPE} is
passed unmodified to gcc.  Therefore, "prescott" should be used for Prescott,
Nocona, Core and Core 2 CPUs when building 32-bit code, and "nocona" should
be used for Prescott, Nocona and Core 2 CPUs when building 64-bit code.

MFC after:	3 weeks
2007-01-17 14:49:13 +00:00
Dag-Erling Smørgrav
3f15422a91 On i386, make "prescott" an alias for "nocona" (instead of the other way
around), and introduce "core", along with the alias "core2".  All of these
enable SSE3.

On amd64, add "core2" (enables SSE3).

MFC after:	3 weeks
2007-01-17 12:43:06 +00:00
Olivier Houchard
9a082df5b8 Use TARGET_BIG_ENDIAN instead of ARM_BIG_ENDIAN 2006-10-19 22:51:26 +00:00
Ruslan Ermilov
2b46c64c9c Remove alpha left-overs. 2006-08-22 08:03:01 +00:00
Dag-Erling Smørgrav
26e03c2f92 Revert previous commit. Pre-Nehemiah C3 CPUs do have 3DNow!; it doesn't
show up in dmesg because identcpu.c only looks for it on Intel and AMD
processors.
2006-08-13 08:47:41 +00:00
Dag-Erling Smørgrav
75b7c4a871 I don't know where I got the idea that the VIA C3 has 3DNow!; it doesn't.
It does have MMX (though MMX support is reputed to be incomplete in early
generations), and later generations have SSE.

MFC after:	2 weeks
2006-08-12 09:46:43 +00:00
Olivier Houchard
838ab6b670 Grr we also need to set -mbig-endian to LDFLAGS. Now I can build a
big-endian arm world.
2006-07-21 14:07:48 +00:00
Warner Losh
35ef2e4849 Remove ALPHA optimization pointer for gcc flags.
Add ARM optimization pointer for gcc flags.
2006-07-20 22:42:48 +00:00
Olivier Houchard
220e6313cb Oops LDFLAGS can be used to invoke gcc, so directly add -EB to {LD}. 2006-07-20 22:13:59 +00:00
Olivier Houchard
b72f5c0f35 Honor ARM_BIG_ENDIAN by adding -mbig-endian to CFLAGS and -EB to LDFLAGS if
it is defined.
2006-07-20 21:28:07 +00:00
Dag-Erling Smørgrav
7fa5ba9e34 Add CPUTYPE support for Via C3 and C3-2 processors.
MFC after:	2 weeks
2006-07-19 11:27:19 +00:00
Ruslan Ermilov
7b2d0a3eee Add a MACHINE_CPU entry for "ev67". 2005-12-06 13:47:23 +00:00
Olivier Houchard
7b2b007e8c Use -march=armv5te for Xscale. 2005-05-24 21:24:40 +00:00
David E. O'Brien
efa2f9962d Rev 1.44 was a little over-zealous for FreeBSD/AMD64, trim. 2004-12-11 18:36:42 +00:00
John Baldwin
e1be1a8e8f No need to add I386_CPU to CFLAGS here for 80386 systems as they are no
longer supported.
2004-11-16 21:12:47 +00:00
David E. O'Brien
d41f6f569c Define "I386_CPU" if CPUTYPE is 'i386'. Userland bits can check for "I386_CPU"
to determine if they should select code paths suitable for the 80386 CPU.

Suggested by:	ru
2004-10-19 17:25:33 +00:00
David E. O'Brien
73c7393a9b Embellish the AMD64 sections a little. Including supporting 'nocona'. 2004-10-17 05:19:45 +00:00
David E. O'Brien
d5a538f65f + Simplify by treating the standard x86 CPU names as the CPUTYPE vs.
treating them as an alias.  Treat the shorthand versions as aliases.
+ Separate the x86 GCC CPU CFLAGS from the ICC CFLAGS.  This greatly
  simplifies the GCC section.  It also makes it more clear which CPU's
  have the same ICC CPU CFLAGS.
+ Remove redundancy in the alpha section.
+ Add forgotten ICC CPU CFLAGS for the mobile Intel CPU's added in rev. 1.42.
2004-10-17 05:08:29 +00:00
Dag-Erling Smørgrav
1af0547f8b Add support for Pentium M, Pentium 3M and Pentium 4M.
PR:		i386/72340
Submitted by:	Rong-En Fan <rafan@infor.org>
MFC after:	2 weeks
2004-10-07 09:56:48 +00:00
Olivier Houchard
fba25c542c Add CPUCFLAGS for the strongarm and xscale CPUs. 2004-09-23 22:59:31 +00:00
David E. O'Brien
55dfe3e212 Add more aliases for common CPUTYPE spellings 2004-08-11 21:51:27 +00:00
David E. O'Brien
fc2046e544 Consistently list _CPUCFLAGS. 2004-08-02 04:19:22 +00:00
Olivier Houchard
ac388bcd91 Define MACHINE_CPU for arm. 2004-05-14 13:34:15 +00:00
Doug Rabson
002d186bf0 Add ${CPUTYPE} support for crusoe processors (cribbed from Linux kernel
settings). Pretend that a crusoe is an i686 which doesn't like alignment
padding.
2004-04-05 09:55:50 +00:00
Marcel Moolenaar
1950e64cb2 Add a reference to the ia64 options to gcc. While here, sort the list. 2004-03-21 04:57:24 +00:00
Tom Rhodes
5a19f6d9d4 Fix some style bugs in previous commit.
Fix 'broken' ifdefs.
icc does not support profiling yet so remove unfinished code which was
supposed to help.

Submitted by:	netchild (original version)
Reviewed by:	ru
2004-03-14 01:29:05 +00:00
Tom Rhodes
06d6e4fcfe This are the build infrastructure changes to allow to use the
Intel C/C++ compiler (lang/icc) to build the kernel.

The icc CPUTYPE CFLAGS use icc v7 syntax, icc v8 moans about them, but
doesn't abort. They also produce CPU specific code (new instructions
of the CPU, not only CPU specific scheduling), so if you get coredumps
with signal 4 (SIGILL, illegal instruction) you've used the wrong
CPUTYPE.

Incarnations of this patch survive gcc compiles and my make universe.
I use it on my desktop.

To use it update share/mk, add
	/usr/local/intel/compiler70/ia32/bin	(icc v7, works)
or
	/usr/local/intel_cc_80/bin		(icc v8, doesn't work)
to your PATH, make sure you have a new kernel compile directory
(e.g. MYKERNEL_icc) and run
	CFLAGS="-O2 -ip" CC=icc make depend
	CFLAGS="-O2 -ip" CC=icc make
in it.

Don't compile with -ipo, the build infrastructure uses ld directly to
link the kernel and the modules, but -ipo needs the link step to be
performed with Intel's linker.

Problems with icc v8:
 - panic: npx0 cannot be emulated on an SMP system
 - UP: first start of /bin/sh results in a FP exception

Parts of this commit contains suggestions or submissions from
Marius Strobl <marius@alchemy.franken.de>.

Reviewed by:	silence on -arch
Submitted by:	netchild
2004-03-12 21:36:12 +00:00
Bruce Evans
d562095ead Fixed indentation of conditionals.
Submitted by:	Rostislav Krasny <rosti_bsd@yahoo.com>
2004-03-05 15:59:33 +00:00
Bruce Evans
c7fde57406 Fixed some style bugs (long lines). 2004-01-31 02:17:11 +00:00
John Baldwin
05d9236acf Drop -mcpu=pentiumpro from the default CPU flags for i386 as it doesn't
perform better than the default setting for most i386 CPUs.

Requested by:	bde
2004-01-30 19:51:26 +00:00
Ruslan Ermilov
2096f68ef2 Keep up with sys/conf/ changes. 2004-01-10 18:01:08 +00:00
Maxime Henrion
96f5595bf7 Since -march=pentium4 is supposed to be fixed with GCC 3.3, and
since people have been reporting success with it, re-enable the
pentium4 optimization.
2003-07-13 10:34:09 +00:00
Eric Anholt
b1aff8bff1 Change -march=pentium4 to -march=pentium3 when CPUTYPE==p4, because gcc 3.2 is
known to produce broken code with -march=pentium4.  Add a note explaining this.
This should be removed when we update to gcc 3.3 or the bug is otherwise fixed.

Approved by:	re
2003-05-22 16:56:46 +00:00
Peter Wemm
721b850f30 s/x86[-_]64/amd64/ for MACHINE_ARCH and MACHINE_CPU .ifdefs.
Noticed by:  ru
Approved by: re (amd64-specific low risk stuff)
2003-05-20 01:46:16 +00:00
David E. O'Brien
ae7906208d Add CPUTYPE support for "athlon-tbird", as GCC makes the distinction.
PR:		50801
Submitted by:	Glenn Johnson <glennpj@charter.net>
2003-04-14 17:36:29 +00:00
David E. O'Brien
7d40314e32 Default the userland to 486 capabilities. 2003-04-11 21:28:17 +00:00
David E. O'Brien
dde8112b23 Globally use -mieee in /usr/src for Alpha. 2003-03-29 03:14:24 +00:00
David E. O'Brien
44db0c5c9a Reduce "code duplication" for AMD CPU's. 2003-03-29 03:13:19 +00:00