upstream DTrace code. It indicates that the kernel memory allocator need not
attempt to satisfy non-blocking allocations in low-memory conditions. This
has no direct equivalent in the malloc(9) flags, so it is just defined to 0
for now.
source shows that board vendors seem to be about evenly split on this.
This commit is a trivial change to note that while the previous change
was supposed to be whitespace only, this functional change also crept in.
The added lines were:
/* Board vendors use both fdtaddr and fdt_addr names. Grrrr. */
if (s == NULL)
s = ub_env_get("fdt_addr");
to use-after-free.
fdescfree proceeds to free file pointers once fd_refcnt reaches 0, but
kern_proc_{o,}filedesc_out only checked for hold count.
MFC after: 3 days
The vlapic.ops handler 'enable_x2apic_mode' is called when the vlapic mode
is switched to x2APIC. The VT-x implementation of this handler turns off the
APIC-access virtualization and enables the x2APIC virtualization in the VMCS.
The x2APIC virtualization is done by allowing guest read access to a subset
of MSRs in the x2APIC range. In non-root operation the processor will satisfy
an 'rdmsr' access to these MSRs by reading from the virtual APIC page instead.
The guest is also given write access to TPR, EOI and SELF_IPI MSRs which
get special treatment in non-root operation. This is documented in the
Intel SDM section titled "Virtualizing MSR-Based APIC Accesses".
Enforce that APIC-write and APIC-access VM-exits are handled only if
APIC-access virtualization is enabled. The one exception to this is
SELF_IPI virtualization which may result in an APIC-write VM-exit.
The temperature monitor device is enabled to sample the die temperature at
16hz. The temperature is published via sysctl. A callout routine at 10hz
monitors the temperature and throttles back the cpu if the temperature
goes over a user-settable throttle point (by default 10C less than the
critical high-point temperature for the chip). The hardware is supposed
to be able to deliver an interrupt when the temperature exceeds a settable
limit, but the interrupt never arrives so for now a callout does the job.
At attach time we read the maximum cpu frequency the chip is allowed to run
at and the cpu is set to run at that speed. It's reported at attach time.
A sysctl variable reports the current speed when queried.
New sysctl values:
dev.imx6_anatop.0.cpu_mhz: 984
dev.imx6_anatop.0.temperature: 37.9C
dev.imx6_anatop.0.throttle_temperature: 95.0C
Steven Lawrance did the initial heavy lifting on this, but I changed
enough stuff that I'm the one to blame if anything breaks.
Submitted by: Steven Lawrance <stl@koffein.net>
While here, don't overwrite the error message on interactive use and add
the missing '\n' at end of error message for the non interactive use.
Tested by: ian, myself
Approved by: adrian (mentor, implicit)
simplify the implementation of the x2APIC virtualization assist in VT-x.
Prior to this change the vlapic allowed the guest to change its mode from
xAPIC to x2APIC. We don't allow that any more and the vlapic mode is locked
when the virtual machine is created. This is not very constraining because
operating systems already have to deal with BIOS setting up the APIC in
x2APIC mode at boot.
Fix a bug in the CPUID emulation where the x2APIC capability was leaking
from the host to the guest.
Ignore MMIO reads and writes to the vlapic in x2APIC mode. Similarly, ignore
MSR accesses to the vlapic when it is in xAPIC mode.
The default configuration of the vlapic is xAPIC. The "-x" option to bhyve(8)
can be used to change the mode to x2APIC instead.
Discussed with: grehan@
HAL methods.
This allows the AR8327 code to override it as appropriate.
Tested:
* DB120 - AR8327 and AR9340 on-board switch; only running 'etherswitchcfg'
to check configs. The actual VLAN programming wasn't tested.
The registers (and perhaps the flags) are different for the AR8327, so
I'll stub those out until they're written.
Tested:
* DB120 - both on-chip AR9340 and AR8327 switches.
a single port to setup.
This may end up later being used as part of some logic to program
the PHY for a single port, rather than having to reinitialise them
all at once.
Tested:
* DB120
license, although the former is pretty safe, it wasn't intended to be
used in the version of MIPS boot2/loader upstreamed to FreeBSD.
MFC after: 3 weeks
Sponsored by: DARPA, AFRL
particular interest in (and support for) SRI International and the
University of Cambridge's BERI FPGA soft-core processor. This includes
micro device drivers for the Altera JTAG UART console, memory-mapped
flash, and the Altera SD Card IP core in both boot2 and loader. boot2
can be written to the on-board Intel StrataFlash on the DE4 board, and
loader can be placed in StrataFlash or the SD Card.
Plenty of XXX comments, but works quite well locally in practice and I
am using it daily. Although I had originally ported the ARM version
of boot2, the current version is x86-derived as that proved more
feature-complete. As we don't currently use partitions on our flash
disks, support for that has been commented out relative to x86, but
would be easy to add back. FDT support has not yet been hooked up,
although some skeleton parts have been put in place for that.
This may well be a useful starting point for ports to other 32-bit and
64-bit MIPS-ISA systems.
This merge is synchronised to CheriBSD github commit
e41d74fd71, but with some additions of
$FreeBSD.
MFC after: 3 weeks
Sponsored by: DARPA, AFRAL
capability.h currently only wraps some of its declarations in __BEGIN_DECLS/__END_DECLS, so cap_enter(), cap_sandboxed(), etc. are usable from C++ code but cap_rights_init(), cap_rights_is_valid() etc. are not. This commit fixes this distinction.
Approved by: rwatson (mentor)
MFC after: 1 week
Sponsored by: DARPA, AFRL
- intercept FIONBIO and FIOASYNC ioctls on netmap file descriptors.
libpcap calls them to set non blocking I/O on the file descriptor,
for netmap this is a no-op because there is no read/write,
but not intercepting would cause fcntl() to return -1
- rate limit and put under netmap.verbose some messages that occur
when threads use concurrently the same file descriptor.
emulated instructions.
- Add helper routines to inject interrupt information for a hardware
exception from the VM exit callback routines.
- Use the new routines to inject GP and UD exceptions for invalid
operations when emulating the xsetbv instruction.
- Don't directly manipulate the entry interrupt info when a user event
is injected. Instead, store the event info in the vmx state and
only apply it during a VM entry if a hardware exception or NMI is
not already pending.
- While here, use HANDLED/UNHANDLED instead of 1/0 in a couple of
routines.
Reviewed by: neel
Before this patch, curvnet was NULL.
When the VIMAGE kernel option is enabled, this eliminates
kernel panics when USB ethernet devices are plugged in.
PR: 183835
Submitted by: Hiroo Oono <hiroo.ono at gmail dot com>
in x2apic mode. Reads to this MSR are currently ignored but should cause a
general proctection exception to be injected into the vcpu.
All accesses to the corresponding offset in xAPIC mode are ignored.
Also, do not panic the host if there is mismatch between the trigger mode
programmed in the TMR and the actual interrupt being delivered. Instead the
anomaly is logged to aid debugging and to prevent a misbehaving guest from
panicking the host.
This is necessary because if the vlapic is configured in x2apic mode the
vioapic_process_eoi() function is called inside the critical section
established by vm_run().
about uss820dci_odevd being unused, by adding it to the part that
handles getting descriptors.
Reported by: loos
Reviewed by: hselasky
MFC after: 3 days
tested and is unfinished. However, I've tested my version,
it works okay. As before it is unfinished: timeout aren't
driven by TCP session state. To enable the HASH_ALL mode,
one needs in kernel config:
options FLOWTABLE_HASH_ALL
o Reduce the alignment on flentry to 64 bytes. Without
the FLOWTABLE_HASH_ALL option, twice less memory would
be consumed by flows.
o API to ip_output()/ip6_output() got even more thin: 1 liner.
o Remove unused unions. Simply use fle->f_key[].
o Merge all IPv4 code into flowtable_lookup_ipv4(), and do same
flowtable_lookup_ipv6(). Stop copying data to on stack
sockaddr structures, simply use key[] on stack.
o Move code from flowtable_lookup_common() that actually works
on insertion into flowtable_insert().
Sponsored by: Netflix
Sponsored by: Nginx, Inc.
and CAMBRIA boards that does not use loader to load the kernel. This
is basically how it was done for i386. This way tunables can also be
set. For example in config file:
env "/conf/AVILA.env"
And in AVILA.env:
vfs.unmapped_buf_allowed=0
MFC after: 2 weeks
