years for head. However, it is continuously misused as the mpsafe argument
for callout_init(9). Deprecate the flag and clean up callout_init() calls
to make them more consistent.
Differential Revision: https://reviews.freebsd.org/D2613
Reviewed by: jhb
MFC after: 2 weeks
This will override the resource allocation of simplebus, and also
merge the resource allocation code which was in xlp_pci.c.
With this change the SoC devices that does not have proper PCI
resources will be on the FDT simplebus. We can remove
sys/mips/nlm/dev/cfi_pci_xlp.c and sys/mips/nlm/dev/uart_pci_xlp.c
shifts into the sign bit. Instead use (1U << 31) which gets the
expected result.
This fix is not ideal as it assumes a 32 bit int, but does fix the issue
for most cases.
A similar change was made in OpenBSD.
Discussed with: -arch, rdivacky
Reviewed by: cperciva
The changes are to:
* Use contigmalloc/contigfree which handling microcode buffer
* Use a different buffer to send microcode to each engine
* Swap microcode in little-endian compilation
* Fix freeback message queue id field
* Simplify xlp_get_rsa_opsize() to remove unnecessary checks
* Fix NULL check after use in xlp_free_cmd_params()
* Do better error handling when the hardware returns error
* Fix error codes in few cases
Submitted by: Vekatesh J. V. <venkatesh.vivekanandan@broadcom.com>
Approved by: re (hrs)
Updates to the Netlogic XLP on-chp RSA block driver. The changes are
to follow style(9) guidelines, to improve readability and to remove
unnecessary initialization.
No changes to logic have been introduced by this commit.
Submitted by: Venkatesh J. V. <venkatesh.vivekanandan@broadcom.com>
Approved by: re (hrs)
Changes are to
- update board and network interface detection logic
- fix reading onboard CPLD in little-endian config
- print NAE frequency conrrectly for Bx chips
- update XAUI config to disable Rx/Tx until interface is up
Submitted by: Venkatesh J V <venkatesh.vivekanandan@broadcom.com>
The changes are:
- the microcore code loaded into the NAE has to be byteswapped
in LE
- the descriptors in memory for a P2P NAE descriptor has to be
byteswapped in LE
- the m_data pointer is already cacheline aligned, so the
unnecessary m_adj to cacheline size can be removed
- fix mask used to obtain physical address from the Tx freeback
descriptor
- fix a compile error in code under #ifdef
Obtained from: Venkatesh J V <venkatesh.vivekanandan@broadcom.com>
Update MDIO reset code to support Broadcom XLP B1 revisions.
Update nlm_xlpge_ioctl, nlm_xlpge_port_enable need not be
called after nlm_xlpge_init.
Obtained from: Venkatesh J V <venkatesh.vivekanandan@broadcom.com>
Move XLP PCI UART device to sys/mips/nlm/dev/ directory. Other
drivers for the XLP SoC devices will be added here as well.
Update uart_cpu_xlp.c and uart_pci_xlp.c use macros for uart port,
speed and IO frequency.
Features:
- network driver for the four 10G interfaces and two management ports
on XLP 8xx.
- Support 4xx and 3xx variants of the processor.
- Source code and firmware building for the 16 mips32r2 micro-code engines
in the Network Accelerator.
- Basic initialization code for Packet ordering Engine.
Submitted by: Prabhath Raman (prabhath at netlogicmicro com)
[refactored and fixed up for style by jchandra]
Support for the Security and RSA blocks on XLP SoC. Even though
the XLP supports many more algorithms, only the ones supported
in OCF have been added.
Submitted by: Venkatesh J. V. (venkatesh at netlogicmicro com)
