Commit Graph

507 Commits

Author SHA1 Message Date
Attilio Rao
884015f6fc Add sysctls in ahd(4) in order to keep track of different classes of
errors. So far 3 different classes are present (correctable,
uncorrectable and fatal) but more can be added easilly.

Obtained from:	Sandvine Incorporated
Reviewed by:	emase, gibbs
Sponsored by:	Sandvine Incorporated
MFC:		2 weeks
2009-11-13 22:57:20 +00:00
Christian Brueffer
a452248814 Add support for Adaptec 39320LPE adapters.
PR:		124202
Submitted by:	Andre Albsmeier <Andre.Albsmeier@siemens.com>
Reviewed by:	gibbs
MFC after:	1 week
2009-10-30 16:23:56 +00:00
Christian Brueffer
56d7cd7cf1 Add a missing free() call.
PR:		138379
Submitted by:	Patroklos Argyroudis <argp@census-labs.com>
Reviewed by:	gibbs
MFC after:	1 week
2009-10-21 14:09:06 +00:00
Scott Long
52c9ce25d8 Separate the parallel scsi knowledge out of the core of the XPT, and
modularize it so that new transports can be created.

Add a transport for SATA

Add a periph+protocol layer for ATA

Add a driver for AHCI-compliant hardware.

Add a maxio field to CAM so that drivers can advertise their max
I/O capability.  Modify various drivers so that they are insulated
from the value of MAXPHYS.

The new ATA/SATA code supports AHCI-compliant hardware, and will override
the classic ATA driver if it is loaded as a module at boot time or compiled
into the kernel.  The stack now support NCQ (tagged queueing) for increased
performance on modern SATA drives.  It also supports port multipliers.

ATA drives are accessed via 'ada' device nodes.  ATAPI drives are
accessed via 'cd' device nodes.  They can all be enumerated and manipulated
via camcontrol, just like SCSI drives.  SCSI commands are not translated to
their ATA equivalents; ATA native commands are used throughout the entire
stack, including camcontrol.  See the camcontrol manpage for further
details.  Testing this code may require that you update your fstab, and
possibly modify your BIOS to enable AHCI functionality, if available.

This code is very experimental at the moment.  The userland ABI/API has
changed, so applications will need to be recompiled.  It may change
further in the near future.  The 'ada' device name may also change as
more infrastructure is completed in this project.  The goal is to
eventually put all CAM busses and devices until newbus, allowing for
interesting topology and management options.

Few functional changes will be seen with existing SCSI/SAS/FC drivers,
though the userland ABI has still changed.  In the future, transports
specific modules for SAS and FC may appear in order to better support
the topologies and capabilities of these technologies.

The modularization of CAM and the addition of the ATA/SATA modules is
meant to break CAM out of the mold of being specific to SCSI, letting it
grow to be a framework for arbitrary transports and protocols.  It also
allows drivers to be written to support discrete hardware without
jeopardizing the stability of non-related hardware.  While only an AHCI
driver is provided now, a Silicon Image driver is also in the works.
Drivers for ICH1-4, ICH5-6, PIIX, classic IDE, and any other hardware
is possible and encouraged.  Help with new transports is also encouraged.

Submitted by:	scottl, mav
Approved by:	re
2009-07-10 08:18:08 +00:00
Xin LI
9ceb784eaf Re-enable WARNS=6 after my universe test. 2009-06-02 17:27:54 +00:00
Xin LI
5bb0de0503 Initialize the match structure. This is unnecessary but gcc insists to
complain about it when we raise the WARNS level.
2009-06-01 21:07:54 +00:00
Xin LI
a3f2e28dea Revert the WARNS change for now, need some time to fix the real problem. 2009-06-01 19:06:08 +00:00
Xin LI
7ff1b9822d Mark as WARNS=6. 2009-06-01 18:43:33 +00:00
Xin LI
b18a2ef17f Code cleanups to make this WARNS=6 clean.
PR:		bin/96128
2009-06-01 18:42:16 +00:00
Warner Losh
155a83e87a remove now-redunant cardbus attachment. 2009-03-09 13:23:54 +00:00
Sam Leffler
39297ba455 Make ddb command registration dynamic so modules can extend
the command set (only so long as the module is present):
o add db_command_register and db_command_unregister to add and remove
  commands, respectively
o replace linker sets with SYSINIT's (and SYSUINIT's) that register
  commands
o expose 3 list heads: db_cmd_table, db_show_table, and db_show_all_table
  for registering top-level commands, show operands, and show all operands,
  respectively

While here also:
o sort command lists
o add DB_ALIAS, DB_SHOW_ALIAS, and DB_SHOW_ALL_ALIAS to add aliases
  for existing commands
o add "show all trace" as an alias for "show alltrace"
o add "show all locks" as an alias for "show alllocks"

Submitted by:	Guillaume Ballet <gballet@gmail.com> (original version)
Reviewed by:	jhb
MFC after:	1 month
2008-09-15 22:45:14 +00:00
Justin T. Gibbs
2e9878a7c5 Only print sense data diagnostics if debugging is enabled with the
AHD_SHOW_SENSE flag.
2008-02-17 16:00:36 +00:00
Justin T. Gibbs
d950018dc2 Remove superfluous setting of the transport_version field of our
path inquiry response - a likely holdover from the port of this code
from the aic7xxx driver.
2008-02-17 15:22:26 +00:00
Justin T. Gibbs
accbb18a61 Advertise to CAM the ability of 790X controllers to negotiate information
unit transfers (packetized/U320 protocol) and QAS.
2008-02-17 06:14:59 +00:00
Julian Elischer
e1ff3d508a fix up some code for older systems changed by accident in the last commit
this whole support for systems earlier than 5.0 should probably be removed
but I'll at least FIX it before removing it, so that CVS has it right.
2007-10-21 04:11:13 +00:00
Julian Elischer
3745c395ec Rename the kthread_xxx (e.g. kthread_create()) calls
to kproc_xxx as they actually make whole processes.
Thos makes way for us to add REAL kthread_create() and friends
that actually make theads. it turns out that most of these
calls actually end up being moved back to the thread version
when it's added. but we need to make this cosmetic change first.

I'd LOVE to do this rename in 7.0  so that we can eventually MFC the
new kthread_xxx() calls.
2007-10-20 23:23:23 +00:00
Scott Long
9ab0fe8075 Fix locking mistakes in the error recovery paths of the AHC and AHD drivers.
Approved by: re
2007-07-31 20:11:03 +00:00
Scott Long
b50569b71d Prepare for future integration between CAM and newbus. xpt_bus_register
now takes a device_t to be the parent of the bus that is being created.
Most SIMs have been updated with a reasonable argument, but a few exceptions
just pass NULL for now.  This argument isn't used yet and the newbus
integration likely won't be ready until after 7.0-RELEASE.
2007-06-17 05:55:54 +00:00
Scott Long
7628acd8ee Up until now, the free SCB pool received only a small initial allocation,
and new SCBs were allocated on demand later if needed.  This has two
problems.  First, allocating SCBs involves allocating contiguous memory,
and if memory is exhausted then the VM will try to page out to satisfy
the request, leading to recursion and deadlock.  The second problem is
that it can cause lock order reversals due to parts of the VM still being
under Giant.

Fix the problem be allocating the full pool at driver attach, when it is
safe to do so.
2007-04-19 18:53:52 +00:00
Scott Long
032b0a17dc Basic MPSAFE locking for the AHC and AHD drivers. 2007-04-17 06:26:25 +00:00
Scott Long
2b83592fdc Remove Giant from CAM. Drivers (SIMs) now register a mutex that CAM will
use to synchornize and protect all data objects that are used for that
SIM.  Drivers that are not yet MPSAFE register Giant and operate as
usual.  RIght now, no drivers are MPSAFE, though a few will be changed
in the coming week as this work settles down.

The driver API has changed, so all CAM drivers will need to be recompiled.
The userland API has not changed, so tools like camcontrol do not need to
be recompiled.
2007-04-15 08:49:19 +00:00
Paolo Pisati
ef544f6312 o break newbus api: add a new argument of type driver_filter_t to
bus_setup_intr()

o add an int return code to all fast handlers

o retire INTR_FAST/IH_FAST

For more info: http://docs.freebsd.org/cgi/getmsg.cgi?fetch=465712+0+current/freebsd-current

Reviewed by: many
Approved by: re@
2007-02-23 12:19:07 +00:00
Ceri Davies
e1854a84ad Correct typos containing my login name (plus one more in expr.y).
Found courtesy of a recursive grep in the wrong directory.
2007-02-18 19:48:59 +00:00
John Baldwin
6eb7ebfe25 - Change the PCI-X registers constants to be relative to the PCI-X PCI
capability rather than hardcoded offsets for a particular card.  While
  I'm here, expand the constants some.
- Change the ahd(4) driver to use pci_find_extcap() to locate the PCI-X
  capability to keep up with the first change.

Reviewed by:	scottl, gibbs (earlier version)
2007-01-19 22:37:52 +00:00
Yaroslav Tykhiy
9b3d1b0253 Fix a group of typos:
preceed -> precede,
preceeded -> preceded,
preceeding -> preceding.

Submitted by:	Andre Guibert de Bruet <andy@siliconlandmark.com>
2006-12-29 13:08:46 +00:00
Matt Jacob
bd3fd815a7 2nd and final commit that moves us to CAM_NEW_TRAN_CODE
as the default.

Reviewed by multitudes.
2006-11-02 00:54:38 +00:00
Matt Jacob
9af877a146 Coverity: initialize some variables before potential use. 2006-09-05 20:28:28 +00:00
John-Mark Gurney
378f231e7d add a newbus method for obtaining the bus's bus_dma_tag_t... This is
required by arches like sparc64 (not yet implemented) and sun4v where there
are seperate IOMMU's for each PCI bus...  For all other arches, it will
end up returning NULL, which makes it a no-op...

Convert a few drivers (the ones we've been working w/ on sun4v) to the
new convection...  Eventually all drivers will need to replace the parent
tag of NULL, w/ bus_get_dma_tag(dev), though dev is usually different for
each driver, and will require hand inspection...

Reviewed by:	scottl (earlier version)
2006-09-03 00:27:42 +00:00
Poul-Henning Kamp
c40da00ca3 Since DELAY() was moved, most <machine/clock.h> #includes have been
unnecessary.
2006-05-16 14:37:58 +00:00
John Baldwin
e1e31c0e43 Clean up the way we handle auxiliary commands for a given ddb command
table.  Previously, the ddb code knew of each linker set of auxiliary
commands and which explicit command list they were tied to.  These changes
add a simple command_table struct that contains both the static list of
commands and the pointers for any auxiliary linker set of additional
commands.  This also makes it possible for other arbitrary command tables
to be defined in other parts of the kernel w/o having to edit ddb itself.

The DB_SET macro has also been trimmed down to just creating an entry in
a linker set.  A new DB_FUNC macro does what the old DB_SET did which is
to not only add an entry to the linker set but also to include a function
prototype for the function being added.  With these changes, it's now also
possible to create aliases for ddb functions using DB_SET() directly if
desired.
2006-03-07 22:17:06 +00:00
Ruslan Ermilov
44e09d2fa2 Fix -Wundef warnings from compiling GENERIC and LINT kernels of
all architectures.
2005-12-06 11:19:37 +00:00
Ruslan Ermilov
342ed5d948 Fix -Wundef warnings found when compiling i386 LINT, GENERIC and
custom kernels.
2005-12-05 11:58:35 +00:00
Ruslan Ermilov
f4e9888107 Fix -Wundef. 2005-12-04 02:12:43 +00:00
Ruslan Ermilov
95ec61c094 Fix mysterious build failures (with parallel make) early in
buildkernel: provide a real but dummy name to ${DEPENDFILE}
so that the relevant exists() check in bsd.prog.mk fails and
ensures that ${GENHDRS} are built before any other objects.

MFC after:	3 days
2005-11-21 14:41:10 +00:00
Justin T. Gibbs
ad3d2a4dc5 Use the AHC_DISABLE_PCI_PERR flag to silence parity error reporting on
chips where setting the FAILDIS bit is not effective.  While here,
try again to make it clear that reported parity errors indicate
a failure of some PCI device *other than* the aic7xxx controller.
2005-09-22 05:11:35 +00:00
Justin T. Gibbs
23a6493baf Enhance diagnostic printfs for the chains of free lists used to
avoid SCB ID collissions to non-packetized targets.
2005-09-22 05:06:03 +00:00
Justin T. Gibbs
16346ae5f5 Correct bug that caused the completed "recovery" scb to have its
timer reset rather than the timer of an SCB still pending on the
controller after recovery completed.  This should correct timeout
loops seen in the field.
2005-09-22 05:01:37 +00:00
Justin T. Gibbs
6bdc5bdf68 Set allow_memio to 1 if fetching the allow_memio hint fails. This
is the default behavior according the the bootverbose printf in the
failure case.
2005-09-22 04:56:59 +00:00
Robert Watson
358371dcec Back out change accidentally committed as Makefile:1.21 -- a local
tweak to let the 6.x/7.x kernel series build on a 5.x userland.

Pointed out by:		njl
2005-08-03 00:47:33 +00:00
Robert Watson
13b203d0d7 Modify device drivers supporting multicast addresses to lock if_addr_mtx
over iteration of their multicast address lists when synchronizing the
hardware address filter with the network stack-maintained list.

Problem reported by:	Ed Maste (emaste at phaedrus dot sandvine dot ca>
MFC after:		1 week
2005-08-03 00:18:35 +00:00
Yoshihiro Takahashi
d4fcf3cba5 Remove bus_{mem,p}io.h and related code for a micro-optimization on i386
and amd64.  The optimization is a trivial on recent machines.

Reviewed by:	-arch (imp, marcel, dfr)
2005-05-29 04:42:30 +00:00
Sam Leffler
5587897d92 remove useless ptr check; cur_column can never be null
Noticed by:	Coverity Prevent analysis tool
2005-03-31 05:00:31 +00:00
Warner Losh
494f3ca182 Use BUS_PROBE_DEFAULT for pci probe return value 2005-03-05 19:24:22 +00:00
Justin T. Gibbs
cb29ab3392 aic79xx.c:
aic7xxx.c:
	Allow print_reg() to be called with a NULL column.

aic79xx.c:
	Correct new usage of SCB_GET_TAG().

aic7xxx.c:
	Fix stray ahd that snuck in here.
2005-02-16 23:13:38 +00:00
Justin T. Gibbs
05899a48a7 On Rev. B silicon, we disabled the enhanced busfree detection logic to
close holes in detecting busfrees that occur after a packetized target
transitions to a non-packetized phase.  The most common case where this
occurs is when a target is externally reset so the controller believes
a packetzied negotiation agreement is still in effect.  Unfortunately,
disabling this feature seems to cause problems for the 7901B.  Re-enable
ehanced busfree detection for this part until I can get my hands on a
samble to figure out if the old workaround is necessary and, if so, how
to make it work correctly.
2005-02-16 18:16:35 +00:00
Justin T. Gibbs
3db6c642f5 MF5S: Explicitly initialize timedout_scb lists, use SCB_TAG for all access
to the hardware_scb->tag field, limit max lun reported to CAM to 63,
      return after a panic to silence a warning.
2005-02-16 18:09:41 +00:00
Scott Long
55708fbbec Make this compile from the last commit 2005-01-06 05:30:44 +00:00
Warner Losh
098ca2bda9 Start each of the license/copyright comments with /*-, minor shuffle of lines 2005-01-06 01:43:34 +00:00
Ruslan Ermilov
e653b48c80 Start the dreaded NOFOO -> NO_FOO conversion.
OK'ed by:	core
2004-12-21 08:47:35 +00:00
Justin T. Gibbs
803bbd69c4 Add some useful target mode diagnostics for incoming commands
under the AHC_SHOW_TQIN debug flag.
2004-11-18 20:33:43 +00:00
Justin T. Gibbs
ad32f91b6b Revert to basing all timeout/timer values in ms rather than us. The switch
to us was to help out the Linux port, but really just invited overflow.
In fact, the request sense timer was overflowing prior to this change making
it much shorter than intended.

aic_osm_lib.h:
	Be more careful about overflow in all timer/timeout primitives.
2004-11-18 20:22:31 +00:00
Ruslan Ermilov
a35d88931c For variables that are only checked with defined(), don't provide
any fake value.
2004-10-24 15:33:08 +00:00
Justin T. Gibbs
a9c6886af6 aic7xxx.h:
Add constants for SPI protocol delays that are needed for
	target mode.

aic7xxx.c:
	Correct a target mode issue that caused an occassional
	spurious REQ to be seen on the bus when performing manual
	message processing (e.g. transfer rate negotiation).

	Enforce phase change bus settle rules with explicit
	delays when performing manual message processing in
	target mode.  The sequencer already did this for
	"fast-path", target mode message processing.
2004-10-19 20:48:06 +00:00
Justin T. Gibbs
a1a3da9b38 Skip probe attempts for ISA PnP devices.
Pointed out by: imp
2004-10-15 23:39:52 +00:00
Justin T. Gibbs
08bbe9ff04 Correct a typo in a comment: alloated->allocated
Reported by: Jens Schweikhardt <schweikh@schweikhardt.net>
2004-08-30 20:15:42 +00:00
Justin T. Gibbs
25edba1e56 In the PCI error interrupt handler, specify the width of the PCI configuration
cycle using the correct argument.  The location and width were reversed.

MFC in: 2 days
2004-08-22 14:02:43 +00:00
Justin T. Gibbs
4ddea3e2d4 Set AHD_BUSFREEREV_BUG in the bug field for Rev B chips, not the
feature field.

Reported by: Ken Westerback <krw@openbsd.org>
MFC in: 2 days
2004-08-22 13:54:27 +00:00
Justin T. Gibbs
badcc39b73 Initialize iobase from the resource allocated by bus_alloc_resource_any()
rather than with isa_get_port().  This value is only used in diagnostics,
but the value we want to print is the value in our resource, not in any
hint.
2004-08-18 17:17:43 +00:00
Justin T. Gibbs
0d0c8be691 Invert the polarity of two tests in the recovery code that could cause
the driver to issue a bus reset more quickly than intended.  We want to
*wait* if we find another SCB that could be the cause of this timeout,
not proceed to a bus reset.

Noticed by: kan
2004-08-18 16:35:52 +00:00
Justin T. Gibbs
aed921b969 Remove spurious EISA definitions left over from the initial port of the
aic7xxx driver to U320 hardware.
2004-08-18 16:33:14 +00:00
Justin T. Gibbs
eaa73a368b Remove ISA attachments dependence on eisaconf.h
Noticed by: Takahashi Yoshihiro <nyan@jp.FreeBSD.org>
2004-08-18 16:31:56 +00:00
Justin T. Gibbs
d3f39a7438 Add ISA attachement files for the aic7xxx driver.
Approved by: re
Reminded by: obrien
2004-08-17 02:32:30 +00:00
Justin T. Gibbs
7afc02188a Add an ISA attachement to the aic7xxx driver to handle 284X controllers.
The ISA probe uses an identify routine to probe all slot locations from
1 to 14 that do not conflict with other allocated resources.  This required
making aic7770.c part of the driver core when compiled as a module.

aic7xxx.c:
aic79xx.c:
aic_osm_lib.c:
	Use aic_scb_timer_start() consistently to start the watchdog timer.
	This removes a few places that verbatum copied the code in
	aic_scb_timer_start().

	During recovery processing, allow commands to still be queued to
	the controller.  The only requirement we have is that our recovery
	command be queued first - something the code already guaranteed.
	The only other change required to make this work is to prevent
	timers from being started for these newly queued commands.

Approved by: re
2004-08-17 00:14:31 +00:00
Justin T. Gibbs
39250c18b8 Extend critical section protection around portions of selection processing
that cannot tolerate changes to the waiting for selection queue by the
host or the host canceling an active selection.
2004-08-13 21:41:23 +00:00
Justin T. Gibbs
31d80b6045 Fix an off by one in the critical section clearing code. The
code was adjusting twice for the instruction pointer indicating
the *next* instruction to execute.  The aic79xx driver had a similar
bug, but was fixed some time ago.
2004-08-13 21:39:14 +00:00
Justin T. Gibbs
789902c3ae Correct a very rare case where command ordering could be compromised
by a transaction performing a driver handled message sequence (an
scb with the MK_MESSAGE flag set).

SCBs that perform host managed messaging must always be
at the head of their per-target selection queue so that
the firmware knows to manually assert ATN if the current
negotiation agreement is packetized.  In the past we
guaranteed this by queuing these SCBs separarately in
the execution queue.  This exposes the system to potential
command reordering in two cases:

1) Another SCB for the same ITL nexus is queued that does
   not have the MK_MESSAGE flag set.  This SCB will be
   queued to the per-target list which can be serviced
   before the MK_MESSAGE scb that preceeded it.

2) If the target cannot accept all of the commands in the
   per-target selection queue in one selection, the remainder
   is queued to the tail of the selection queues so as to
   effect round-robin scheduling.  This could allow the
   MK_MESSAGE scb to be sent to the target before the
   requeued commands.

This commit changes the firmware policy to defer queuing
MK_MESSAGE SCBs into the selection queues until this can
be done without affecting order.  This means that the
target's selection queue is either empty, or the last
SCB on the execution queue is also a MK_MESSAGE SCB.
During any wait, the firmware halts the download of new
SCBs so only a single "holding location" is required.

Luckily, MK_MESSAGE SCBs are rare and typically occur only
during CAM's bus probe where only one command is outstanding
at a time.  However, during some recovery scenarios, the
reordering *could* occur.

aic79xx.c:
	Update ahd_search_qinfifo() and helper routines to
	search for pending MK_MESSAGE scbs and properly
	restitch the execution queue if either the MK_MESSAGE
	SCB is being aborted, or the MK_MESSAGE SCB can be
	queued due to the execution queue draining due to
	aborts.

	Enable LQOBUSFREE status to assert an interrupt.
	This should be redundant since a BUSFREE interrupt
	should always occur along with an LQOBUSFREE event,
	but on the Rev A, this doesn't seem to be guaranteed.

	When a PPR request is rejected when a previously
	existing packetized agreement is in place, assume
	that the target has been reset without our knowledge
	and revert to async/narrow transfers.  This corrects
	two issues: the stale ENATNO setting that was used
	to send the PPR is cleared so the firmware is not
	confused by a future packetized selection with
	ATN asserted but no MK_MESSAGE flag in the SCB and
	it speeds up recovery by aborting any pending
	packetized transactions that by definition are now
	dead.

	When re-queueing SCBs after a failed negotiation
	attempt, ensure command ordering by freezing the
	device queue first.

	Traverse the list of pending SCBs rather than the
	whole SCB array on the controller when pushing
	MK_MESSAGE flag changes out to the controller.
	The original code was optimized for the aic7xxx
	controllers where there are fewer controller slots
	then pending SCBs and the firmware picks SCB
	slots.  For the U320 controller, the hope is
	that we have fewer pending SCBs then the 512
	slots on the controller.

	Enhance some diagnostics.

	Factor out some common code.

aic79xx.h:
	Add prototype for new ahd_done_with_status() that is
	used to factor out some commone code.

aic79xx.reg:
	Add definisions for the pending MK_MESSAGE SCB.

aic79xx.seq:
	Defer MK_MESSAGE SCB queing to the execution queue
	so as to preserve command ordering.  Re-arrange some
	of the selection processing code so the above change
	had no performance impact on the common code path.

	Close a few critical section holes.

	When entering a non-packetized phase, manually enable
	busfree interrupts, since the controller hardware
	does not do this automatically.

aic79xx_inline.h:
	Enhance logging for queued SCBs.

aic79xx_osm.c:
	Add new a new DDB ahd command, ahd_dump, which
	invokes the ahd_dump_card_state() routine on the
	unit specified with the ahd_sunit DDB command.

aic79xx_pci.c:
	Turn on the BUSFREEREV bug for the Rev B. controller.
	This is required to close the busfree during non-packetized
	phase hole.
2004-08-04 17:55:34 +00:00
Poul-Henning Kamp
3e019deaed Do a pass over all modules in the kernel and make them return EOPNOTSUPP
for unknown events.

A number of modules return EINVAL in this instance, and I have left
those alone for now and instead taught MOD_QUIESCE to accept this
as "didn't do anything".
2004-07-15 08:26:07 +00:00
Stefan Farfeleder
439dfb0c35 Remove erroneous semicolons. 2004-07-13 16:06:19 +00:00
Poul-Henning Kamp
fe12f24bb0 Add missing <sys/module.h> includes 2004-05-30 20:08:47 +00:00
Justin T. Gibbs
22dbd4c64c aic79xx.c:
Allow 500us between pauses in ahd_pause_and_flushwork().
	The maximum we will wait is now 500ms.

	In the same routine, remove any attempt to clear ENSELO.
	Let the firmware do it once the current selection has
	completed.  This avoids some race conditions having to
	do with non-packetized completions and the auto-clearing
	of ENSELO on packetized completions.

	Also avoid attempts to clear critical sections when
	interrups are pending.  We are going to loop again
	anyway, so clearing critical sections is a waste of
	time.  It also may not be possible to clear a critical
	section if the source of the interrupt was a SEQINT.

aic79xx_pci.c:
	Use the Generic 9005 mask when looking for generic 7901B
	parts.  This allows the driver to attach to 7901B parts
	on motherboards using a non-Adaptec subvendor ID.

aic79xx_inline.h:
	Test for the SCBRAM_RD_BUG against the bugs
	field, not the flags field in the softc.

aic79xx.c:
	Cancel pending transactions on devices that
	respond with a selection timeout.  This decreases
	the duration of timeout recovery when a device
	disappears.

aic79xx.c:
	Don't bother forcing renegotiation on a selection
	timeout now that we use the device reset handler
	to abort any pending commands on the target.
	The device reset handler already takes us down
	to async narrow and forces a renegotiation.

	In the device reset handlers, only send a
	BDR sent async event if the status is not
	CAM_SEL_TIMEOUT.  This avoids sending this
	event in the selection timeout case

aic79xx.c:
	Modify the Core timeout handler to verify that another
	command has the potential to timeout before passing off
	a command timeout as due to some other command.  This
	safety measure is added in response to a timeout recovery
	failure on H2B where it appears that incoming reselection
	status was lost during a drive pull test.  In that case,
	the recovery handler continued to wait for the command
	that was active on the bus indefinetly.  While the root
	cause of the above issue is still being determined seems
	a prudent safeguard.

aic79xx_pci.c:
	Add a specific probe entry for the Dell OEM 39320(B).

aic79xx.c:
aic79xx.h:
aic79xx.reg:
aic79xx.seq:
	Modify the aic79xx firmware to never cross a cacheline or
	ADB boundary when DMA'ing completion entries to the host.
	In PCI mode, at least in 32/33 configurations, the SCB
	DMA engine may lose its place in the data-stream should
	the target force a retry on something other than an
	8byte aligned boundary. In PCI-X mode, we do this to
	avoid split transactions since many chipsets seem to be
	unable to format proper split completions to continue
	the data transfer.

	The above change allows us to drop our completion entries
	from 8 bytes to 4.  We were using 8 byte entries to ensure
	that PCI retries could only occur on an 8byte aligned
	boundary.  Now that the sequencer guarantees this by splitting
	up completions, we can safely drop the size to 4 bytes (2
	byte tag, one byte SG_RESID, one byte pad).

	Both the split-completion and PCI retry problems only show
	up under high tag load when interrupt coalescing is being
	especially effective.  The switch from a 2byte completion
	entry to an 8 byte entry to solve the PCI problem increased
	the chance of incurring a split in PCI-X mode when multiple
	transactions were completed at once.  Dropping the completion
	size to 4 bytes also means that we can complete more commands
	in a single DMA (128byte FIFO -> 32 commands instead of 16).

aic79xx.c:
	Modify the SCSIINT handler to defer clearing
	sequencer critical sections to the individual
	interrupt handlers.  This allows us to
	immediately disable any outgoing selections in
	the case of an unexpected busfree so we don't
	inadvertantly clear ENSELO *after* a new selection
	has started.  Doing so may cause the sequencer
	to miss a successful selection.

	In ahd_update_pending_scbs(), only clear ENSELO if
	the bus is currently busy and a selection is not
	already in progress or the sequencer has yet to
	handle a pending selection.  While we want to ensure
	that the selection for the SCB at the head of the
	selection queue is restarted so that any change in
	negotiation request can take effect, we can't clobber
	pending selection state without confusing the sequencer
	into missing a selection.
2004-05-11 20:46:05 +00:00
Justin T. Gibbs
f49574218d o When restarting the sequencer, clear any pending
sequencer interrupt codes.  These codes are only
  relevant to the code that was last being executed
  and that context is cleared when we reset the
  program counter.  This addresses a race condition
  between a sequencer interrupt and any SCSI event
  that causes us to restart the sequencer.

o When running the untagged-Q, we must start the
  timer for any transaction we queue.

o Give the firmware half a millisecond between
  pauses to flush work out.  This should give us
  around half a second of total delay before flagging
  an issue with pausing and flushing controller work.

  Only attempt to clear critical sections if there
  are no pending interrupts in the pause and flush
  loop.  If the sequencer has issued an INTSTAT, we
  may not be able to step out of the critical section.

o Cancel pending transactions on devices that
  respond with a selection timeout.  This decreases
  the duration of timeout recovery when a device
  disappears.

  Don't bother forcing renegotiation on a selection
  timeout now that we use the device reset handler
  to abort any pending commands on the target.
  The device reset handler already takes us down
  to async narrow and forces a renegotiation.

o In the device reset handlers, only send a
  BDR sent async event if the status is not
  CAM_SEL_TIMEOUT.  This avoids sending this
  event in the selection timeout case.

o Modify the Core timeout handler to verify that another
  command has the potential to timeout before passing off
  a command timeout as due to some other command.
2004-05-11 20:39:46 +00:00
Justin T. Gibbs
9fe88a385d Add aic_scb_timer_start() which will be used in the aic7xxx driver to
start the timer on SCBs queued in the untagged SCB queue.

The core treats timeouts in usecs to satisfy Linux requirements.  Multiply
accordingly.
2004-05-11 20:33:42 +00:00
Nate Lawson
5f96beb9e0 Convert callers to the new bus_alloc_resource_any(9) API.
Submitted by:	Mark Santcroos <marks@ripe.net>
Reviewed by:	imp, dfr, bde
2004-03-17 17:50:55 +00:00
Tom Rhodes
a122cca953 These are changes to allow to use the Intel C/C++ compiler (lang/icc)
to build the kernel. It doesn't affect the operation if gcc.

Most of the changes are just adding __INTEL_COMPILER to #ifdef's, as
icc v8 may define __GNUC__ some parts may look strange but are
necessary.

Additional changes:
 - in_cksum.[ch]:
   * use a generic C version instead of the assembly version in the !gcc
     case (ASM code breaks with the optimizations icc does)
     -> no bad checksums with an icc compiled kernel
     Help from:		andre, grehan, das
     Stolen from: 	alpha version via ppc version
     The entire checksum code should IMHO be replaced with the DragonFly
     version (because it isn't guaranteed future revisions of gcc will
     include similar optimizations) as in:
        ---snip---
          Revision  Changes    Path
          1.12      +1 -0      src/sys/conf/files.i386
          1.4       +142 -558  src/sys/i386/i386/in_cksum.c
          1.5       +33 -69    src/sys/i386/include/in_cksum.h
          1.5       +2 -0      src/sys/netinet/igmp.c
          1.6       +0 -1      src/sys/netinet/in.h
          1.6       +2 -0      src/sys/netinet/ip_icmp.c

          1.4       +3 -4      src/contrib/ipfilter/ip_compat.h
          1.3       +1 -2      src/sbin/natd/icmp.c
          1.4       +0 -1      src/sbin/natd/natd.c
          1.48      +1 -0      src/sys/conf/files
          1.2       +0 -1      src/sys/conf/files.amd64
          1.13      +0 -1      src/sys/conf/files.i386
          1.5       +0 -1      src/sys/conf/files.pc98
          1.7       +1 -1      src/sys/contrib/ipfilter/netinet/fil.c
          1.10      +2 -3      src/sys/contrib/ipfilter/netinet/ip_compat.h
          1.10      +1 -1      src/sys/contrib/ipfilter/netinet/ip_fil.c
          1.7       +1 -1      src/sys/dev/netif/txp/if_txp.c
          1.7       +1 -1      src/sys/net/ip_mroute/ip_mroute.c
          1.7       +1 -2      src/sys/net/ipfw/ip_fw2.c
          1.6       +1 -2      src/sys/netinet/igmp.c
          1.4       +158 -116  src/sys/netinet/in_cksum.c
          1.6       +1 -1      src/sys/netinet/ip_gre.c
          1.7       +1 -2      src/sys/netinet/ip_icmp.c
          1.10      +1 -1      src/sys/netinet/ip_input.c
          1.10      +1 -2      src/sys/netinet/ip_output.c
          1.13      +1 -2      src/sys/netinet/tcp_input.c
          1.9       +1 -2      src/sys/netinet/tcp_output.c
          1.10      +1 -1      src/sys/netinet/tcp_subr.c
          1.10      +1 -1      src/sys/netinet/tcp_syncache.c
          1.9       +1 -2      src/sys/netinet/udp_usrreq.c

          1.5       +1 -2      src/sys/netinet6/ipsec.c
          1.5       +1 -2      src/sys/netproto/ipsec/ipsec.c
          1.5       +1 -1      src/sys/netproto/ipsec/ipsec_input.c
          1.4       +1 -2      src/sys/netproto/ipsec/ipsec_output.c

          and finally remove
            sys/i386/i386        in_cksum.c
            sys/i386/include     in_cksum.h
        ---snip---
 - endian.h:
   * DTRT in C++ mode
 - quad.h:
   * we don't use gcc v1 anymore, remove support for it
   Suggested by:	bde (long ago)
 - assym.h:
   * avoid zero-length arrays (remove dependency on a gcc specific
     feature)
     This change changes the contents of the object file, but as it's
     only used to generate some values for a header, and the generator
     knows how to handle this, there's no impact in the gcc case.
   Explained by:	bde
   Submitted by:	Marius Strobl <marius@alchemy.franken.de>
 - aicasm.c:
   * minor change to teach it about the way icc spells "-nostdinc"
   Not approved by:	gibbs (no reply to my mail)
 - bump __FreeBSD_version (lang/icc needs to know about the changes)

Incarnations of this patch survive gcc compiles since a loooong time,
I use it on my desktop. An icc compiled kernel works since Nov. 2003
(exceptions: snd_* if used as modules), it survives a build of the
entire ports collection with icc.

Parts of this commit contains suggestions or submissions from
Marius Strobl <marius@alchemy.franken.de>.

Reviewed by:	-arch
Submitted by:	netchild
2004-03-12 21:45:33 +00:00
Tom Rhodes
06d6e4fcfe This are the build infrastructure changes to allow to use the
Intel C/C++ compiler (lang/icc) to build the kernel.

The icc CPUTYPE CFLAGS use icc v7 syntax, icc v8 moans about them, but
doesn't abort. They also produce CPU specific code (new instructions
of the CPU, not only CPU specific scheduling), so if you get coredumps
with signal 4 (SIGILL, illegal instruction) you've used the wrong
CPUTYPE.

Incarnations of this patch survive gcc compiles and my make universe.
I use it on my desktop.

To use it update share/mk, add
	/usr/local/intel/compiler70/ia32/bin	(icc v7, works)
or
	/usr/local/intel_cc_80/bin		(icc v8, doesn't work)
to your PATH, make sure you have a new kernel compile directory
(e.g. MYKERNEL_icc) and run
	CFLAGS="-O2 -ip" CC=icc make depend
	CFLAGS="-O2 -ip" CC=icc make
in it.

Don't compile with -ipo, the build infrastructure uses ld directly to
link the kernel and the modules, but -ipo needs the link step to be
performed with Intel's linker.

Problems with icc v8:
 - panic: npx0 cannot be emulated on an SMP system
 - UP: first start of /bin/sh results in a FP exception

Parts of this commit contains suggestions or submissions from
Marius Strobl <marius@alchemy.franken.de>.

Reviewed by:	silence on -arch
Submitted by:	netchild
2004-03-12 21:36:12 +00:00
Ruslan Ermilov
47d7e8a96f Fixed style of DPADD and LDADD assignments as per style.Makefile(5). 2004-02-05 22:44:25 +00:00
Justin T. Gibbs
d44d2bb948 aic7xxx.c:
Shorten a diagnostic printf to fit in 80 columns.

	In ahc_abort_scbs() remove an incorrect diagnostic test
	that printed a spurious warning.
2004-02-04 16:40:08 +00:00
Justin T. Gibbs
4164174aff aic79xx.c:
aic79xx.seq:
	Convert the COMPLETE_DMA_SCB list to an "stailq".  This allows us to
	safely keep the SCB that is currently being DMA'ed back the host on
	the head of the list while processing completions off of the bus.  The
	newly completed SCBs are appended to the tail of the queue.   In the
	past, we just dequeued the SCB that was in flight from the list, but
	this could result in a lost completion should the host perform certain
	types of error recovery that must cancel all in-flight SCB DMA operations.

	Switch from using a 16bit completion entry, holding just the tag and the
	completion valid bit, to a 64bit completion entry that also contains a
	"status packet valid" indicator.  This solves two problems:
	  o The SCB DMA engine on at least Rev B. silicon does not properly deal
	    with a PCI disconnect that occurs at a non-64bit aligned offset in the
	    chips "source buffer".  When the transfer is resumed, the DMA engine
	    continues at the correct offset, but may wrap to the head of the buffer
	    causing duplicate completions to be reported to the host.  By using a
	    completion buffer in host memory that is 64bit aligned and using 64bit
	    completion entries, such disconnects should only occur at aligned addresses.
	    This assumes that the host bridge will only disconnect on cache-line
	    boundaries and that cache-lines are multpiles of 64bits.

	  o By embedding the status information in the completion entry we can avoid
	    an extra memory reference to the HSCB for commands that complete without
	    error.

	Use the comparison of a "host freeze count" and a "sequencer freeze count"
	to allow the host to process most SCBs that complete with non-zero status
	without having to clear critical sections.  Instead the host can just pause the
	sequencer, performs any necessary cleanup in the waiting for selection list,
	increments its freeze count on the controller, and unpauses.  This is only
	possible because the sequencer defers completions of SCBs with bad status
	until after all pending selections have completed.  The sequencer then avoids
	referencing any data structures the host may touch during completion of the
	SCB until the freeze counts match.

aic79xx.c:
	Change the strategy for allocating our sentinal HSCB for the QINFIFO.  In
	the past, this allocation was tacked onto the QOUTFIFO allocation.  Now that
	the qoutfifo has grown to accomodate larger completion entries, the old
	approach will result in a 64byte allocation that costs an extra page of
	coherent memory.  We now do this extra allocation via ahd_alloc_scbs()
	where the "unused space" can be used to allocate "normal" HSCBs.

	In our packetized busfree handler, use the ENSELO bit to differentiate
	between packetized and non-packetized unexpected busfree events that
	occur just after selection, but before the sequencer has had the oportunity
	to service the selection.

	When cleaning out the waiting for selection list, use the SCSI mode
	instead of the command channel mode.  The SCB pointer in the command
	channel mode may be referenced by the SCB dma engine even while the
	sequencer is paused, whereas the SCSI mode SCB pointer is only accessed
	by the sequencer.

	Print the "complete on qfreeze" sequencer SCB completion list in
	ahd_dump_card_state().  This list holds all SCB completions that are deferred
	until a pending select-out qfreeze event has taken effect.

aic79xx.h:
	Add definitions and structures to handle the new SCB completion scheme.

	Add a controller flag that indicates if the controller is in HostRAID
	mode.

aic79xx.reg:
	Remove macros used for toggling from one data fifo mode to the other.
	They have not been in use for some time.

	Add scratch ram fields for our new qfreeze count scheme, converting
	the complete dma list into an "stailq", and providing for the "complete
	on qfreeze" SCB completion list.  Some other fields were moved to retain
	proper field alignment (alignment >= field size in bytes).

aic79xx.seq:
	Add code to our idle loop to:
	  o Process deferred completions once a qfreeze event has taken full
	    effect.
	  o Thaw the queue once the sequencer and host qfreeze counts match.

	Generate 64bit completion entries passing the SCB_SGPTR field as the
	"good status" indicator.  The first bit in this field is only set if
	we have a valid status packet to send to the host.

	Convert the COMPLETE_DMA_SCB list to an "stailq".

	When using "setjmp" to register an idle loop handler, do not combine
	the "ret" with the block move to pop the stack address in the same
	instruction.  At least on the A, this results in a return to the setjmp
	caller, not to the new address at the top of the stack.  Since we want
	the latter (we want the newly registered handler to only be invoked from
	the idle loop), we must use a separate ret instruction.

	Add a few missing critical sections.

	Close a race condition that can occur on Rev A. silicon.  If both FIFOs
	happen to be allocated before the sequencer has a chance to service the
	FIFO that was allocated first, we must take special care to service the
	FIFO that is not active on the SCSI bus first.  This guarantees that a
	FIFO will be freed to handle any snapshot requests for the FIFO that is
	still on the bus.  Chosing the incorrect FIFO will result in deadlock.

	Update comments.

aic79xx_inline.h
	Correct the offset calculation for the syncing of our qoutfifo.

	Update ahd_check_cmdcmpltqueues() for the larger completion entries.

aic79xx_pci.c:
	Attach to HostRAID controllers by default.  In the future I may add a
	sysctl to modify the behavior, but since FreeBSD does not have any
	HostRAID drivers, failing to attach just results in more email and
	bug reports for the author.

MFC After: 1week
2004-02-04 16:38:38 +00:00
Justin T. Gibbs
670c55996b Move all of the recovery thread routines next
to each other.

Correct the recovery thread's loop so that it
will terminate properly on shutdown.  We also
clear the recovery_thread proc pointer so that
any additional calls to aic_terminate_recovery_thread()
will not attempt to kill a thread that doesn't
exist.  Lastly, code the loop so that termination
will still be successfull even if the termination
request occurs just prior to us entering the loop
or while the recovery thread is off recovering
commands.
2003-12-19 18:34:30 +00:00
Justin T. Gibbs
913fd65e92 We only need to terminate our recovery thread once. 2003-12-19 18:10:59 +00:00
Justin T. Gibbs
8d4d7b6e19 In ahd_run_qoutfifos, correct a !=/== logic bug
that would cause an infinite loop any time we
manually flush the good status FIFO.  Also make
our loop delay unconditional to ensure we don't
miss any FIFO allocations by the hardware.
2003-12-19 04:17:43 +00:00
Justin T. Gibbs
b3b25f2cbf ahc_eisa.c:
ahc_pci.c:
ahd_pci.c:
aic7xxx.c:
aic79xx.c:
aic_osm_lib.c:
aic_osm_lib.h:
	Use common OSM routines from aic_osm_lib for bus dma operations,
	delay routines, accessing CCBs, byte swapping, etc.

aic7xxx_pci.c:
	Provide a better description for the 2915/30LP on attach.

aic7xxx.c:
aic79xx.c:
aic7770.c:
aic79xx_pci.c:
aic7xxx_pci.c:
aic7xxx_93cx6.c:
	Move FBSDID behind an ifdef so that these core files will
	still compile under other OSes.

aic79xx.h:
aic79xx_pci.c:
aic79xx.seq:
	To speed up non-packetized CDB delivery in Rev B, all CDB
	acks are "released" to the output sync as soon as the
	command phase starts.  There is only one problem with this
	approach.  If the target changes phase before all data are
	sent, we have left over acks that can go out on the bus in
	a data phase.  Due to other chip contraints, this only
	happens if the target goes to data-in, but if the acks go
	out before we can test SDONE, we'll think that the transfer
	has completed successfully.  Work around this by taking
	advantage of the 400ns or 800ns dead time between command
	phase and the REQ of the new phase.  If the transfer has
	completed successfully, SCSIEN should fall *long* before we
	see a phase change.  We thus treat any phasemiss that
	occurs before SCSIEN falls as an incomplete transfer.

	aic79xx.h:
		Add the AHD_FAST_CDB_DELIVERY feature.

	aic79xx_pci.c:
		Set AHD_FAST_CDB_DELIVERY for all Rev. B parts.

	aic79xx.seq:
		Test for PHASEMIS in the command phase for
		all AHD_FAST_CDB_DELIVERY controlelrs.

ahd_pci.c:
ahc_pci.c:
aic7xxx.h:
aic79xx.h:
	Move definition of controller BAR offsets to core header files.

aic7xxx.c:
aic79xx.c:
	In the softc free routine, leave removal of a softc from the
	global list of softcs to the OSM (the caller of this routine).
	This allows us to avoid holding the softc list_lock during device
	destruction where we may have to sleep waiting for our recovery
	thread to halt.

ahc_pci.c:
	Use ahc_pci_test_register access to validate I/O mapped in
	addition to the tests already performed for memory mapped
	access.

	Remove unused ahc_power_state_change() function.  The PCI
	layer in both 4.X and 5.X now offer this functionality.

ahd_pci.c:
	Remove reduntant definition of controller BAR offsets.  These
	are also defined in aic79xx.h.

	Remove unused ahd_power_state_change() function.  The PCI
	layer in both 4.X and 5.X now offer this functionality.

aic7xxx.c:
aic79xx.c:
aic79xx.h:
aic7xxx.h:
aic7xxx_osm.c:
aic79xx_osm.c:
	Move timeout handling to the driver cores.  In the case
	of the aic79xx driver, the algorithm has been enhanced
	to try target resets before performing a bus reset.  For
	the aic7xxx driver, the algorithm is unchanged.  Although
	the drivers do not currently sleep during recovery (recovery
	is timeout driven), the cores do expect all processing to
	be performed via a recovery thread.  Our timeout handlers
	are now little stubs that wakeup the recovery thread.

aic79xx.c:
aic79xx.h:
aic79xx_inline.h:
	Change shared_data allocation to use a map_node so
	that the sentinel hscb can use this map node in
	ahd_swap_with_next_hscb.  This routine now swaps
	the hscb_map pointer in additon to the hscb
	contents so that any sync operations occur on
	the correct map.

	physaddr -> busaddr

	Pointed out by: Jason Thorpe <thorpej@wasabisystems.com>

aic79xx.c:
	Make more use of the in/out/w/l/q macros for accessing
	byte registers in the chip.

	Correct some issues in the ahd_flush_qoutfifo() routine.
	    o Run the qoutfifo only once the command channel
	      DMA engine has been halted.  This closes a window
	      where we might have missed some entries.
	    o Change ahd_run_data_fifo() to not loop to completion.
	      If we happen to start on the wrong FIFO and the other
	      FIFO has a snapshot savepointers, we might deadlock.
	      This required our delay between FIFO tests to be
	      moved to the ahd_flush_qoutfifo() routine.
	    o Update/add comments.
	    o Remove spurious test for COMPLETE_DMA list being empty
	      when completing transactions from the GSFIFO with
	      residuals.  The SCB must be put on the COMPLETE_DMA
	      scb list unconditionally.
	    o When halting command channel DMA activity, we must
	      disable the DMA channel in all cases but an update
	      of the QOUTFIFO.  The latter case is required so
	      that the sequencer will update its position in the
	      QOUTFIFO.  Previously, we left the channel enabled
	      for all "push" DMAs.  This left us vulnerable to
	      the sequencer handling an SCB push long after that
	      SCB was already processed manually by this routine.
	    o Correct the polarity of tests involving
	      ahd_scb_active_in_fifo().  This routine returns
	      non-zero for true.

	Return to processing bad status completions through
	the qoutfifo.  This reduces the time that the sequencer
	is kept paused when handling transactions with bad
	status or underruns.

	When waiting for the controller to quiece selections,
	add a delay to our loop.  Otherwise we may fail to wait
	long enough for the sequencer to comply.

	On H2A4 hardware, use the slow slewrate for non-paced
	transfers.  This mirrors what the Adaptec Windows
	drivers do.

	On the Rev B. only slow down the CRC timing for
	older U160 devices that might need the slower timing.
	We define "older" as devices that do not support
	packetized protocol.

	Wait up to 5000 * 5us for the SEEPROM to become unbusy.
	Write ops seem to take much longer than read ops.

aic79xx.seq:
	For controllers with the FAINT_LED bug, turn the diagnostic
	led feature on during selection and reselection.  This covers
	the non-packetized case.  The LED will be disabled for
	non-packetized transfers once we return to the top level idle
	loop.  Add more comments about the busy LED workaround.

	Extend a critical section around the entire
	command channel idle loop process.  Previously
	the portion of this handler that directly manipulated
	the linked list of completed SCBs was not protected.
	This is the likely cause of the recent reports of
	commands being completed twice by the driver.

	Extend critical sections across the test for,
	and the longjump to, longjump routines.  This
	prevents the firmware from trying to jump to
	a longjmp handler that was just cleared by the
	host.

	Improve the locations of several critical section
	begin and end points.  Typically these changes
	remove instructions that did not need to be
	inside a critical section.

	Close the "busfree after selection, but before busfree
	interrupts can be enabled" race to just a single sequencer
	instruction.  We now test the BSY line explicitly before
	clearing the busfree status and enabling the busfree
	interrupt.

	Close a race condition in the processing of HS_MAILBOX
	updates.  We now clear the "updated" status before the
	copy.  This ensures that we don't accidentally clear
	the status incorrectly when the host sneaks in an update
	just after our last copy, but before we clear the status.
	This race has never been observed.

	Don't re-enable SCSIEN if we lose the race to disable SCSIEN
	in our interrupt handler's workaround for the RevA data-valid
	too early issue.

aic79xx_inline.h:
	Add comments indicating that the order in which bytes are
	read or written in ahd_inw and ahd_outw is important.  This
	allows us to use these inlines when accessing registers with
	side-effects.

aic79xx_pci.c:
	The 29320 and the 29320B are 7902 not 7901 based products.
	Correct the driver banner.

aic7xxx.h:
	Enable the use of the auto-access pause feature
	on the aic7870 and aic7880.  It was disabled due
	to an oversight.

aic7xxx.reg:
	Move TARG_IMMEDIATE_SCB to alias LAST_MSG to
	avoid leaving garbage in MWI_RESIDUAL.  This
	prevents spurious overflows whn operating target
	mode on controllers that require the MWI_RESIDUAL
	work-around.

aic7xxx.seq:
	AHC_TMODE_WIDEODD_BUG is a bug, not a softc flag.
	Reference the correct softc field when testing
	for its presence.

	Set the NOT_IDENTIFIED and NO_CDB_SENT bits
	in SEQ_FLAGS to indicate that the nexus is
	invalid in await busfree.

aic7xxx_93cx6.c:
	Add support for the C56/C66 versions of the EWEN and EWDS
	commands.

aic7xxx.c:
aic7xxx_pci.c:
	Move test for the validity of left over BIOS data
	to ahc_test_register_access().  This guarantees that
	any left over CHIPRST value is not clobbered by our
	register access test and lost to the test that was
	in ahc_reset.
2003-12-17 00:02:10 +00:00
Justin T. Gibbs
91d00a4fce When outputing a code listing, properly display
macros that expand to multiple instructions.
2003-12-17 00:01:11 +00:00
Justin T. Gibbs
708d2cb029 Modify assembler to ignore carriage returns in input.
This should make those using the assembler under cygwin
happy.
2003-12-16 23:54:07 +00:00
Warner Losh
347934fa63 Sometimes cardbus attachments don't attach, so while we track down
this problem put these lines back in.  While they should be
unnecessary, they appear to be sometimes necessary.

Reviewed in concept: dfr
Approved by: re (scottl@)
2003-11-28 05:28:29 +00:00
Doug Rabson
0be389f3ca Remove explicit cardbus attachments from drivers where this is identical
to the pci attachment. Cardbus is a derived class of pci so all pci
drivers are automatically available for matching against cardbus devices.

Reviewed by: imp
2003-11-03 09:22:18 +00:00
Dag-Erling Smørgrav
76bfe7b119 0x7FFFFFFFFF is >32 bits and needs an explicit LL. 2003-10-23 13:42:03 +00:00
Scott Long
ba079c0d9f aic79xx_pci.c:
aic7xxx_pci.c:
	When performing our register test, be careful
	to avoid resetting the chip when pausing the
	controller.  The test reads the HCNTRL register
	and then writes it back with the PAUSE bit
	explicitly set.  If the last write to the controller
	before our probe is to reset it, the CHIPRST
	bit will still be set, so we must mask it off
	before the PAUSE operation.  On some chip versions,
	we cannot access registers for a few 100us after
	a reset, so this inadvertant reset was causing PCI
	errors to occur on the read to check for paused
	status.

Submitted by:	gibbs
2003-09-25 23:36:41 +00:00
John Baldwin
e27951b29c Use PCIR_BAR(x) instead of PCIR_MAPS.
Glanced over by:	imp, gibbs
Tested by:		i386 LINT
2003-09-02 17:30:40 +00:00
David E. O'Brien
aad970f1fe Use __FBSDID().
Also some minor style cleanups.
2003-08-24 17:55:58 +00:00
Warner Losh
4fbd232c86 Prefer new location of pci include files (which have only been in the
tree for two or more years now), except in a few places where there's
code to be compatible with older versions of FreeBSD.
2003-08-22 05:54:52 +00:00
Scott Long
f6b1c44d1f Mega busdma API commit.
Add two new arguments to bus_dma_tag_create(): lockfunc and lockfuncarg.
Lockfunc allows a driver to provide a function for managing its locking
semantics while using busdma.  At the moment, this is used for the
asynchronous busdma_swi and callback mechanism.  Two lockfunc implementations
are provided: busdma_lock_mutex() performs standard mutex operations on the
mutex that is specified from lockfuncarg.  dftl_lock() is a panic
implementation and is defaulted to when NULL, NULL are passed to
bus_dma_tag_create().  The only time that NULL, NULL should ever be used is
when the driver ensures that bus_dmamap_load() will not be deferred.
Drivers that do not provide their own locking can pass
busdma_lock_mutex,&Giant args in order to preserve the former behaviour.

sparc64 and powerpc do not provide real busdma_swi functions, so this is
largely a noop on those platforms.  The busdma_swi on is64 is not properly
locked yet, so warnings will be emitted on this platform when busdma
callback deferrals happen.

If anyone gets panics or warnings from dflt_lock() being called, please
let me know right away.

Reviewed by:	tmm, gibbs
2003-07-01 15:52:06 +00:00
Justin T. Gibbs
dcc9985adf Fix a race condition in the flushing of commands that
have completed across the bus but not to the host before
processing of an exception condition (busfree, bus reset,
etc.).  When flushing the controller of completed commands,
we also look for packetized commands that have completed
with good status and are stored in the "good status fifo".
The hardware will post to the good status fifo even if
data for that command is still active in a FIFO.  In
one particular failure case, a command outstanding on the
bus reconnected, transferred data into a FIFO, and provided
good status while the host driver was processing an expected
busfree event (PPR message negotiation).  This resulted in
an entry in the good status fifo that we completed, but
since the sequencer was paused, the data in the data FIFO
for this command had never been transferred to the host.
Once the busfree processing was complete, the sequencer
was unpaused, and the data completed its transfer to the
host.  In some instances, the client for the data was notified
of the completion and attempted to view the data before
it arrived.  This case only occurred during FreeBSD's
multi-target probe of the SCSI bus while some devices are
negotiating to go packetized and some devices are already
running in packetized.

The fix is to run and FIFOs active with a context in the
good status fifo to completion before completing the command
to the SCSI layer.  This requies duplicating the FIFO rundown
operations in the host driver that would usually be handled
by the firmware, but there is no other alternative.

Don't blindly shutdown the SCB dma engine when restarting
the sequencer.  We may be killing an operation that is
not supposed to be cancelled.  The cases where we need to
shutdown these dma engines are already handled elsewhere in
the driver.

Fix a few more ahd_in?() -> ahd_in?_scbram() instances.
2003-06-28 04:46:54 +00:00
Justin T. Gibbs
4294c2dc56 aic79xx.h:
Add softc flag to indicate that we have seen at
	least one selection since the last bus reset or
	SE/LVD bus change.

aic79xx.c:
	Fix a few style nits.

	In ahd_update_pending_scbs(), only touch card registers
	once we have found an SCB that needs to be updated.
	This removes lots of clutter from PCI traces taken of
	error recovery performed by the driver.

	Short circuit the first selection iocell workaround handler
	if we've run once since the last bus reset or iocell change.
	This also removes clutter from PCI traces.

	Note if completions are pending in the qoutfifo when we dump
	card state.
2003-06-28 04:45:25 +00:00
Justin T. Gibbs
83441ad3bb Use clr instead of an explicit mov from ALLZEROS
to clear SCB_FIFO_USE_COUNT.  This is just a
syntactic change.
2003-06-28 04:44:10 +00:00
Justin T. Gibbs
1220a072a6 Implement ahd_inq_scbram() and change the implemention
of ahd_inl_scbram to use ahd_inw_scbram instead of
ahd_inb_scbram().
2003-06-28 04:43:19 +00:00
Justin T. Gibbs
b598de8f92 Correct a typo in a comment.
Add a comment in ahd_clear_critical_sections() about
our need to leave ENBUSFREE set in SIMODE1 while single
stepping.

Re-arrange some delay loops so that we always perform
a read after any register write and before the delay.
This should make the delay loop more accurate.

When completing message processing for a packetized
commention, return the controller to a state where
invalid non-packetized phases will still cause protocol
violations.  These are the same operations as those
performed in the clear_target_state routine in the
firmware.

Now that we have a chip with working ABORTPENDING
support (the 7901B), comment out the automatic use
of this feature until we can adequately test it.
The previous checkin updated the bug mask for the
7901B so this code was exercised.

When resetting the bus, perform an ahd_flush_device_writes()
call so that our reset assertion delay is acurately
timed from when the reset bit is written to the controller.
2003-06-28 04:42:11 +00:00
Justin T. Gibbs
e46bab9aea aic79xx.seq:
Remove an old comment that no longer applies.

	Fix a jump in our unexpected non-packetized phase
	handler to use an explicit lable.  The old code
	had a hardcoded jump offset that was off by one
	instruction.
2003-06-28 04:40:46 +00:00
Justin T. Gibbs
c8ee71777e aic79xx.h:
Add a 7901A specific feature definition.

aic79xx_pci.c:
	Split out the general aic790X setup into it's own
	setup handler that works on single and dual controllers.
	Adjust all other PCI setup handlers to initialize the
	chips basic features and type before calling the generic
	handler.

	Turn off a few Rev B workarounds that are not required
	on the 7901B.
2003-06-28 04:39:49 +00:00
Justin T. Gibbs
f5db59f9d6 Add parenthesis so that we get all of the bits all
of the contents of the CCSCBCTL register into our
local varaible.  The other bits are used in later tests.
This avoids a potential deadlock in ahd_run_qoutfifo()
if we happen to catch the DMA engine in just the right
state.
2003-06-23 22:06:34 +00:00