Commit Graph

10 Commits

Author SHA1 Message Date
Pedro F. Giffuni
6e778a7efd SPDX: license IDs for some ISC-related files. 2017-12-08 15:57:29 +00:00
Adrian Chadd
e0c214d1bb Bring over some new EEPROM regulatory domain flags.
Obtained from:	Qualcomm Atheros
2012-08-24 01:14:00 +00:00
Adrian Chadd
7239f9f75b Introduce the FRAC_5G EEPROM parameter.
This seems to indicate whether to program the NIC for fractional 5ghz
mode (ie, 5mhz spaced channels, rather than 10 or 20mhz spacing) or not.
The default (0) seems to mean "only program fractional mode if needed".
A different value (eg 1) seems to always enable fractional 5ghz mode
regardless of the frequency.

Obtained from:	Atheros
Approved by:	re (kib)
2011-07-30 13:45:12 +00:00
Adrian Chadd
a1cf3a877a Add temp sense to the EEPROM variable list;
Export the temperature sense variables to ah_eeprom_9287.c
2011-05-26 08:20:14 +00:00
Adrian Chadd
047d6827d0 Import initial EEPROM code for Kite (AR9287).
I've tested this locally and it does indeed read and attach to an AR9287
EEPROM. But a lot more code needs to be ported over to the HAL before
the AR9287 is functional.

I'm importing this separate from the rest of the codebase (and unlinked from
the build for now) in case someone wishes to begin fiddling with porting
the rest of the code over from Linux ath9k.

Obtained from:	Linux ath9k
2011-05-14 14:25:15 +00:00
Adrian Chadd
c50678682f Introduce the Merlin PWDCLKIND workaround.
This is something bus clock related from what I can gather. It is needed for
the AR9220 based Ubiquiti SR71-12 and SR71-15 Mini-PCI NICs.

(Note: those NICs don't work right now because of earlier changes to handle
power table offset correctly. That'll be resolved in a follow-up commit.)
2011-03-10 02:09:06 +00:00
Adrian Chadd
8823714276 Add an EEPROM op that extracts out the power table offset.
It defaults to -5 dBm for eeproms earlier than v21.

This apparently only applies to Merlin (AR9280) or later,
earlier 11n chipsets have a power table offset of 0.
All the code in ath9k which checks the power table offset
and takes it into account first ensures the chip is
Merlin or later.
2011-03-06 00:30:43 +00:00
Adrian Chadd
c485136b7f Port over another EEPROM option from ath9k - AR_EEP_DAC_HPWR_5G
This will be used by the temperature compensation calibration code
which will shortly make an appearance.
2011-01-20 07:42:39 +00:00
Rui Paulo
3e9c59558d Replace Id keyword with FreeBSD keyword and set the svn props correctly.
No functional change.
2010-03-03 17:32:32 +00:00
Sam Leffler
1477970585 import ath hal 2008-12-01 16:43:08 +00:00