Commit Graph

40 Commits

Author SHA1 Message Date
Bruce Evans
f71d35e402 Removed unused #includes. 1997-07-20 14:10:18 +00:00
Stefan Eßer
b3daa02e72 Yet another fix for configuration mechanism 1 register accesses:
Adjust the data port address by adding the two low order bits of
the register number. The address port takes only a word address
(i.e. ignores the two low order bits written to it).
1997-05-26 21:52:41 +00:00
Stefan Eßer
64039d403f Fix previous fix: The enable bit is bit 31 (0x8000000) and not bit 15. 1997-05-26 21:25:24 +00:00
Stefan Eßer
e0c57a9615 Set enable bit when writing the configuration address in configuration
mode 1. Omission of this bit makes all config register accesses fail in
on recent chip sets ...

(The problem was reported and debug output provided by: Steve Passe)
1997-05-26 21:11:05 +00:00
Stefan Eßer
5bec615793 Completely replace the PCI bus driver code to make it better reflect
reality. There will be a new call interface, but for now the file
pci_compat.c (which is to be deleted, after all drivers are converted)
provides an emulation of the old PCI bus driver functions. The only
change that might be visible to drivers is, that the type pcici_t
(which had been meant to be just a handle, whose exact definition
should not be relied on), has been converted into a pcicfgregs* .

The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t
and has been converted to just call the PCI drivers functions to access
configuration space register, instead of inventing its own ...

This code is by no means complete, but assumed to be fully operational,
and brings the official code base more in line with my development code.

A new generic device descriptor data type has to be agreed on. The PCI
code will then use that data type to provide new functionality:

1) userconfig support
2) "wired" PCI devices
3) conflicts checking against ISA/EISA
4) maps will depend on the command register enable bits
5) PCI to Anything bridges can be defined as devices,
   and are probed like any "standard" PCI device.

The following features are currently missing, but will be added back,
soon:

1) unknown device probe message
2) suppression of "mirrored" devices caused by ancient, broken chip-sets

This code relies on generic shared interrupt support just commited to
kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
Stefan Eßer
5c03639065 Mask out revision register in consistency test of class register. 1997-04-09 11:34:50 +00:00
Stefan Eßer
6df09d1e0b Fix spelling of align and interrupt in comments. 1997-04-09 09:16:27 +00:00
Stefan Eßer
b4b8847934 Fix consistency test to not fail on pre PCI 2.0 motherboards 1997-04-09 09:15:03 +00:00
Stefan Eßer
81cf5d7aae improve pcibus_check: Only assume PCI if at least one PCI to anything bridge
on bus 0.
This fixes problems with EISA-only systems mistakenly being assumed to support PCI.
1997-03-05 20:52:00 +00:00
Peter Wemm
6875d25465 Back out part 1 of the MCFH that changed $Id$ to $FreeBSD$. We are not
ready for it yet.
1997-02-22 09:48:43 +00:00
Bruce Evans
4123678332 Sync with <pci/pcibus.h>. pcibus.c unfortunately still compiled (with
only 3 or 4 warnings) when pb_maxirq went away.
1997-01-25 18:51:01 +00:00
Jordan K. Hubbard
1130b656e5 Make the long-awaited change from $Id$ to $FreeBSD$
This will make a number of things easier in the future, as well as (finally!)
avoiding the Id-smashing problem which has plagued developers for so long.

Boy, I'm glad we're not using sup anymore.  This update would have been
insane otherwise.
1997-01-14 07:20:47 +00:00
Nate Williams
62ce633d36 Make the code more consistant by using the INTR*MASK macros througout the
code.

Reviewed by:	bde

[
Bruce suggest removing the macros completely, but I'm not up to that
task quite yet.
]
1997-01-08 16:12:56 +00:00
Satoshi Asami
e30f001135 More merge and update.
(1) deleted #if 0

    pc98/pc98/mse.c

(2) hold per-unit I/O ports in ed_softc

    pc98/pc98/if_ed.c
    pc98/pc98/if_ed98.h

(3) merge more files by segregating changes into headers.

  new file (moved from pc98/pc98):

    i386/isa/aic_98.h

  deleted:

    well, it's already in the commit message so I won't repeat the
    long list here ;)

Submitted by:	The FreeBSD(98) Development Team
1996-10-30 22:41:46 +00:00
Bruce Evans
9b2b0822b7 Removed unused #includes of <i386/isa/icu.h> and <i386/isa/icu.h>. icu.h
is only used by the icu support modules and by a few drivers that know
too much about the icu (most only use it to convert `n' to `IRQn').  isa.h
is only used by ioconf.c and by a few drivers that know too much about
isa addresses (a few have to, because config is deficient).
1996-06-18 01:22:40 +00:00
Stefan Eßer
21219d2116 Change CONF1_ENABLE_MSK to 0x7ff00000 in another attempt to decide
whether a system could possibly support PCI configuration mechanism 1
(or whether it rather is an EISA only system ...).
1996-06-13 21:50:41 +00:00
Stefan Eßer
e20df7fc31 Make pcibus_check() ignore Device/Vendor IDs of all 0. 1996-04-30 21:37:21 +00:00
Bruce Evans
3157adc8af Removed now-unused #includes of <machine/cpu.h>. They were for bootverbose
being declared in the wrong place.
1996-04-07 17:32:42 +00:00
Bruce Evans
a680ab7537 Count PCI irqs in up to 4 ISAish counters named `pci irqnn' instead of
in the clk0 counter.

Reviewed by:	s
1996-03-29 15:01:51 +00:00
Bruce Evans
6ea3e9d839 Completed function declarations and/or added prototypes and/or added
#includes to get prototypes.

pci now uses a different interrupt handler type for interrupts that it
dispatches and the isa interrupt handler type for the interrupts that
it handles.
1995-12-16 00:27:59 +00:00
Poul-Henning Kamp
6f4e0beb7e Staticize and cleanup. 1995-12-10 13:40:44 +00:00
Stefan Eßer
2e80ea0536 Make CONF1_ENABLE_MSK1 even less restriktive: Ignore slot ID ... 1995-10-17 23:30:11 +00:00
Stefan Eßer
0e2f699b9e At least the ASUS Triton motherboards don't disable the PCI bus configuration
accesses after the BIOS bus scan. The previous revision made the assumption,
that every PCI motherboard did ...

Change the test on the initial value of the CONF1_ADDR_PORT register in a way
that makes the probe succeed on triton based motherboards, without breaking
the EISA motherboard that has some non-PCI register at the same address.
1995-10-17 15:23:14 +00:00
Stefan Eßer
287911bd50 Go back to separate tests for configuration mechanism 1 and mechanism 2.
Require the state of the configuration enable bits to be OFF assuming
that the BIOS left them that way, as it should anyway to avoid bad things
to happen.

The tests themselves are copied from the previous release, with the
exception of CONF1_ENABLE_MSK1 having the LSB set. This bit should be
read back as '0', since only DWORD addresses are legal.
1995-10-15 23:43:08 +00:00
Stefan Eßer
c7483249e7 Fix bad typo: CONF1_ENABLE_RES1 was written CONF1_ENABLE_CHK1 ... 1995-10-09 21:56:24 +00:00
Stefan Eßer
77b573149a New approach to the PCI bus configuration mechanism probe problem:
- try to make sure there is any kind of PCI device
- if there is anything at port 0x0cf8, then check for mech. 1 or 2
1995-09-22 19:10:54 +00:00
Stefan Eßer
a3adc4f8c5 Revert most changes of previous commit.
Changes relative to 1.12:
- Put extra instruction between outl()/inl() sequence to prevent the
  old value being read back because of the bus capacitance.
- Additional check for existence of register at CONF2_ENABLE_PORT.
1995-09-18 21:48:39 +00:00
Stefan Eßer
2d14418625 Another try to determine the PCI bus configuration mode (and whether
there is a PCI bus at all) ...

- Do not expect the chip sets to follow even very clearly expressed
  requirements of the PCI 2.0 spec.
- Do not read back the value just written to an I/O port without making
  sure that some other data have crossed the bus in between ...
1995-09-15 21:43:45 +00:00
Stefan Eßer
d7ea35fc88 Improved verification of configuration space accesses working:
Scan for devices instead of assuming that device 0 is present on bus 0
of every PCI motherboard.
1995-09-14 20:27:31 +00:00
Stefan Eßer
cda6791190 Make the PCI host bridge probe code more robust when dealing with chip sets
that use configuration mode 1, but still violate the PCI 2.0 specs ...
(Required for the Compaq Proliant, for example.)
1995-09-13 17:03:47 +00:00
Stefan Eßer
d2a2d5ec41 The PCI config mechanism 1 test failed for the Intel Aries.
Make it less strict ...

Submitted by:	NIIMI Satoshi <sa2c@and.or.jp>
1995-06-30 16:11:42 +00:00
Stefan Eßer
0847c06d2e PCI configuration mechanism now determined by a method, that doesn't
fail on new hardware (Compaq Prolinea and Compaq Prosignea), and that
doesn't erroneously identify old mech. 2 chip sets as using mech. 1.
(See section 3.6.4.1.1 of the PCI bus specs rev. 2.0)
1995-06-28 15:54:57 +00:00
Stefan Eßer
0f29bf015c Correct pcibus_setup() to return as soon as one test succeeds. 1995-03-22 21:35:39 +00:00
Stefan Eßer
9c6f3c132b Delete PCI PCI bridge simulator code ...
Submitted by:	Wolfgang Stanglmeier <wolf@kintaro.cologne.de>
1995-03-22 19:51:59 +00:00
Stefan Eßer
33865a313c Remove spurious declaration of printf().
Submitted by:	Michael Reifenberger <root@rz-wb.fh-sw.de>
1995-03-22 10:52:05 +00:00
Stefan Eßer
5b3f532eb1 New ISA specific PCI code.
Supports shared PCI interrupts.

Submitted by:	Wolfgang Stanglmeier <wolf@kintaro.cologne.de>
1995-03-21 23:06:07 +00:00
Bruce Evans
550f8550ec Replace all remaining instances of i386/include' by machine' and fix
nearby #include inconsistencies.
1995-02-26 05:14:53 +00:00
Stefan Eßer
781d9d4623 Keep PCI_CONF_MODE in a safe place for later reference, if #defined.
Reviewed by:	se
Submitted by:	seb@erix.ericsson.se (Sebastian Strollo)
1995-02-25 17:51:18 +00:00
Stefan Eßer
6f22585dd4 Initialisation of interrupt masks changed.
Reviewed by:	se
Submitted by:	wolf (Wolfgang Stanglmeier)
1995-02-09 20:16:19 +00:00
Stefan Eßer
ac19f91802 Reviewed by: se
Submitted by:	wolf (Wolfgang Stanglmeier)
New ISA dependend file for PCI bus support.
Replaces sys/i386/pci/pcibios.c.
1995-02-01 23:06:58 +00:00