to SIGTERM when ACPI is enabled. Sending SIGTERM to the hypervisor when an ACPI-aware OS is running will now trigger a soft-off allowing for a graceful shutdown of the guest. - Move constants for ACPI-related registers to acpi.h. - Implement an SMI_CMD register with commands to enable and disable ACPI. Currently the only change when ACPI is enabled is to enable the virtual power button via SIGTERM. - Implement a fixed-feature power button when ACPI is enabled by asserting PWRBTN_STS in PM1_EVT when SIGTERM is received. - Add support for EVFILT_SIGNAL events to mevent. - Implement support for the ACPI system command interrupt (SCI) and assert it when needed based on the values in PM1_EVT. Mark the SCI as active-low and level triggered in the MADT and MP Table. - Mark PCI interrupts in the MP Table as active-low in addition to level triggered. Reviewed by: neel
330 lines
8.2 KiB
C
330 lines
8.2 KiB
C
/*-
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* Copyright (c) 2012 NetApp, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/types.h>
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#include <sys/errno.h>
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#include <x86/mptable.h>
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#include <stdio.h>
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#include <string.h>
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#include "acpi.h"
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#include "bhyverun.h"
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#include "mptbl.h"
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#define MPTABLE_BASE 0xF0000
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/* floating pointer length + maximum length of configuration table */
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#define MPTABLE_MAX_LENGTH (65536 + 16)
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#define LAPIC_PADDR 0xFEE00000
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#define LAPIC_VERSION 16
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#define IOAPIC_PADDR 0xFEC00000
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#define IOAPIC_VERSION 0x11
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#define MP_SPECREV 4
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#define MPFP_SIG "_MP_"
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/* Configuration header defines */
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#define MPCH_SIG "PCMP"
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#define MPCH_OEMID "BHyVe "
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#define MPCH_OEMID_LEN 8
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#define MPCH_PRODID "Hypervisor "
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#define MPCH_PRODID_LEN 12
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/* Processor entry defines */
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#define MPEP_SIG_FAMILY 6 /* XXX bhyve should supply this */
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#define MPEP_SIG_MODEL 26
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#define MPEP_SIG_STEPPING 5
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#define MPEP_SIG \
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((MPEP_SIG_FAMILY << 8) | \
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(MPEP_SIG_MODEL << 4) | \
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(MPEP_SIG_STEPPING))
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#define MPEP_FEATURES (0xBFEBFBFF) /* XXX Intel i7 */
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/* Number of local intr entries */
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#define MPEII_NUM_LOCAL_IRQ 2
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/* Number of i/o intr entries */
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#define MPEII_MAX_IRQ 24
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/* Bus entry defines */
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#define MPE_NUM_BUSES 2
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#define MPE_BUSNAME_LEN 6
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#define MPE_BUSNAME_ISA "ISA "
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#define MPE_BUSNAME_PCI "PCI "
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static void *oem_tbl_start;
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static int oem_tbl_size;
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static uint8_t
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mpt_compute_checksum(void *base, size_t len)
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{
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uint8_t *bytes;
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uint8_t sum;
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for(bytes = base, sum = 0; len > 0; len--) {
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sum += *bytes++;
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}
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return (256 - sum);
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}
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static void
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mpt_build_mpfp(mpfps_t mpfp, vm_paddr_t gpa)
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{
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memset(mpfp, 0, sizeof(*mpfp));
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memcpy(mpfp->signature, MPFP_SIG, 4);
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mpfp->pap = gpa + sizeof(*mpfp);
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mpfp->length = 1;
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mpfp->spec_rev = MP_SPECREV;
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mpfp->checksum = mpt_compute_checksum(mpfp, sizeof(*mpfp));
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}
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static void
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mpt_build_mpch(mpcth_t mpch)
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{
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memset(mpch, 0, sizeof(*mpch));
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memcpy(mpch->signature, MPCH_SIG, 4);
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mpch->spec_rev = MP_SPECREV;
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memcpy(mpch->oem_id, MPCH_OEMID, MPCH_OEMID_LEN);
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memcpy(mpch->product_id, MPCH_PRODID, MPCH_PRODID_LEN);
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mpch->apic_address = LAPIC_PADDR;
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}
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static void
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mpt_build_proc_entries(proc_entry_ptr mpep, int ncpu)
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{
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int i;
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for (i = 0; i < ncpu; i++) {
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memset(mpep, 0, sizeof(*mpep));
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mpep->type = MPCT_ENTRY_PROCESSOR;
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mpep->apic_id = i; // XXX
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mpep->apic_version = LAPIC_VERSION;
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mpep->cpu_flags = PROCENTRY_FLAG_EN;
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if (i == 0)
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mpep->cpu_flags |= PROCENTRY_FLAG_BP;
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mpep->cpu_signature = MPEP_SIG;
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mpep->feature_flags = MPEP_FEATURES;
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mpep++;
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}
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}
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static void
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mpt_build_localint_entries(int_entry_ptr mpie)
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{
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/* Hardcode LINT0 as ExtINT on all CPUs. */
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memset(mpie, 0, sizeof(*mpie));
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mpie->type = MPCT_ENTRY_LOCAL_INT;
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mpie->int_type = INTENTRY_TYPE_EXTINT;
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mpie->int_flags = INTENTRY_FLAGS_POLARITY_CONFORM |
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INTENTRY_FLAGS_TRIGGER_CONFORM;
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mpie->dst_apic_id = 0xff;
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mpie->dst_apic_int = 0;
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mpie++;
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/* Hardcode LINT1 as NMI on all CPUs. */
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memset(mpie, 0, sizeof(*mpie));
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mpie->type = MPCT_ENTRY_LOCAL_INT;
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mpie->int_type = INTENTRY_TYPE_NMI;
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mpie->int_flags = INTENTRY_FLAGS_POLARITY_CONFORM |
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INTENTRY_FLAGS_TRIGGER_CONFORM;
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mpie->dst_apic_id = 0xff;
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mpie->dst_apic_int = 1;
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}
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static void
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mpt_build_bus_entries(bus_entry_ptr mpeb)
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{
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memset(mpeb, 0, sizeof(*mpeb));
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mpeb->type = MPCT_ENTRY_BUS;
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mpeb->bus_id = 0;
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memcpy(mpeb->bus_type, MPE_BUSNAME_PCI, MPE_BUSNAME_LEN);
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mpeb++;
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memset(mpeb, 0, sizeof(*mpeb));
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mpeb->type = MPCT_ENTRY_BUS;
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mpeb->bus_id = 1;
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memcpy(mpeb->bus_type, MPE_BUSNAME_ISA, MPE_BUSNAME_LEN);
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}
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static void
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mpt_build_ioapic_entries(io_apic_entry_ptr mpei, int id)
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{
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memset(mpei, 0, sizeof(*mpei));
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mpei->type = MPCT_ENTRY_IOAPIC;
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mpei->apic_id = id;
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mpei->apic_version = IOAPIC_VERSION;
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mpei->apic_flags = IOAPICENTRY_FLAG_EN;
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mpei->apic_address = IOAPIC_PADDR;
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}
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static void
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mpt_build_ioint_entries(int_entry_ptr mpie, int num_pins, int id)
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{
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int pin;
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/*
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* The following config is taken from kernel mptable.c
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* mptable_parse_default_config_ints(...), for now
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* just use the default config, tweek later if needed.
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*/
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/* Run through all 16 pins. */
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for (pin = 0; pin < num_pins; pin++) {
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memset(mpie, 0, sizeof(*mpie));
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mpie->type = MPCT_ENTRY_INT;
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mpie->src_bus_id = 1;
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mpie->dst_apic_id = id;
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/*
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* All default configs route IRQs from bus 0 to the first 16
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* pins of the first I/O APIC with an APIC ID of 2.
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*/
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mpie->dst_apic_int = pin;
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switch (pin) {
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case 0:
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/* Pin 0 is an ExtINT pin. */
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mpie->int_type = INTENTRY_TYPE_EXTINT;
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break;
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case 2:
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/* IRQ 0 is routed to pin 2. */
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mpie->int_type = INTENTRY_TYPE_INT;
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mpie->src_bus_irq = 0;
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break;
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case SCI_INT:
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/* ACPI SCI is level triggered and active-lo. */
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mpie->int_flags = INTENTRY_FLAGS_POLARITY_ACTIVELO |
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INTENTRY_FLAGS_TRIGGER_LEVEL;
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mpie->int_type = INTENTRY_TYPE_INT;
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mpie->src_bus_irq = SCI_INT;
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break;
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case 5:
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case 10:
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case 11:
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/*
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* PCI Irqs set to level triggered and active-lo.
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*/
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mpie->int_flags = INTENTRY_FLAGS_POLARITY_ACTIVELO |
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INTENTRY_FLAGS_TRIGGER_LEVEL;
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mpie->src_bus_id = 0;
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/* fall through.. */
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default:
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/* All other pins are identity mapped. */
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mpie->int_type = INTENTRY_TYPE_INT;
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mpie->src_bus_irq = pin;
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break;
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}
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mpie++;
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}
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}
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void
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mptable_add_oemtbl(void *tbl, int tblsz)
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{
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oem_tbl_start = tbl;
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oem_tbl_size = tblsz;
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}
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int
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mptable_build(struct vmctx *ctx, int ncpu)
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{
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mpcth_t mpch;
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bus_entry_ptr mpeb;
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io_apic_entry_ptr mpei;
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proc_entry_ptr mpep;
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mpfps_t mpfp;
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int_entry_ptr mpie;
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char *curraddr;
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char *startaddr;
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startaddr = paddr_guest2host(ctx, MPTABLE_BASE, MPTABLE_MAX_LENGTH);
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if (startaddr == NULL) {
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printf("mptable requires mapped mem\n");
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return (ENOMEM);
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}
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curraddr = startaddr;
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mpfp = (mpfps_t)curraddr;
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mpt_build_mpfp(mpfp, MPTABLE_BASE);
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curraddr += sizeof(*mpfp);
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mpch = (mpcth_t)curraddr;
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mpt_build_mpch(mpch);
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curraddr += sizeof(*mpch);
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mpep = (proc_entry_ptr)curraddr;
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mpt_build_proc_entries(mpep, ncpu);
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curraddr += sizeof(*mpep) * ncpu;
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mpch->entry_count += ncpu;
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mpeb = (bus_entry_ptr) curraddr;
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mpt_build_bus_entries(mpeb);
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curraddr += sizeof(*mpeb) * MPE_NUM_BUSES;
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mpch->entry_count += MPE_NUM_BUSES;
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mpei = (io_apic_entry_ptr)curraddr;
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mpt_build_ioapic_entries(mpei, 0);
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curraddr += sizeof(*mpei);
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mpch->entry_count++;
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mpie = (int_entry_ptr) curraddr;
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mpt_build_ioint_entries(mpie, MPEII_MAX_IRQ, 0);
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curraddr += sizeof(*mpie) * MPEII_MAX_IRQ;
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mpch->entry_count += MPEII_MAX_IRQ;
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mpie = (int_entry_ptr)curraddr;
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mpt_build_localint_entries(mpie);
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curraddr += sizeof(*mpie) * MPEII_NUM_LOCAL_IRQ;
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mpch->entry_count += MPEII_NUM_LOCAL_IRQ;
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if (oem_tbl_start) {
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mpch->oem_table_pointer = curraddr - startaddr + MPTABLE_BASE;
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mpch->oem_table_size = oem_tbl_size;
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memcpy(curraddr, oem_tbl_start, oem_tbl_size);
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}
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mpch->base_table_length = curraddr - (char *)mpch;
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mpch->checksum = mpt_compute_checksum(mpch, mpch->base_table_length);
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return (0);
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}
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