Jayachandran C. 96001a35e1 XLR/XLS hardware interrupts should be programmed level triggered at the ... PIC. This should fix the interrupt releated issues seen after the interrupt handling re-write for SMP.		2010-09-06 06:18:49 +00:00
..
adm5120	Remove some stray ';'s	2010-05-13 01:50:29 +00:00
alchemy	Hack to make ALCHEMY compile again...	2010-02-18 19:41:38 +00:00
atheros	Migrate if_arge to use the PLL cpuops.	2010-08-19 16:29:08 +00:00
cavium	o) Add the "octusb" controller which supports the first port of the Octeon	2010-07-20 19:32:25 +00:00
compile
conf	Rename TARGET_XLR_XLS to CPU_RMI to match other CPU_xxx definitions.	2010-08-13 12:56:00 +00:00
idt	- Call post-boot fixup function in order to get proper static	2010-01-25 00:44:05 +00:00
include	Remove misleading comment in pte.h. MIPS PTE entries are software managed	2010-08-30 08:23:22 +00:00
malta	Fix MALTA64 build.	2010-04-19 09:03:34 +00:00
mips	Apply MIPS pmap clean up patch from alc@ (with minor change to KASSERT):	2010-08-29 05:39:21 +00:00
rmi	XLR/XLS hardware interrupts should be programmed level triggered at the	2010-09-06 06:18:49 +00:00
sentry5	- Call post-boot fixup function in order to get proper static	2010-01-25 00:44:05 +00:00
sibyte	Remove redundant declaration of 'pcib_driver' class from sb_zbpci.c. This	2010-08-06 07:03:22 +00:00