Adrian Chadd 85b543e06d Populate hw.model with the CPU model information. ... Now you see something like: # sysctl hw.model hw.model: Atheros AR9330 rev 1 Tested: * Carambola 2, AR9331 SoC		2015-07-14 05:14:10 +00:00
..
adm5120	Add support for the uart classes to set their default register shift value.	2015-04-11 17:16:23 +00:00
alchemy	Fix a typo introduced in r257338.	2013-10-31 02:27:16 +00:00
atheros	Populate hw.model with the CPU model information.	2015-07-14 05:14:10 +00:00
beri	Provide the number of interrupt resources added to the list	2015-05-15 13:55:18 +00:00
cavium	Huge cleanup of random(4) code.	2015-06-30 17:00:45 +00:00
conf	o Add a description for virtio block device implemented	2015-07-03 14:46:57 +00:00
gxemul	Add 32-bit support for Gxemul's oldtestmips machine emulation	2013-09-04 20:34:36 +00:00
idt	Mechanically convert to if_inc_counter().	2014-09-19 09:19:49 +00:00
include	Add the atomic_thread_fence() family of functions with intent to	2015-07-08 18:12:24 +00:00
malta	Fix undefined behavior: (1 << 31) is not defined as 1 is an int and this	2013-11-30 22:17:27 +00:00
mips	The kernel sends signals to the processes via ABI specific sv_sendsig method.	2015-05-24 17:56:02 +00:00
nlm	CALLOUT_MPSAFE has lost its meaning since r141428, i.e., for more than ten	2015-05-22 17:05:21 +00:00
rmi	CALLOUT_MPSAFE has lost its meaning since r141428, i.e., for more than ten	2015-05-22 17:05:21 +00:00
rt305x	Add support for the uart classes to set their default register shift value.	2015-04-11 17:16:23 +00:00
sentry5	Merge from vmobj-rwlock branch:	2013-02-26 01:00:11 +00:00
sibyte	Devices that rely on hints or identify routines for discovery need to	2013-10-29 14:07:31 +00:00