Konstantin Belousov 3621ba1ede Add Intel Spec Store Bypass Disable control. ... Speculative Store Bypass (SSB) is a speculative execution side channel vulnerability identified by Jann Horn of Google Project Zero (GPZ) and Ken Johnson of the Microsoft Security Response Center (MSRC) https://bugs.chromium.org/p/project-zero/issues/detail?id=1528. Updated Intel microcode introduces a MSR bit to disable SSB as a mitigation for the vulnerability. Introduce a sysctl hw.spec_store_bypass_disable to provide global control over the SSBD bit, akin to the existing sysctl that controls IBRS. The sysctl can be set to one of three values: 0: off 1: on 2: auto Future work will enable applications to control SSBD on a per-process basis (when it is not enabled globally). SSBD bit detection and control was verified with prerelease microcode. Security: CVE-2018-3639 Tested by: emaste (previous version, without updated microcode) Sponsored by: The FreeBSD Foundation MFC after: 3 days		2018-05-21 21:08:19 +00:00
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acpi_apm.c	sys/x86: further adoption of SPDX licensing ID tags.	2017-11-27 15:11:47 +00:00
acpi_wakeup.c	Add Intel Spec Store Bypass Disable control.	2018-05-21 21:08:19 +00:00
madt.c	sys/x86: further adoption of SPDX licensing ID tags.	2017-11-27 15:11:47 +00:00
OsdEnvironment.c	sys/x86: further adoption of SPDX licensing ID tags.	2017-11-27 15:11:47 +00:00
srat.c	Move VM_NUMA_ALLOC and DEVICE_NUMA under the single global config option NUMA.	2018-01-14 03:36:03 +00:00