Marcel Moolenaar 229d894543 In pmap_set_pte(), make sure to enforce ordering by inserting a memory ... fence. Under system load, the CPU has been found to change the order by which the stores are made visible. When the tag is made visible before the other TLB values, other CPUs may use the invalid TLB values and do bad things. While here (i.e. not a fix) don't return errors from pmap_remove_vhpt() to callers of pmap_remove_pte(). Those callers don't check the return value and as such don't do what is needed to keep a consistent state. More importantly, pmap_remove_vhpt() can't really have an error without it indicating something unintended. Using KASSERT is therefore better. PR: 182999, 183227		2014-01-20 18:37:35 +00:00
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acpica	Improve style(9) in the previous commit.	2012-06-01 17:07:52 +00:00
conf	Enable vt. This brings VGA-based console and terminal support to	2014-01-19 04:45:52 +00:00
disasm	Fix disassembly of the invala, itc, itr and hint instructions	2007-10-16 02:49:40 +00:00
ia32	Add a mmap flag (MAP_32BIT) on 64-bit platforms to request that a mapping use	2013-09-09 18:11:59 +00:00
ia64	In pmap_set_pte(), make sure to enforce ordering by inserting a memory	2014-01-20 18:37:35 +00:00
include	Implement atomic_swap_<type>.	2014-01-01 22:51:19 +00:00
isa	Retire isa_setup_intr() and isa_teardown_intr() and use the generic bus	2011-05-06 13:48:53 +00:00
pci	In pci_cfgregread() and pci_cfgregwrite(), multiplex the domain and	2013-07-23 03:03:17 +00:00